hsi/controllers/omap_ssi.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /* OMAP SSI internal interface.
0003  *
0004  * Copyright (C) 2010 Nokia Corporation. All rights reserved.
0005  * Copyright (C) 2013 Sebastian Reichel
0006  *
0007  * Contact: Carlos Chinea <carlos.chinea@nokia.com>
0008  */
0009
0010 #ifndef __LINUX_HSI_OMAP_SSI_H__
0011 #define __LINUX_HSI_OMAP_SSI_H__
0012
0013 #include <linux/device.h>
0014 #include <linux/module.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/hsi/hsi.h>
0017 #include <linux/gpio/consumer.h>
0018 #include <linux/interrupt.h>
0019 #include <linux/io.h>
0020
0021 #define SSI_MAX_CHANNELS    8
0022 #define SSI_MAX_GDD_LCH     8
0023 #define SSI_BYTES_TO_FRAMES(x) ((((x) - 1) >> 2) + 1)
0024
0025 #define SSI_WAKE_EN 0
0026
0027 /**
0028  * struct omap_ssm_ctx - OMAP synchronous serial module (TX/RX) context
0029  * @mode: Bit transmission mode
0030  * @channels: Number of channels
0031  * @framesize: Frame size in bits
0032  * @timeout: RX frame timeout
0033  * @divisor: TX divider
0034  * @arb_mode: Arbitration mode for TX frame (Round robin, priority)
0035  */
0036 struct omap_ssm_ctx {
0037     u32 mode;
0038     u32 channels;
0039     u32 frame_size;
0040     union   {
0041             u32 timeout; /* Rx Only */
0042             struct  {
0043                     u32 arb_mode;
0044                     u32 divisor;
0045             }; /* Tx only */
0046     };
0047 };
0048
0049 /**
0050  * struct omap_ssi_port - OMAP SSI port data
0051  * @dev: device associated to the port (HSI port)
0052  * @pdev: platform device associated to the port
0053  * @sst_dma: SSI transmitter physical base address
0054  * @ssr_dma: SSI receiver physical base address
0055  * @sst_base: SSI transmitter base address
0056  * @ssr_base: SSI receiver base address
0057  * @wk_lock: spin lock to serialize access to the wake lines
0058  * @lock: Spin lock to serialize access to the SSI port
0059  * @channels: Current number of channels configured (1,2,4 or 8)
0060  * @txqueue: TX message queues
0061  * @rxqueue: RX message queues
0062  * @brkqueue: Queue of incoming HWBREAK requests (FRAME mode)
0063  * @errqueue: Queue for failed messages
0064  * @errqueue_work: Delayed Work for failed messages
0065  * @irq: IRQ number
0066  * @wake_irq: IRQ number for incoming wake line (-1 if none)
0067  * @wake_gpio: GPIO number for incoming wake line (-1 if none)
0068  * @flags: flags to keep track of states
0069  * @wk_refcount: Reference count for output wake line
0070  * @work: worker for starting TX
0071  * @sys_mpu_enable: Context for the interrupt enable register for irq 0
0072  * @sst: Context for the synchronous serial transmitter
0073  * @ssr: Context for the synchronous serial receiver
0074  */
0075 struct omap_ssi_port {
0076     struct device       *dev;
0077     struct device           *pdev;
0078     dma_addr_t      sst_dma;
0079     dma_addr_t      ssr_dma;
0080     void __iomem        *sst_base;
0081     void __iomem        *ssr_base;
0082     spinlock_t      wk_lock;
0083     spinlock_t      lock;
0084     unsigned int        channels;
0085     struct list_head    txqueue[SSI_MAX_CHANNELS];
0086     struct list_head    rxqueue[SSI_MAX_CHANNELS];
0087     struct list_head    brkqueue;
0088     struct list_head    errqueue;
0089     struct delayed_work errqueue_work;
0090     unsigned int        irq;
0091     int         wake_irq;
0092     struct gpio_desc    *wake_gpio;
0093     bool            wktest:1; /* FIXME: HACK to be removed */
0094     unsigned long       flags;
0095     unsigned int        wk_refcount;
0096     struct work_struct  work;
0097     /* OMAP SSI port context */
0098     u32         sys_mpu_enable; /* We use only one irq */
0099     struct omap_ssm_ctx sst;
0100     struct omap_ssm_ctx ssr;
0101     u32         loss_count;
0102     u32         port_id;
0103 #ifdef CONFIG_DEBUG_FS
0104     struct dentry *dir;
0105 #endif
0106 };
0107
0108 /**
0109  * struct gdd_trn - GDD transaction data
0110  * @msg: Pointer to the HSI message being served
0111  * @sg: Pointer to the current sg entry being served
0112  */
0113 struct gdd_trn {
0114     struct hsi_msg      *msg;
0115     struct scatterlist  *sg;
0116 };
0117
0118 /**
0119  * struct omap_ssi_controller - OMAP SSI controller data
0120  * @dev: device associated to the controller (HSI controller)
0121  * @sys: SSI I/O base address
0122  * @gdd: GDD I/O base address
0123  * @fck: SSI functional clock
0124  * @gdd_irq: IRQ line for GDD
0125  * @gdd_tasklet: bottom half for DMA transfers
0126  * @gdd_trn: Array of GDD transaction data for ongoing GDD transfers
0127  * @lock: lock to serialize access to GDD
0128  * @fck_nb: DVFS notfifier block
0129  * @fck_rate: clock rate
0130  * @loss_count: To follow if we need to restore context or not
0131  * @max_speed: Maximum TX speed (Kb/s) set by the clients.
0132  * @gdd_gcr: SSI GDD saved context
0133  * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any
0134  * @port: Array of pointers of the ports of the controller
0135  * @dir: Debugfs SSI root directory
0136  */
0137 struct omap_ssi_controller {
0138     struct device       *dev;
0139     void __iomem        *sys;
0140     void __iomem        *gdd;
0141     struct clk      *fck;
0142     unsigned int        gdd_irq;
0143     struct tasklet_struct   gdd_tasklet;
0144     struct gdd_trn      gdd_trn[SSI_MAX_GDD_LCH];
0145     spinlock_t      lock;
0146     struct notifier_block   fck_nb;
0147     unsigned long       fck_rate;
0148     u32         loss_count;
0149     u32         max_speed;
0150     /* OMAP SSI Controller context */
0151     u32         gdd_gcr;
0152     int         (*get_loss)(struct device *dev);
0153     struct omap_ssi_port    **port;
0154 #ifdef CONFIG_DEBUG_FS
0155     struct dentry *dir;
0156 #endif
0157 };
0158
0159 void omap_ssi_port_update_fclk(struct hsi_controller *ssi,
0160                    struct omap_ssi_port *omap_port);
0161
0162 extern struct platform_driver ssi_port_pdriver;
0163
0164 #endif /* __LINUX_HSI_OMAP_SSI_H__ */