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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2018 NVIDIA Corporation.
0004  */
0005 
0006 #define HOST1X_CHANNEL_DMASTART             0x0000
0007 #define HOST1X_CHANNEL_DMASTART_HI          0x0004
0008 #define HOST1X_CHANNEL_DMAPUT               0x0008
0009 #define HOST1X_CHANNEL_DMAPUT_HI            0x000c
0010 #define HOST1X_CHANNEL_DMAGET               0x0010
0011 #define HOST1X_CHANNEL_DMAGET_HI            0x0014
0012 #define HOST1X_CHANNEL_DMAEND               0x0018
0013 #define HOST1X_CHANNEL_DMAEND_HI            0x001c
0014 #define HOST1X_CHANNEL_DMACTRL              0x0020
0015 #define HOST1X_CHANNEL_DMACTRL_DMASTOP          BIT(0)
0016 #define HOST1X_CHANNEL_DMACTRL_DMAGETRST        BIT(1)
0017 #define HOST1X_CHANNEL_DMACTRL_DMAINITGET       BIT(2)
0018 #define HOST1X_CHANNEL_CMDFIFO_STAT         0x0024
0019 #define HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY       BIT(13)
0020 #define HOST1X_CHANNEL_CMDFIFO_RDATA            0x0028
0021 #define HOST1X_CHANNEL_CMDP_OFFSET          0x0030
0022 #define HOST1X_CHANNEL_CMDP_CLASS           0x0034
0023 #define HOST1X_CHANNEL_CHANNELSTAT          0x0038
0024 #define HOST1X_CHANNEL_CMDPROC_STOP         0x0048
0025 #define HOST1X_CHANNEL_TEARDOWN             0x004c
0026 
0027 #define HOST1X_SYNC_SYNCPT_CPU_INCR(x)          (0x6400 + 4 * (x))
0028 #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x)    (0x6464 + 4 * (x))
0029 #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x)    (0x652c + 4 * (x))
0030 #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x)    (0x6590 + 4 * (x))
0031 #define HOST1X_SYNC_SYNCPT(x)               (0x8080 + 4 * (x))
0032 #define HOST1X_SYNC_SYNCPT_INT_THRESH(x)        (0x9980 + 4 * (x))
0033 #define HOST1X_SYNC_SYNCPT_CH_APP(x)            (0xa604 + 4 * (x))
0034 #define HOST1X_SYNC_SYNCPT_CH_APP_CH(v)         (((v) & 0x3f) << 8)