host1x/hw/hw_host1x07_hypervisor.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2018 NVIDIA Corporation.
0004  */
0005
0006 #define HOST1X_HV_SYNCPT_PROT_EN            0x1ac4
0007 #define HOST1X_HV_SYNCPT_PROT_EN_CH_EN          BIT(1)
0008 #define HOST1X_HV_CH_KERNEL_FILTER_GBUFFER(x)       (0x2020 + (x * 4))
0009 #define HOST1X_HV_CMDFIFO_PEEK_CTRL         0x233c
0010 #define HOST1X_HV_CMDFIFO_PEEK_CTRL_ADDR(x)     (x)
0011 #define HOST1X_HV_CMDFIFO_PEEK_CTRL_CHANNEL(x)      ((x) << 16)
0012 #define HOST1X_HV_CMDFIFO_PEEK_CTRL_ENABLE      BIT(31)
0013 #define HOST1X_HV_CMDFIFO_PEEK_READ         0x2340
0014 #define HOST1X_HV_CMDFIFO_PEEK_PTRS         0x2344
0015 #define HOST1X_HV_CMDFIFO_PEEK_PTRS_WR_PTR_V(x)     (((x) >> 16) & 0xfff)
0016 #define HOST1X_HV_CMDFIFO_PEEK_PTRS_RD_PTR_V(x)     ((x) & 0xfff)
0017 #define HOST1X_HV_CMDFIFO_SETUP(x)          (0x2588 + (x * 4))
0018 #define HOST1X_HV_CMDFIFO_SETUP_LIMIT_V(x)      (((x) >> 16) & 0xfff)
0019 #define HOST1X_HV_CMDFIFO_SETUP_BASE_V(x)       ((x) & 0xfff)
0020 #define HOST1X_HV_ICG_EN_OVERRIDE           0x2aa8