![]() |
|
|||
0001 /* SPDX-License-Identifier: GPL-2.0-only */ 0002 /* 0003 * Tegra host1x Register Offsets for Tegra210 0004 * 0005 * Copyright (c) 2015 NVIDIA Corporation. 0006 */ 0007 0008 #ifndef __HOST1X_HOST1X05_HARDWARE_H 0009 #define __HOST1X_HOST1X05_HARDWARE_H 0010 0011 #include <linux/types.h> 0012 #include <linux/bitops.h> 0013 0014 #include "hw_host1x05_channel.h" 0015 #include "hw_host1x05_sync.h" 0016 #include "hw_host1x05_uclass.h" 0017 0018 #include "opcodes.h" 0019 0020 #endif
[ Source navigation ] | [ Diff markup ] | [ Identifier search ] | [ general search ] |
This page was automatically generated by the 2.1.0 LXR engine. The LXR team |
![]() ![]() |