gpu/host1x/dev.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2012-2015, NVIDIA Corporation.
0004  */
0005
0006 #ifndef HOST1X_DEV_H
0007 #define HOST1X_DEV_H
0008
0009 #include <linux/device.h>
0010 #include <linux/iommu.h>
0011 #include <linux/iova.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/reset.h>
0014
0015 #include "cdma.h"
0016 #include "channel.h"
0017 #include "context.h"
0018 #include "intr.h"
0019 #include "job.h"
0020 #include "syncpt.h"
0021
0022 struct host1x_syncpt;
0023 struct host1x_syncpt_base;
0024 struct host1x_channel;
0025 struct host1x_cdma;
0026 struct host1x_job;
0027 struct push_buffer;
0028 struct output;
0029 struct dentry;
0030
0031 struct host1x_channel_ops {
0032     int (*init)(struct host1x_channel *channel, struct host1x *host,
0033             unsigned int id);
0034     int (*submit)(struct host1x_job *job);
0035 };
0036
0037 struct host1x_cdma_ops {
0038     void (*start)(struct host1x_cdma *cdma);
0039     void (*stop)(struct host1x_cdma *cdma);
0040     void (*flush)(struct  host1x_cdma *cdma);
0041     int (*timeout_init)(struct host1x_cdma *cdma);
0042     void (*timeout_destroy)(struct host1x_cdma *cdma);
0043     void (*freeze)(struct host1x_cdma *cdma);
0044     void (*resume)(struct host1x_cdma *cdma, u32 getptr);
0045     void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr,
0046                  u32 syncpt_incrs, u32 syncval, u32 nr_slots);
0047 };
0048
0049 struct host1x_pushbuffer_ops {
0050     void (*init)(struct push_buffer *pb);
0051 };
0052
0053 struct host1x_debug_ops {
0054     void (*debug_init)(struct dentry *de);
0055     void (*show_channel_cdma)(struct host1x *host,
0056                   struct host1x_channel *ch,
0057                   struct output *o);
0058     void (*show_channel_fifo)(struct host1x *host,
0059                   struct host1x_channel *ch,
0060                   struct output *o);
0061     void (*show_mlocks)(struct host1x *host, struct output *output);
0062
0063 };
0064
0065 struct host1x_syncpt_ops {
0066     void (*restore)(struct host1x_syncpt *syncpt);
0067     void (*restore_wait_base)(struct host1x_syncpt *syncpt);
0068     void (*load_wait_base)(struct host1x_syncpt *syncpt);
0069     u32 (*load)(struct host1x_syncpt *syncpt);
0070     int (*cpu_incr)(struct host1x_syncpt *syncpt);
0071     void (*assign_to_channel)(struct host1x_syncpt *syncpt,
0072                               struct host1x_channel *channel);
0073     void (*enable_protection)(struct host1x *host);
0074 };
0075
0076 struct host1x_intr_ops {
0077     int (*init_host_sync)(struct host1x *host, u32 cpm,
0078         void (*syncpt_thresh_work)(struct work_struct *work));
0079     void (*set_syncpt_threshold)(
0080         struct host1x *host, unsigned int id, u32 thresh);
0081     void (*enable_syncpt_intr)(struct host1x *host, unsigned int id);
0082     void (*disable_syncpt_intr)(struct host1x *host, unsigned int id);
0083     void (*disable_all_syncpt_intrs)(struct host1x *host);
0084     int (*free_syncpt_irq)(struct host1x *host);
0085 };
0086
0087 struct host1x_sid_entry {
0088     unsigned int base;
0089     unsigned int offset;
0090     unsigned int limit;
0091 };
0092
0093 struct host1x_table_desc {
0094     unsigned int base;
0095     unsigned int count;
0096 };
0097
0098 struct host1x_info {
0099     unsigned int nb_channels; /* host1x: number of channels supported */
0100     unsigned int nb_pts; /* host1x: number of syncpoints supported */
0101     unsigned int nb_bases; /* host1x: number of syncpoint bases supported */
0102     unsigned int nb_mlocks; /* host1x: number of mlocks supported */
0103     int (*init)(struct host1x *host1x); /* initialize per SoC ops */
0104     unsigned int sync_offset; /* offset of syncpoint registers */
0105     u64 dma_mask; /* mask of addressable memory */
0106     bool has_wide_gather; /* supports GATHER_W opcode */
0107     bool has_hypervisor; /* has hypervisor registers */
0108     bool has_common; /* has common registers separate from hypervisor */
0109     unsigned int num_sid_entries;
0110     const struct host1x_sid_entry *sid_table;
0111     struct host1x_table_desc streamid_vm_table;
0112     struct host1x_table_desc classid_vm_table;
0113     struct host1x_table_desc mmio_vm_table;
0114     /*
0115      * On T20-T148, the boot chain may setup DC to increment syncpoints
0116      * 26/27 on VBLANK. As such we cannot use these syncpoints until
0117      * the display driver disables VBLANK increments.
0118      */
0119     bool reserve_vblank_syncpts;
0120 };
0121
0122 struct host1x {
0123     const struct host1x_info *info;
0124
0125     void __iomem *regs;
0126     void __iomem *hv_regs; /* hypervisor region */
0127     void __iomem *common_regs;
0128     struct host1x_syncpt *syncpt;
0129     struct host1x_syncpt_base *bases;
0130     struct device *dev;
0131     struct clk *clk;
0132     struct reset_control_bulk_data resets[2];
0133     unsigned int nresets;
0134
0135     struct iommu_group *group;
0136     struct iommu_domain *domain;
0137     struct iova_domain iova;
0138     dma_addr_t iova_end;
0139
0140     struct mutex intr_mutex;
0141     int intr_syncpt_irq;
0142
0143     const struct host1x_syncpt_ops *syncpt_op;
0144     const struct host1x_intr_ops *intr_op;
0145     const struct host1x_channel_ops *channel_op;
0146     const struct host1x_cdma_ops *cdma_op;
0147     const struct host1x_pushbuffer_ops *cdma_pb_op;
0148     const struct host1x_debug_ops *debug_op;
0149
0150     struct host1x_syncpt *nop_sp;
0151
0152     struct mutex syncpt_mutex;
0153
0154     struct host1x_channel_list channel_list;
0155     struct host1x_memory_context_list context_list;
0156
0157     struct dentry *debugfs;
0158
0159     struct mutex devices_lock;
0160     struct list_head devices;
0161
0162     struct list_head list;
0163
0164     struct device_dma_parameters dma_parms;
0165
0166     struct host1x_bo_cache cache;
0167 };
0168
0169 void host1x_common_writel(struct host1x *host1x, u32 v, u32 r);
0170 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v);
0171 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r);
0172 void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v);
0173 u32 host1x_sync_readl(struct host1x *host1x, u32 r);
0174 void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v);
0175 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r);
0176
0177 static inline void host1x_hw_syncpt_restore(struct host1x *host,
0178                         struct host1x_syncpt *sp)
0179 {
0180     host->syncpt_op->restore(sp);
0181 }
0182
0183 static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host,
0184                               struct host1x_syncpt *sp)
0185 {
0186     host->syncpt_op->restore_wait_base(sp);
0187 }
0188
0189 static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host,
0190                            struct host1x_syncpt *sp)
0191 {
0192     host->syncpt_op->load_wait_base(sp);
0193 }
0194
0195 static inline u32 host1x_hw_syncpt_load(struct host1x *host,
0196                     struct host1x_syncpt *sp)
0197 {
0198     return host->syncpt_op->load(sp);
0199 }
0200
0201 static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host,
0202                         struct host1x_syncpt *sp)
0203 {
0204     return host->syncpt_op->cpu_incr(sp);
0205 }
0206
0207 static inline void host1x_hw_syncpt_assign_to_channel(
0208     struct host1x *host, struct host1x_syncpt *sp,
0209     struct host1x_channel *ch)
0210 {
0211     return host->syncpt_op->assign_to_channel(sp, ch);
0212 }
0213
0214 static inline void host1x_hw_syncpt_enable_protection(struct host1x *host)
0215 {
0216     return host->syncpt_op->enable_protection(host);
0217 }
0218
0219 static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm,
0220             void (*syncpt_thresh_work)(struct work_struct *))
0221 {
0222     return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work);
0223 }
0224
0225 static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host,
0226                                unsigned int id,
0227                                u32 thresh)
0228 {
0229     host->intr_op->set_syncpt_threshold(host, id, thresh);
0230 }
0231
0232 static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host,
0233                              unsigned int id)
0234 {
0235     host->intr_op->enable_syncpt_intr(host, id);
0236 }
0237
0238 static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host,
0239                               unsigned int id)
0240 {
0241     host->intr_op->disable_syncpt_intr(host, id);
0242 }
0243
0244 static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host)
0245 {
0246     host->intr_op->disable_all_syncpt_intrs(host);
0247 }
0248
0249 static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host)
0250 {
0251     return host->intr_op->free_syncpt_irq(host);
0252 }
0253
0254 static inline int host1x_hw_channel_init(struct host1x *host,
0255                      struct host1x_channel *channel,
0256                      unsigned int id)
0257 {
0258     return host->channel_op->init(channel, host, id);
0259 }
0260
0261 static inline int host1x_hw_channel_submit(struct host1x *host,
0262                        struct host1x_job *job)
0263 {
0264     return host->channel_op->submit(job);
0265 }
0266
0267 static inline void host1x_hw_cdma_start(struct host1x *host,
0268                     struct host1x_cdma *cdma)
0269 {
0270     host->cdma_op->start(cdma);
0271 }
0272
0273 static inline void host1x_hw_cdma_stop(struct host1x *host,
0274                        struct host1x_cdma *cdma)
0275 {
0276     host->cdma_op->stop(cdma);
0277 }
0278
0279 static inline void host1x_hw_cdma_flush(struct host1x *host,
0280                     struct host1x_cdma *cdma)
0281 {
0282     host->cdma_op->flush(cdma);
0283 }
0284
0285 static inline int host1x_hw_cdma_timeout_init(struct host1x *host,
0286                           struct host1x_cdma *cdma)
0287 {
0288     return host->cdma_op->timeout_init(cdma);
0289 }
0290
0291 static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host,
0292                           struct host1x_cdma *cdma)
0293 {
0294     host->cdma_op->timeout_destroy(cdma);
0295 }
0296
0297 static inline void host1x_hw_cdma_freeze(struct host1x *host,
0298                      struct host1x_cdma *cdma)
0299 {
0300     host->cdma_op->freeze(cdma);
0301 }
0302
0303 static inline void host1x_hw_cdma_resume(struct host1x *host,
0304                      struct host1x_cdma *cdma, u32 getptr)
0305 {
0306     host->cdma_op->resume(cdma, getptr);
0307 }
0308
0309 static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host,
0310                            struct host1x_cdma *cdma,
0311                            u32 getptr,
0312                            u32 syncpt_incrs,
0313                            u32 syncval, u32 nr_slots)
0314 {
0315     host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval,
0316                     nr_slots);
0317 }
0318
0319 static inline void host1x_hw_pushbuffer_init(struct host1x *host,
0320                          struct push_buffer *pb)
0321 {
0322     host->cdma_pb_op->init(pb);
0323 }
0324
0325 static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de)
0326 {
0327     if (host->debug_op && host->debug_op->debug_init)
0328         host->debug_op->debug_init(de);
0329 }
0330
0331 static inline void host1x_hw_show_channel_cdma(struct host1x *host,
0332                            struct host1x_channel *channel,
0333                            struct output *o)
0334 {
0335     host->debug_op->show_channel_cdma(host, channel, o);
0336 }
0337
0338 static inline void host1x_hw_show_channel_fifo(struct host1x *host,
0339                            struct host1x_channel *channel,
0340                            struct output *o)
0341 {
0342     host->debug_op->show_channel_fifo(host, channel, o);
0343 }
0344
0345 static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o)
0346 {
0347     host->debug_op->show_mlocks(host, o);
0348 }
0349
0350 extern struct platform_driver tegra_mipi_driver;
0351
0352 #endif