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0026 #ifndef VMW_SO_H
0027 #define VMW_SO_H
0028
0029 enum vmw_view_type {
0030 vmw_view_sr,
0031 vmw_view_rt,
0032 vmw_view_ds,
0033 vmw_view_ua,
0034 vmw_view_max,
0035 };
0036
0037 enum vmw_so_type {
0038 vmw_so_el,
0039 vmw_so_bs,
0040 vmw_so_ds,
0041 vmw_so_rs,
0042 vmw_so_ss,
0043 vmw_so_so,
0044 vmw_so_max,
0045 };
0046
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0061 union vmw_view_destroy {
0062 struct SVGA3dCmdDXDestroyRenderTargetView rtv;
0063 struct SVGA3dCmdDXDestroyShaderResourceView srv;
0064 struct SVGA3dCmdDXDestroyDepthStencilView dsv;
0065 struct SVGA3dCmdDXDestroyUAView uav;
0066 u32 view_id;
0067 };
0068
0069
0070 extern const u32 vmw_view_destroy_cmds[];
0071
0072
0073 extern const SVGACOTableType vmw_view_cotables[];
0074
0075
0076 extern const SVGACOTableType vmw_so_cotables[];
0077
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0087
0088 static inline enum vmw_view_type vmw_view_cmd_to_type(u32 id)
0089 {
0090 u32 tmp = (id - SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW) / 2;
0091
0092 if (id == SVGA_3D_CMD_DX_DEFINE_UA_VIEW ||
0093 id == SVGA_3D_CMD_DX_DESTROY_UA_VIEW)
0094 return vmw_view_ua;
0095
0096 if (id == SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2)
0097 return vmw_view_ds;
0098
0099 if (tmp > (u32)vmw_view_ds)
0100 return vmw_view_max;
0101
0102 return (enum vmw_view_type) tmp;
0103 }
0104
0105
0106
0107
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0115
0116 static inline enum vmw_so_type vmw_so_cmd_to_type(u32 id)
0117 {
0118 switch (id) {
0119 case SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT:
0120 case SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT:
0121 return vmw_so_el;
0122 case SVGA_3D_CMD_DX_DEFINE_BLEND_STATE:
0123 case SVGA_3D_CMD_DX_DESTROY_BLEND_STATE:
0124 return vmw_so_bs;
0125 case SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE:
0126 case SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE:
0127 return vmw_so_ds;
0128 case SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE:
0129 case SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2:
0130 case SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE:
0131 return vmw_so_rs;
0132 case SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE:
0133 case SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE:
0134 return vmw_so_ss;
0135 case SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT:
0136 case SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB:
0137 case SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT:
0138 return vmw_so_so;
0139 default:
0140 break;
0141 }
0142 return vmw_so_max;
0143 }
0144
0145
0146
0147
0148 extern int vmw_view_add(struct vmw_cmdbuf_res_manager *man,
0149 struct vmw_resource *ctx,
0150 struct vmw_resource *srf,
0151 enum vmw_view_type view_type,
0152 u32 user_key,
0153 const void *cmd,
0154 size_t cmd_size,
0155 struct list_head *list);
0156
0157 extern int vmw_view_remove(struct vmw_cmdbuf_res_manager *man,
0158 u32 user_key, enum vmw_view_type view_type,
0159 struct list_head *list,
0160 struct vmw_resource **res_p);
0161
0162 extern void vmw_view_surface_list_destroy(struct vmw_private *dev_priv,
0163 struct list_head *view_list);
0164 extern void vmw_view_cotable_list_destroy(struct vmw_private *dev_priv,
0165 struct list_head *list,
0166 bool readback);
0167 extern struct vmw_resource *vmw_view_srf(struct vmw_resource *res);
0168 extern struct vmw_resource *vmw_view_lookup(struct vmw_cmdbuf_res_manager *man,
0169 enum vmw_view_type view_type,
0170 u32 user_key);
0171 extern u32 vmw_view_dirtying(struct vmw_resource *res);
0172 #endif