drm/virtio/virtgpu_drv.h

0001 /*
0002  * Copyright (C) 2015 Red Hat, Inc.
0003  * All Rights Reserved.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining
0006  * a copy of this software and associated documentation files (the
0007  * "Software"), to deal in the Software without restriction, including
0008  * without limitation the rights to use, copy, modify, merge, publish,
0009  * distribute, sublicense, and/or sell copies of the Software, and to
0010  * permit persons to whom the Software is furnished to do so, subject to
0011  * the following conditions:
0012  *
0013  * The above copyright notice and this permission notice (including the
0014  * next paragraph) shall be included in all copies or substantial
0015  * portions of the Software.
0016  *
0017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0018  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0019  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
0020  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
0021  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
0022  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
0023  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0024  */
0025
0026 #ifndef VIRTIO_DRV_H
0027 #define VIRTIO_DRV_H
0028
0029 #include <linux/dma-direction.h>
0030 #include <linux/virtio.h>
0031 #include <linux/virtio_ids.h>
0032 #include <linux/virtio_config.h>
0033 #include <linux/virtio_gpu.h>
0034
0035 #include <drm/drm_atomic.h>
0036 #include <drm/drm_drv.h>
0037 #include <drm/drm_encoder.h>
0038 #include <drm/drm_fb_helper.h>
0039 #include <drm/drm_fourcc.h>
0040 #include <drm/drm_framebuffer.h>
0041 #include <drm/drm_gem.h>
0042 #include <drm/drm_gem_shmem_helper.h>
0043 #include <drm/drm_ioctl.h>
0044 #include <drm/drm_probe_helper.h>
0045 #include <drm/virtgpu_drm.h>
0046
0047 #define DRIVER_NAME "virtio_gpu"
0048 #define DRIVER_DESC "virtio GPU"
0049 #define DRIVER_DATE "0"
0050
0051 #define DRIVER_MAJOR 0
0052 #define DRIVER_MINOR 1
0053 #define DRIVER_PATCHLEVEL 0
0054
0055 #define STATE_INITIALIZING 0
0056 #define STATE_OK 1
0057 #define STATE_ERR 2
0058
0059 #define MAX_CAPSET_ID 63
0060 #define MAX_RINGS 64
0061
0062 struct virtio_gpu_object_params {
0063     unsigned long size;
0064     bool dumb;
0065     /* 3d */
0066     bool virgl;
0067     bool blob;
0068
0069     /* classic resources only */
0070     uint32_t format;
0071     uint32_t width;
0072     uint32_t height;
0073     uint32_t target;
0074     uint32_t bind;
0075     uint32_t depth;
0076     uint32_t array_size;
0077     uint32_t last_level;
0078     uint32_t nr_samples;
0079     uint32_t flags;
0080
0081     /* blob resources only */
0082     uint32_t ctx_id;
0083     uint32_t blob_mem;
0084     uint32_t blob_flags;
0085     uint64_t blob_id;
0086 };
0087
0088 struct virtio_gpu_object {
0089     struct drm_gem_shmem_object base;
0090     uint32_t hw_res_handle;
0091     bool dumb;
0092     bool created;
0093     bool host3d_blob, guest_blob;
0094     uint32_t blob_mem, blob_flags;
0095
0096     int uuid_state;
0097     uuid_t uuid;
0098 };
0099 #define gem_to_virtio_gpu_obj(gobj) \
0100     container_of((gobj), struct virtio_gpu_object, base.base)
0101
0102 struct virtio_gpu_object_shmem {
0103     struct virtio_gpu_object base;
0104     struct sg_table *pages;
0105     uint32_t mapped;
0106 };
0107
0108 struct virtio_gpu_object_vram {
0109     struct virtio_gpu_object base;
0110     uint32_t map_state;
0111     uint32_t map_info;
0112     struct drm_mm_node vram_node;
0113 };
0114
0115 #define to_virtio_gpu_shmem(virtio_gpu_object) \
0116     container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
0117
0118 #define to_virtio_gpu_vram(virtio_gpu_object) \
0119     container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base)
0120
0121 struct virtio_gpu_object_array {
0122     struct ww_acquire_ctx ticket;
0123     struct list_head next;
0124     u32 nents, total;
0125     struct drm_gem_object *objs[];
0126 };
0127
0128 struct virtio_gpu_vbuffer;
0129 struct virtio_gpu_device;
0130
0131 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
0132                    struct virtio_gpu_vbuffer *vbuf);
0133
0134 struct virtio_gpu_fence_driver {
0135     atomic64_t       last_fence_id;
0136     uint64_t         current_fence_id;
0137     uint64_t         context;
0138     struct list_head fences;
0139     spinlock_t       lock;
0140 };
0141
0142 struct virtio_gpu_fence_event {
0143     struct drm_pending_event base;
0144     struct drm_event event;
0145 };
0146
0147 struct virtio_gpu_fence {
0148     struct dma_fence f;
0149     uint32_t ring_idx;
0150     uint64_t fence_id;
0151     bool emit_fence_info;
0152     struct virtio_gpu_fence_event *e;
0153     struct virtio_gpu_fence_driver *drv;
0154     struct list_head node;
0155 };
0156
0157 struct virtio_gpu_vbuffer {
0158     char *buf;
0159     int size;
0160
0161     void *data_buf;
0162     uint32_t data_size;
0163
0164     char *resp_buf;
0165     int resp_size;
0166     virtio_gpu_resp_cb resp_cb;
0167     void *resp_cb_data;
0168
0169     struct virtio_gpu_object_array *objs;
0170     struct list_head list;
0171 };
0172
0173 struct virtio_gpu_output {
0174     int index;
0175     struct drm_crtc crtc;
0176     struct drm_connector conn;
0177     struct drm_encoder enc;
0178     struct virtio_gpu_display_one info;
0179     struct virtio_gpu_update_cursor cursor;
0180     struct edid *edid;
0181     int cur_x;
0182     int cur_y;
0183     bool needs_modeset;
0184 };
0185 #define drm_crtc_to_virtio_gpu_output(x) \
0186     container_of(x, struct virtio_gpu_output, crtc)
0187
0188 struct virtio_gpu_framebuffer {
0189     struct drm_framebuffer base;
0190     struct virtio_gpu_fence *fence;
0191 };
0192 #define to_virtio_gpu_framebuffer(x) \
0193     container_of(x, struct virtio_gpu_framebuffer, base)
0194
0195 struct virtio_gpu_queue {
0196     struct virtqueue *vq;
0197     spinlock_t qlock;
0198     wait_queue_head_t ack_queue;
0199     struct work_struct dequeue_work;
0200 };
0201
0202 struct virtio_gpu_drv_capset {
0203     uint32_t id;
0204     uint32_t max_version;
0205     uint32_t max_size;
0206 };
0207
0208 struct virtio_gpu_drv_cap_cache {
0209     struct list_head head;
0210     void *caps_cache;
0211     uint32_t id;
0212     uint32_t version;
0213     uint32_t size;
0214     atomic_t is_valid;
0215 };
0216
0217 struct virtio_gpu_device {
0218     struct device *dev;
0219     struct drm_device *ddev;
0220
0221     struct virtio_device *vdev;
0222
0223     struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
0224     uint32_t num_scanouts;
0225
0226     struct virtio_gpu_queue ctrlq;
0227     struct virtio_gpu_queue cursorq;
0228     struct kmem_cache *vbufs;
0229
0230     atomic_t pending_commands;
0231
0232     struct ida  resource_ida;
0233
0234     wait_queue_head_t resp_wq;
0235     /* current display info */
0236     spinlock_t display_info_lock;
0237     bool display_info_pending;
0238
0239     struct virtio_gpu_fence_driver fence_drv;
0240
0241     struct ida  ctx_id_ida;
0242
0243     bool has_virgl_3d;
0244     bool has_edid;
0245     bool has_indirect;
0246     bool has_resource_assign_uuid;
0247     bool has_resource_blob;
0248     bool has_host_visible;
0249     bool has_context_init;
0250     struct virtio_shm_region host_visible_region;
0251     struct drm_mm host_visible_mm;
0252
0253     struct work_struct config_changed_work;
0254
0255     struct work_struct obj_free_work;
0256     spinlock_t obj_free_lock;
0257     struct list_head obj_free_list;
0258
0259     struct virtio_gpu_drv_capset *capsets;
0260     uint32_t num_capsets;
0261     uint64_t capset_id_mask;
0262     struct list_head cap_cache;
0263
0264     /* protects uuid state when exporting */
0265     spinlock_t resource_export_lock;
0266     /* protects map state and host_visible_mm */
0267     spinlock_t host_visible_lock;
0268 };
0269
0270 struct virtio_gpu_fpriv {
0271     uint32_t ctx_id;
0272     uint32_t context_init;
0273     bool context_created;
0274     uint32_t num_rings;
0275     uint64_t base_fence_ctx;
0276     uint64_t ring_idx_mask;
0277     struct mutex context_lock;
0278 };
0279
0280 /* virtgpu_ioctl.c */
0281 #define DRM_VIRTIO_NUM_IOCTLS 12
0282 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
0283 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
0284
0285 /* virtgpu_kms.c */
0286 int virtio_gpu_init(struct drm_device *dev);
0287 void virtio_gpu_deinit(struct drm_device *dev);
0288 void virtio_gpu_release(struct drm_device *dev);
0289 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
0290 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
0291
0292 /* virtgpu_gem.c */
0293 int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
0294                    struct drm_file *file);
0295 void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
0296                  struct drm_file *file);
0297 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
0298                 struct drm_device *dev,
0299                 struct drm_mode_create_dumb *args);
0300 int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
0301                   struct drm_device *dev,
0302                   uint32_t handle, uint64_t *offset_p);
0303
0304 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
0305 struct virtio_gpu_object_array*
0306 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
0307 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
0308                   struct drm_gem_object *obj);
0309 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
0310 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
0311 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
0312                 struct dma_fence *fence);
0313 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
0314 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
0315                        struct virtio_gpu_object_array *objs);
0316 void virtio_gpu_array_put_free_work(struct work_struct *work);
0317
0318 /* virtgpu_vq.c */
0319 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
0320 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
0321 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
0322                     struct virtio_gpu_object *bo,
0323                     struct virtio_gpu_object_params *params,
0324                     struct virtio_gpu_object_array *objs,
0325                     struct virtio_gpu_fence *fence);
0326 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
0327                    struct virtio_gpu_object *bo);
0328 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
0329                     uint64_t offset,
0330                     uint32_t width, uint32_t height,
0331                     uint32_t x, uint32_t y,
0332                     struct virtio_gpu_object_array *objs,
0333                     struct virtio_gpu_fence *fence);
0334 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
0335                    uint32_t resource_id,
0336                    uint32_t x, uint32_t y,
0337                    uint32_t width, uint32_t height,
0338                    struct virtio_gpu_object_array *objs,
0339                    struct virtio_gpu_fence *fence);
0340 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
0341                 uint32_t scanout_id, uint32_t resource_id,
0342                 uint32_t width, uint32_t height,
0343                 uint32_t x, uint32_t y);
0344 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
0345                   struct virtio_gpu_object *obj,
0346                   struct virtio_gpu_mem_entry *ents,
0347                   unsigned int nents);
0348 int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
0349 int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
0350 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
0351                 struct virtio_gpu_output *output);
0352 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
0353 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
0354 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
0355                   int idx, int version,
0356                   struct virtio_gpu_drv_cap_cache **cache_p);
0357 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
0358 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
0359                    uint32_t context_init, uint32_t nlen,
0360                    const char *name);
0361 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
0362                     uint32_t id);
0363 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
0364                         uint32_t ctx_id,
0365                         struct virtio_gpu_object_array *objs);
0366 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
0367                         uint32_t ctx_id,
0368                         struct virtio_gpu_object_array *objs);
0369 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
0370                void *data, uint32_t data_size,
0371                uint32_t ctx_id,
0372                struct virtio_gpu_object_array *objs,
0373                struct virtio_gpu_fence *fence);
0374 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
0375                       uint32_t ctx_id,
0376                       uint64_t offset, uint32_t level,
0377                       uint32_t stride,
0378                       uint32_t layer_stride,
0379                       struct drm_virtgpu_3d_box *box,
0380                       struct virtio_gpu_object_array *objs,
0381                       struct virtio_gpu_fence *fence);
0382 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
0383                     uint32_t ctx_id,
0384                     uint64_t offset, uint32_t level,
0385                     uint32_t stride,
0386                     uint32_t layer_stride,
0387                     struct drm_virtgpu_3d_box *box,
0388                     struct virtio_gpu_object_array *objs,
0389                     struct virtio_gpu_fence *fence);
0390 void
0391 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
0392                   struct virtio_gpu_object *bo,
0393                   struct virtio_gpu_object_params *params,
0394                   struct virtio_gpu_object_array *objs,
0395                   struct virtio_gpu_fence *fence);
0396 void virtio_gpu_ctrl_ack(struct virtqueue *vq);
0397 void virtio_gpu_cursor_ack(struct virtqueue *vq);
0398 void virtio_gpu_fence_ack(struct virtqueue *vq);
0399 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
0400 void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
0401 void virtio_gpu_dequeue_fence_func(struct work_struct *work);
0402
0403 void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
0404
0405 int
0406 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev,
0407                     struct virtio_gpu_object_array *objs);
0408
0409 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
0410                struct virtio_gpu_object_array *objs, uint64_t offset);
0411
0412 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev,
0413               struct virtio_gpu_object *bo);
0414
0415 void
0416 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev,
0417                     struct virtio_gpu_object *bo,
0418                     struct virtio_gpu_object_params *params,
0419                     struct virtio_gpu_mem_entry *ents,
0420                     uint32_t nents);
0421 void
0422 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
0423                 uint32_t scanout_id,
0424                 struct virtio_gpu_object *bo,
0425                 struct drm_framebuffer *fb,
0426                 uint32_t width, uint32_t height,
0427                 uint32_t x, uint32_t y);
0428
0429 /* virtgpu_display.c */
0430 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
0431 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
0432
0433 /* virtgpu_plane.c */
0434 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
0435 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
0436                     enum drm_plane_type type,
0437                     int index);
0438
0439 /* virtgpu_fence.c */
0440 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
0441                         uint64_t base_fence_ctx,
0442                         uint32_t ring_idx);
0443 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
0444               struct virtio_gpu_ctrl_hdr *cmd_hdr,
0445               struct virtio_gpu_fence *fence);
0446 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
0447                     u64 fence_id);
0448
0449 /* virtgpu_object.c */
0450 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
0451 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
0452                         size_t size);
0453 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
0454                  struct virtio_gpu_object_params *params,
0455                  struct virtio_gpu_object **bo_ptr,
0456                  struct virtio_gpu_fence *fence);
0457
0458 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
0459
0460 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
0461                    uint32_t *resid);
0462 /* virtgpu_prime.c */
0463 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev,
0464                     struct virtio_gpu_object *bo);
0465 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj,
0466                      int flags);
0467 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev,
0468                         struct dma_buf *buf);
0469 int virtgpu_gem_prime_get_uuid(struct drm_gem_object *obj,
0470                    uuid_t *uuid);
0471 struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
0472     struct drm_device *dev, struct dma_buf_attachment *attach,
0473     struct sg_table *sgt);
0474
0475 /* virtgpu_debugfs.c */
0476 void virtio_gpu_debugfs_init(struct drm_minor *minor);
0477
0478 /* virtgpu_vram.c */
0479 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo);
0480 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev,
0481                struct virtio_gpu_object_params *params,
0482                struct virtio_gpu_object **bo_ptr);
0483 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo,
0484                          struct device *dev,
0485                          enum dma_data_direction dir);
0486 void virtio_gpu_vram_unmap_dma_buf(struct device *dev,
0487                    struct sg_table *sgt,
0488                    enum dma_data_direction dir);
0489
0490 #endif