drm/vc4/vc4_txp.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright © 2018 Broadcom
0004  *
0005  * Authors:
0006  *  Eric Anholt <eric@anholt.net>
0007  *  Boris Brezillon <boris.brezillon@bootlin.com>
0008  */
0009
0010 #include <linux/clk.h>
0011 #include <linux/component.h>
0012 #include <linux/of_graph.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/pm_runtime.h>
0015
0016 #include <drm/drm_atomic.h>
0017 #include <drm/drm_atomic_helper.h>
0018 #include <drm/drm_edid.h>
0019 #include <drm/drm_fb_cma_helper.h>
0020 #include <drm/drm_fourcc.h>
0021 #include <drm/drm_framebuffer.h>
0022 #include <drm/drm_panel.h>
0023 #include <drm/drm_probe_helper.h>
0024 #include <drm/drm_vblank.h>
0025 #include <drm/drm_writeback.h>
0026
0027 #include "vc4_drv.h"
0028 #include "vc4_regs.h"
0029
0030 /* Base address of the output.  Raster formats must be 4-byte aligned,
0031  * T and LT must be 16-byte aligned or maybe utile-aligned (docs are
0032  * inconsistent, but probably utile).
0033  */
0034 #define TXP_DST_PTR     0x00
0035
0036 /* Pitch in bytes for raster images, 16-byte aligned.  For tiled, it's
0037  * the width in tiles.
0038  */
0039 #define TXP_DST_PITCH       0x04
0040 /* For T-tiled imgaes, DST_PITCH should be the number of tiles wide,
0041  * shifted up.
0042  */
0043 # define TXP_T_TILE_WIDTH_SHIFT     7
0044 /* For LT-tiled images, DST_PITCH should be the number of utiles wide,
0045  * shifted up.
0046  */
0047 # define TXP_LT_TILE_WIDTH_SHIFT    4
0048
0049 /* Pre-rotation width/height of the image.  Must match HVS config.
0050  *
0051  * If TFORMAT and 32-bit, limit is 1920 for 32-bit and 3840 to 16-bit
0052  * and width/height must be tile or utile-aligned as appropriate.  If
0053  * transposing (rotating), width is limited to 1920.
0054  *
0055  * Height is limited to various numbers between 4088 and 4095.  I'd
0056  * just use 4088 to be safe.
0057  */
0058 #define TXP_DIM         0x08
0059 # define TXP_HEIGHT_SHIFT       16
0060 # define TXP_HEIGHT_MASK        GENMASK(31, 16)
0061 # define TXP_WIDTH_SHIFT        0
0062 # define TXP_WIDTH_MASK         GENMASK(15, 0)
0063
0064 #define TXP_DST_CTRL        0x0c
0065 /* These bits are set to 0x54 */
0066 #define TXP_PILOT_SHIFT         24
0067 #define TXP_PILOT_MASK          GENMASK(31, 24)
0068 /* Bits 22-23 are set to 0x01 */
0069 #define TXP_VERSION_SHIFT       22
0070 #define TXP_VERSION_MASK        GENMASK(23, 22)
0071
0072 /* Powers down the internal memory. */
0073 # define TXP_POWERDOWN          BIT(21)
0074
0075 /* Enables storing the alpha component in 8888/4444, instead of
0076  * filling with ~ALPHA_INVERT.
0077  */
0078 # define TXP_ALPHA_ENABLE       BIT(20)
0079
0080 /* 4 bits, each enables stores for a channel in each set of 4 bytes.
0081  * Set to 0xf for normal operation.
0082  */
0083 # define TXP_BYTE_ENABLE_SHIFT      16
0084 # define TXP_BYTE_ENABLE_MASK       GENMASK(19, 16)
0085
0086 /* Debug: Generate VSTART again at EOF. */
0087 # define TXP_VSTART_AT_EOF      BIT(15)
0088
0089 /* Debug: Terminate the current frame immediately.  Stops AXI
0090  * writes.
0091  */
0092 # define TXP_ABORT          BIT(14)
0093
0094 # define TXP_DITHER         BIT(13)
0095
0096 /* Inverts alpha if TXP_ALPHA_ENABLE, chooses fill value for
0097  * !TXP_ALPHA_ENABLE.
0098  */
0099 # define TXP_ALPHA_INVERT       BIT(12)
0100
0101 /* Note: I've listed the channels here in high bit (in byte 3/2/1) to
0102  * low bit (in byte 0) order.
0103  */
0104 # define TXP_FORMAT_SHIFT       8
0105 # define TXP_FORMAT_MASK        GENMASK(11, 8)
0106 # define TXP_FORMAT_ABGR4444        0
0107 # define TXP_FORMAT_ARGB4444        1
0108 # define TXP_FORMAT_BGRA4444        2
0109 # define TXP_FORMAT_RGBA4444        3
0110 # define TXP_FORMAT_BGR565      6
0111 # define TXP_FORMAT_RGB565      7
0112 /* 888s are non-rotated, raster-only */
0113 # define TXP_FORMAT_BGR888      8
0114 # define TXP_FORMAT_RGB888      9
0115 # define TXP_FORMAT_ABGR8888        12
0116 # define TXP_FORMAT_ARGB8888        13
0117 # define TXP_FORMAT_BGRA8888        14
0118 # define TXP_FORMAT_RGBA8888        15
0119
0120 /* If TFORMAT is set, generates LT instead of T format. */
0121 # define TXP_LINEAR_UTILE       BIT(7)
0122
0123 /* Rotate output by 90 degrees. */
0124 # define TXP_TRANSPOSE          BIT(6)
0125
0126 /* Generate a tiled format for V3D. */
0127 # define TXP_TFORMAT            BIT(5)
0128
0129 /* Generates some undefined test mode output. */
0130 # define TXP_TEST_MODE          BIT(4)
0131
0132 /* Request odd field from HVS. */
0133 # define TXP_FIELD          BIT(3)
0134
0135 /* Raise interrupt when idle. */
0136 # define TXP_EI             BIT(2)
0137
0138 /* Set when generating a frame, clears when idle. */
0139 # define TXP_BUSY           BIT(1)
0140
0141 /* Starts a frame.  Self-clearing. */
0142 # define TXP_GO             BIT(0)
0143
0144 /* Number of lines received and committed to memory. */
0145 #define TXP_PROGRESS        0x10
0146
0147 #define TXP_READ(offset) readl(txp->regs + (offset))
0148 #define TXP_WRITE(offset, val) writel(val, txp->regs + (offset))
0149
0150 struct vc4_txp {
0151     struct vc4_crtc base;
0152
0153     struct platform_device *pdev;
0154
0155     struct drm_writeback_connector connector;
0156
0157     void __iomem *regs;
0158     struct debugfs_regset32 regset;
0159 };
0160
0161 static inline struct vc4_txp *encoder_to_vc4_txp(struct drm_encoder *encoder)
0162 {
0163     return container_of(encoder, struct vc4_txp, connector.encoder);
0164 }
0165
0166 static inline struct vc4_txp *connector_to_vc4_txp(struct drm_connector *conn)
0167 {
0168     return container_of(conn, struct vc4_txp, connector.base);
0169 }
0170
0171 static const struct debugfs_reg32 txp_regs[] = {
0172     VC4_REG32(TXP_DST_PTR),
0173     VC4_REG32(TXP_DST_PITCH),
0174     VC4_REG32(TXP_DIM),
0175     VC4_REG32(TXP_DST_CTRL),
0176     VC4_REG32(TXP_PROGRESS),
0177 };
0178
0179 static int vc4_txp_connector_get_modes(struct drm_connector *connector)
0180 {
0181     struct drm_device *dev = connector->dev;
0182
0183     return drm_add_modes_noedid(connector, dev->mode_config.max_width,
0184                     dev->mode_config.max_height);
0185 }
0186
0187 static enum drm_mode_status
0188 vc4_txp_connector_mode_valid(struct drm_connector *connector,
0189                  struct drm_display_mode *mode)
0190 {
0191     struct drm_device *dev = connector->dev;
0192     struct drm_mode_config *mode_config = &dev->mode_config;
0193     int w = mode->hdisplay, h = mode->vdisplay;
0194
0195     if (w < mode_config->min_width || w > mode_config->max_width)
0196         return MODE_BAD_HVALUE;
0197
0198     if (h < mode_config->min_height || h > mode_config->max_height)
0199         return MODE_BAD_VVALUE;
0200
0201     return MODE_OK;
0202 }
0203
0204 static const u32 drm_fmts[] = {
0205     DRM_FORMAT_RGB888,
0206     DRM_FORMAT_BGR888,
0207     DRM_FORMAT_XRGB8888,
0208     DRM_FORMAT_XBGR8888,
0209     DRM_FORMAT_ARGB8888,
0210     DRM_FORMAT_ABGR8888,
0211     DRM_FORMAT_RGBX8888,
0212     DRM_FORMAT_BGRX8888,
0213     DRM_FORMAT_RGBA8888,
0214     DRM_FORMAT_BGRA8888,
0215 };
0216
0217 static const u32 txp_fmts[] = {
0218     TXP_FORMAT_RGB888,
0219     TXP_FORMAT_BGR888,
0220     TXP_FORMAT_ARGB8888,
0221     TXP_FORMAT_ABGR8888,
0222     TXP_FORMAT_ARGB8888,
0223     TXP_FORMAT_ABGR8888,
0224     TXP_FORMAT_RGBA8888,
0225     TXP_FORMAT_BGRA8888,
0226     TXP_FORMAT_RGBA8888,
0227     TXP_FORMAT_BGRA8888,
0228 };
0229
0230 static void vc4_txp_armed(struct drm_crtc_state *state)
0231 {
0232     struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(state);
0233
0234     vc4_state->txp_armed = true;
0235 }
0236
0237 static int vc4_txp_connector_atomic_check(struct drm_connector *conn,
0238                       struct drm_atomic_state *state)
0239 {
0240     struct drm_connector_state *conn_state;
0241     struct drm_crtc_state *crtc_state;
0242     struct drm_framebuffer *fb;
0243     int i;
0244
0245     conn_state = drm_atomic_get_new_connector_state(state, conn);
0246     if (!conn_state->writeback_job)
0247         return 0;
0248
0249     crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
0250
0251     fb = conn_state->writeback_job->fb;
0252     if (fb->width != crtc_state->mode.hdisplay ||
0253         fb->height != crtc_state->mode.vdisplay) {
0254         DRM_DEBUG_KMS("Invalid framebuffer size %ux%u\n",
0255                   fb->width, fb->height);
0256         return -EINVAL;
0257     }
0258
0259     for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) {
0260         if (fb->format->format == drm_fmts[i])
0261             break;
0262     }
0263
0264     if (i == ARRAY_SIZE(drm_fmts))
0265         return -EINVAL;
0266
0267     /* Pitch must be aligned on 16 bytes. */
0268     if (fb->pitches[0] & GENMASK(3, 0))
0269         return -EINVAL;
0270
0271     vc4_txp_armed(crtc_state);
0272
0273     return 0;
0274 }
0275
0276 static void vc4_txp_connector_atomic_commit(struct drm_connector *conn,
0277                     struct drm_atomic_state *state)
0278 {
0279     struct drm_connector_state *conn_state = drm_atomic_get_new_connector_state(state,
0280                                             conn);
0281     struct vc4_txp *txp = connector_to_vc4_txp(conn);
0282     struct drm_gem_cma_object *gem;
0283     struct drm_display_mode *mode;
0284     struct drm_framebuffer *fb;
0285     u32 ctrl;
0286     int i;
0287
0288     if (WARN_ON(!conn_state->writeback_job))
0289         return;
0290
0291     mode = &conn_state->crtc->state->adjusted_mode;
0292     fb = conn_state->writeback_job->fb;
0293
0294     for (i = 0; i < ARRAY_SIZE(drm_fmts); i++) {
0295         if (fb->format->format == drm_fmts[i])
0296             break;
0297     }
0298
0299     if (WARN_ON(i == ARRAY_SIZE(drm_fmts)))
0300         return;
0301
0302     ctrl = TXP_GO | TXP_EI |
0303            VC4_SET_FIELD(0xf, TXP_BYTE_ENABLE) |
0304            VC4_SET_FIELD(txp_fmts[i], TXP_FORMAT);
0305
0306     if (fb->format->has_alpha)
0307         ctrl |= TXP_ALPHA_ENABLE;
0308     else
0309         /*
0310          * If TXP_ALPHA_ENABLE isn't set and TXP_ALPHA_INVERT is, the
0311          * hardware will force the output padding to be 0xff.
0312          */
0313         ctrl |= TXP_ALPHA_INVERT;
0314
0315     gem = drm_fb_cma_get_gem_obj(fb, 0);
0316     TXP_WRITE(TXP_DST_PTR, gem->paddr + fb->offsets[0]);
0317     TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]);
0318     TXP_WRITE(TXP_DIM,
0319           VC4_SET_FIELD(mode->hdisplay, TXP_WIDTH) |
0320           VC4_SET_FIELD(mode->vdisplay, TXP_HEIGHT));
0321
0322     TXP_WRITE(TXP_DST_CTRL, ctrl);
0323
0324     drm_writeback_queue_job(&txp->connector, conn_state);
0325 }
0326
0327 static const struct drm_connector_helper_funcs vc4_txp_connector_helper_funcs = {
0328     .get_modes = vc4_txp_connector_get_modes,
0329     .mode_valid = vc4_txp_connector_mode_valid,
0330     .atomic_check = vc4_txp_connector_atomic_check,
0331     .atomic_commit = vc4_txp_connector_atomic_commit,
0332 };
0333
0334 static enum drm_connector_status
0335 vc4_txp_connector_detect(struct drm_connector *connector, bool force)
0336 {
0337     return connector_status_connected;
0338 }
0339
0340 static void vc4_txp_connector_destroy(struct drm_connector *connector)
0341 {
0342     drm_connector_unregister(connector);
0343     drm_connector_cleanup(connector);
0344 }
0345
0346 static const struct drm_connector_funcs vc4_txp_connector_funcs = {
0347     .detect = vc4_txp_connector_detect,
0348     .fill_modes = drm_helper_probe_single_connector_modes,
0349     .destroy = vc4_txp_connector_destroy,
0350     .reset = drm_atomic_helper_connector_reset,
0351     .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
0352     .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
0353 };
0354
0355 static void vc4_txp_encoder_disable(struct drm_encoder *encoder)
0356 {
0357     struct vc4_txp *txp = encoder_to_vc4_txp(encoder);
0358
0359     if (TXP_READ(TXP_DST_CTRL) & TXP_BUSY) {
0360         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
0361
0362         TXP_WRITE(TXP_DST_CTRL, TXP_ABORT);
0363
0364         while (TXP_READ(TXP_DST_CTRL) & TXP_BUSY &&
0365                time_before(jiffies, timeout))
0366             ;
0367
0368         WARN_ON(TXP_READ(TXP_DST_CTRL) & TXP_BUSY);
0369     }
0370
0371     TXP_WRITE(TXP_DST_CTRL, TXP_POWERDOWN);
0372 }
0373
0374 static const struct drm_encoder_helper_funcs vc4_txp_encoder_helper_funcs = {
0375     .disable = vc4_txp_encoder_disable,
0376 };
0377
0378 static int vc4_txp_enable_vblank(struct drm_crtc *crtc)
0379 {
0380     return 0;
0381 }
0382
0383 static void vc4_txp_disable_vblank(struct drm_crtc *crtc) {}
0384
0385 static const struct drm_crtc_funcs vc4_txp_crtc_funcs = {
0386     .set_config     = drm_atomic_helper_set_config,
0387     .destroy        = vc4_crtc_destroy,
0388     .page_flip      = vc4_page_flip,
0389     .reset          = vc4_crtc_reset,
0390     .atomic_duplicate_state = vc4_crtc_duplicate_state,
0391     .atomic_destroy_state   = vc4_crtc_destroy_state,
0392     .enable_vblank      = vc4_txp_enable_vblank,
0393     .disable_vblank     = vc4_txp_disable_vblank,
0394 };
0395
0396 static int vc4_txp_atomic_check(struct drm_crtc *crtc,
0397                 struct drm_atomic_state *state)
0398 {
0399     struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
0400                                       crtc);
0401     int ret;
0402
0403     ret = vc4_hvs_atomic_check(crtc, state);
0404     if (ret)
0405         return ret;
0406
0407     crtc_state->no_vblank = true;
0408
0409     return 0;
0410 }
0411
0412 static void vc4_txp_atomic_enable(struct drm_crtc *crtc,
0413                   struct drm_atomic_state *state)
0414 {
0415     drm_crtc_vblank_on(crtc);
0416     vc4_hvs_atomic_enable(crtc, state);
0417 }
0418
0419 static void vc4_txp_atomic_disable(struct drm_crtc *crtc,
0420                    struct drm_atomic_state *state)
0421 {
0422     struct drm_device *dev = crtc->dev;
0423
0424     /* Disable vblank irq handling before crtc is disabled. */
0425     drm_crtc_vblank_off(crtc);
0426
0427     vc4_hvs_atomic_disable(crtc, state);
0428
0429     /*
0430      * Make sure we issue a vblank event after disabling the CRTC if
0431      * someone was waiting it.
0432      */
0433     if (crtc->state->event) {
0434         unsigned long flags;
0435
0436         spin_lock_irqsave(&dev->event_lock, flags);
0437         drm_crtc_send_vblank_event(crtc, crtc->state->event);
0438         crtc->state->event = NULL;
0439         spin_unlock_irqrestore(&dev->event_lock, flags);
0440     }
0441 }
0442
0443 static const struct drm_crtc_helper_funcs vc4_txp_crtc_helper_funcs = {
0444     .atomic_check   = vc4_txp_atomic_check,
0445     .atomic_begin   = vc4_hvs_atomic_begin,
0446     .atomic_flush   = vc4_hvs_atomic_flush,
0447     .atomic_enable  = vc4_txp_atomic_enable,
0448     .atomic_disable = vc4_txp_atomic_disable,
0449 };
0450
0451 static irqreturn_t vc4_txp_interrupt(int irq, void *data)
0452 {
0453     struct vc4_txp *txp = data;
0454     struct vc4_crtc *vc4_crtc = &txp->base;
0455
0456     TXP_WRITE(TXP_DST_CTRL, TXP_READ(TXP_DST_CTRL) & ~TXP_EI);
0457     vc4_crtc_handle_vblank(vc4_crtc);
0458     drm_writeback_signal_completion(&txp->connector, 0);
0459
0460     return IRQ_HANDLED;
0461 }
0462
0463 static const struct vc4_crtc_data vc4_txp_crtc_data = {
0464     .hvs_available_channels = BIT(2),
0465     .hvs_output = 2,
0466 };
0467
0468 static int vc4_txp_bind(struct device *dev, struct device *master, void *data)
0469 {
0470     struct platform_device *pdev = to_platform_device(dev);
0471     struct drm_device *drm = dev_get_drvdata(master);
0472     struct vc4_dev *vc4 = to_vc4_dev(drm);
0473     struct vc4_crtc *vc4_crtc;
0474     struct vc4_txp *txp;
0475     struct drm_crtc *crtc;
0476     struct drm_encoder *encoder;
0477     int ret, irq;
0478
0479     irq = platform_get_irq(pdev, 0);
0480     if (irq < 0)
0481         return irq;
0482
0483     txp = devm_kzalloc(dev, sizeof(*txp), GFP_KERNEL);
0484     if (!txp)
0485         return -ENOMEM;
0486     vc4_crtc = &txp->base;
0487     crtc = &vc4_crtc->base;
0488
0489     vc4_crtc->pdev = pdev;
0490     vc4_crtc->data = &vc4_txp_crtc_data;
0491     vc4_crtc->feeds_txp = true;
0492
0493     txp->pdev = pdev;
0494
0495     txp->regs = vc4_ioremap_regs(pdev, 0);
0496     if (IS_ERR(txp->regs))
0497         return PTR_ERR(txp->regs);
0498     txp->regset.base = txp->regs;
0499     txp->regset.regs = txp_regs;
0500     txp->regset.nregs = ARRAY_SIZE(txp_regs);
0501
0502     drm_connector_helper_add(&txp->connector.base,
0503                  &vc4_txp_connector_helper_funcs);
0504     ret = drm_writeback_connector_init(drm, &txp->connector,
0505                        &vc4_txp_connector_funcs,
0506                        &vc4_txp_encoder_helper_funcs,
0507                        drm_fmts, ARRAY_SIZE(drm_fmts),
0508                        0);
0509     if (ret)
0510         return ret;
0511
0512     ret = vc4_crtc_init(drm, vc4_crtc,
0513                 &vc4_txp_crtc_funcs, &vc4_txp_crtc_helper_funcs);
0514     if (ret)
0515         return ret;
0516
0517     encoder = &txp->connector.encoder;
0518     encoder->possible_crtcs = drm_crtc_mask(crtc);
0519
0520     ret = devm_request_irq(dev, irq, vc4_txp_interrupt, 0,
0521                    dev_name(dev), txp);
0522     if (ret)
0523         return ret;
0524
0525     dev_set_drvdata(dev, txp);
0526     vc4->txp = txp;
0527
0528     vc4_debugfs_add_regset32(drm, "txp_regs", &txp->regset);
0529
0530     return 0;
0531 }
0532
0533 static void vc4_txp_unbind(struct device *dev, struct device *master,
0534                void *data)
0535 {
0536     struct drm_device *drm = dev_get_drvdata(master);
0537     struct vc4_dev *vc4 = to_vc4_dev(drm);
0538     struct vc4_txp *txp = dev_get_drvdata(dev);
0539
0540     vc4_txp_connector_destroy(&txp->connector.base);
0541
0542     vc4->txp = NULL;
0543 }
0544
0545 static const struct component_ops vc4_txp_ops = {
0546     .bind   = vc4_txp_bind,
0547     .unbind = vc4_txp_unbind,
0548 };
0549
0550 static int vc4_txp_probe(struct platform_device *pdev)
0551 {
0552     return component_add(&pdev->dev, &vc4_txp_ops);
0553 }
0554
0555 static int vc4_txp_remove(struct platform_device *pdev)
0556 {
0557     component_del(&pdev->dev, &vc4_txp_ops);
0558     return 0;
0559 }
0560
0561 static const struct of_device_id vc4_txp_dt_match[] = {
0562     { .compatible = "brcm,bcm2835-txp" },
0563     { /* sentinel */ },
0564 };
0565
0566 struct platform_driver vc4_txp_driver = {
0567     .probe = vc4_txp_probe,
0568     .remove = vc4_txp_remove,
0569     .driver = {
0570         .name = "vc4_txp",
0571         .of_match_table = vc4_txp_dt_match,
0572     },
0573 };