drm/vc4/vc4_dpi.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (C) 2016 Broadcom Limited
0004  */
0005
0006 /**
0007  * DOC: VC4 DPI module
0008  *
0009  * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
0010  * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
0011  * ALT2 function.
0012  */
0013
0014 #include <drm/drm_atomic_helper.h>
0015 #include <drm/drm_bridge.h>
0016 #include <drm/drm_edid.h>
0017 #include <drm/drm_of.h>
0018 #include <drm/drm_panel.h>
0019 #include <drm/drm_probe_helper.h>
0020 #include <drm/drm_simple_kms_helper.h>
0021 #include <linux/clk.h>
0022 #include <linux/component.h>
0023 #include <linux/media-bus-format.h>
0024 #include <linux/of_graph.h>
0025 #include <linux/of_platform.h>
0026 #include "vc4_drv.h"
0027 #include "vc4_regs.h"
0028
0029 #define DPI_C           0x00
0030 # define DPI_OUTPUT_ENABLE_MODE     BIT(16)
0031
0032 /* The order field takes the incoming 24 bit RGB from the pixel valve
0033  * and shuffles the 3 channels.
0034  */
0035 # define DPI_ORDER_MASK         VC4_MASK(15, 14)
0036 # define DPI_ORDER_SHIFT        14
0037 # define DPI_ORDER_RGB          0
0038 # define DPI_ORDER_BGR          1
0039 # define DPI_ORDER_GRB          2
0040 # define DPI_ORDER_BRG          3
0041
0042 /* The format field takes the ORDER-shuffled pixel valve data and
0043  * formats it onto the output lines.
0044  */
0045 # define DPI_FORMAT_MASK        VC4_MASK(13, 11)
0046 # define DPI_FORMAT_SHIFT       11
0047 /* This define is named in the hardware, but actually just outputs 0. */
0048 # define DPI_FORMAT_9BIT_666_RGB    0
0049 /* Outputs 00000000rrrrrggggggbbbbb */
0050 # define DPI_FORMAT_16BIT_565_RGB_1 1
0051 /* Outputs 000rrrrr00gggggg000bbbbb */
0052 # define DPI_FORMAT_16BIT_565_RGB_2 2
0053 /* Outputs 00rrrrr000gggggg00bbbbb0 */
0054 # define DPI_FORMAT_16BIT_565_RGB_3 3
0055 /* Outputs 000000rrrrrrggggggbbbbbb */
0056 # define DPI_FORMAT_18BIT_666_RGB_1 4
0057 /* Outputs 00rrrrrr00gggggg00bbbbbb */
0058 # define DPI_FORMAT_18BIT_666_RGB_2 5
0059 /* Outputs rrrrrrrrggggggggbbbbbbbb */
0060 # define DPI_FORMAT_24BIT_888_RGB   6
0061
0062 /* Reverses the polarity of the corresponding signal */
0063 # define DPI_PIXEL_CLK_INVERT       BIT(10)
0064 # define DPI_HSYNC_INVERT       BIT(9)
0065 # define DPI_VSYNC_INVERT       BIT(8)
0066 # define DPI_OUTPUT_ENABLE_INVERT   BIT(7)
0067
0068 /* Outputs the signal the falling clock edge instead of rising. */
0069 # define DPI_HSYNC_NEGATE       BIT(6)
0070 # define DPI_VSYNC_NEGATE       BIT(5)
0071 # define DPI_OUTPUT_ENABLE_NEGATE   BIT(4)
0072
0073 /* Disables the signal */
0074 # define DPI_HSYNC_DISABLE      BIT(3)
0075 # define DPI_VSYNC_DISABLE      BIT(2)
0076 # define DPI_OUTPUT_ENABLE_DISABLE  BIT(1)
0077
0078 /* Power gate to the device, full reset at 0 -> 1 transition */
0079 # define DPI_ENABLE         BIT(0)
0080
0081 /* All other registers besides DPI_C return the ID */
0082 #define DPI_ID          0x04
0083 # define DPI_ID_VALUE       0x00647069
0084
0085 /* General DPI hardware state. */
0086 struct vc4_dpi {
0087     struct platform_device *pdev;
0088
0089     struct drm_encoder *encoder;
0090
0091     void __iomem *regs;
0092
0093     struct clk *pixel_clock;
0094     struct clk *core_clock;
0095
0096     struct debugfs_regset32 regset;
0097 };
0098
0099 #define DPI_READ(offset) readl(dpi->regs + (offset))
0100 #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
0101
0102 /* VC4 DPI encoder KMS struct */
0103 struct vc4_dpi_encoder {
0104     struct vc4_encoder base;
0105     struct vc4_dpi *dpi;
0106 };
0107
0108 static inline struct vc4_dpi_encoder *
0109 to_vc4_dpi_encoder(struct drm_encoder *encoder)
0110 {
0111     return container_of(encoder, struct vc4_dpi_encoder, base.base);
0112 }
0113
0114 static const struct debugfs_reg32 dpi_regs[] = {
0115     VC4_REG32(DPI_C),
0116     VC4_REG32(DPI_ID),
0117 };
0118
0119 static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
0120 {
0121     struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
0122     struct vc4_dpi *dpi = vc4_encoder->dpi;
0123
0124     clk_disable_unprepare(dpi->pixel_clock);
0125 }
0126
0127 static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
0128 {
0129     struct drm_device *dev = encoder->dev;
0130     struct drm_display_mode *mode = &encoder->crtc->mode;
0131     struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
0132     struct vc4_dpi *dpi = vc4_encoder->dpi;
0133     struct drm_connector_list_iter conn_iter;
0134     struct drm_connector *connector = NULL, *connector_scan;
0135     u32 dpi_c = DPI_ENABLE;
0136     int ret;
0137
0138     /* Look up the connector attached to DPI so we can get the
0139      * bus_format.  Ideally the bridge would tell us the
0140      * bus_format we want, but it doesn't yet, so assume that it's
0141      * uniform throughout the bridge chain.
0142      */
0143     drm_connector_list_iter_begin(dev, &conn_iter);
0144     drm_for_each_connector_iter(connector_scan, &conn_iter) {
0145         if (connector_scan->encoder == encoder) {
0146             connector = connector_scan;
0147             break;
0148         }
0149     }
0150     drm_connector_list_iter_end(&conn_iter);
0151
0152     /* Default to 24bit if no connector or format found. */
0153     dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
0154
0155     if (connector) {
0156         if (connector->display_info.num_bus_formats) {
0157             u32 bus_format = connector->display_info.bus_formats[0];
0158
0159             dpi_c &= ~DPI_FORMAT_MASK;
0160
0161             switch (bus_format) {
0162             case MEDIA_BUS_FMT_RGB888_1X24:
0163                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
0164                                DPI_FORMAT);
0165                 break;
0166             case MEDIA_BUS_FMT_BGR888_1X24:
0167                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
0168                                DPI_FORMAT);
0169                 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
0170                                DPI_ORDER);
0171                 break;
0172             case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
0173                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
0174                                DPI_FORMAT);
0175                 break;
0176             case MEDIA_BUS_FMT_RGB666_1X18:
0177                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
0178                                DPI_FORMAT);
0179                 break;
0180             case MEDIA_BUS_FMT_RGB565_1X16:
0181                 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
0182                                DPI_FORMAT);
0183                 break;
0184             default:
0185                 DRM_ERROR("Unknown media bus format %d\n",
0186                       bus_format);
0187                 break;
0188             }
0189         }
0190
0191         if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
0192             dpi_c |= DPI_PIXEL_CLK_INVERT;
0193
0194         if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
0195             dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
0196     }
0197
0198     if (mode->flags & DRM_MODE_FLAG_CSYNC) {
0199         if (mode->flags & DRM_MODE_FLAG_NCSYNC)
0200             dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
0201     } else {
0202         dpi_c |= DPI_OUTPUT_ENABLE_MODE;
0203
0204         if (mode->flags & DRM_MODE_FLAG_NHSYNC)
0205             dpi_c |= DPI_HSYNC_INVERT;
0206         else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
0207             dpi_c |= DPI_HSYNC_DISABLE;
0208
0209         if (mode->flags & DRM_MODE_FLAG_NVSYNC)
0210             dpi_c |= DPI_VSYNC_INVERT;
0211         else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
0212             dpi_c |= DPI_VSYNC_DISABLE;
0213     }
0214
0215     DPI_WRITE(DPI_C, dpi_c);
0216
0217     ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
0218     if (ret)
0219         DRM_ERROR("Failed to set clock rate: %d\n", ret);
0220
0221     ret = clk_prepare_enable(dpi->pixel_clock);
0222     if (ret)
0223         DRM_ERROR("Failed to set clock rate: %d\n", ret);
0224 }
0225
0226 static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
0227                                const struct drm_display_mode *mode)
0228 {
0229     if (mode->flags & DRM_MODE_FLAG_INTERLACE)
0230         return MODE_NO_INTERLACE;
0231
0232     return MODE_OK;
0233 }
0234
0235 static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
0236     .disable = vc4_dpi_encoder_disable,
0237     .enable = vc4_dpi_encoder_enable,
0238     .mode_valid = vc4_dpi_encoder_mode_valid,
0239 };
0240
0241 static const struct of_device_id vc4_dpi_dt_match[] = {
0242     { .compatible = "brcm,bcm2835-dpi", .data = NULL },
0243     {}
0244 };
0245
0246 /* Sets up the next link in the display chain, whether it's a panel or
0247  * a bridge.
0248  */
0249 static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
0250 {
0251     struct device *dev = &dpi->pdev->dev;
0252     struct drm_bridge *bridge;
0253
0254     bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, 0);
0255     if (IS_ERR(bridge)) {
0256         /* If nothing was connected in the DT, that's not an
0257          * error.
0258          */
0259         if (PTR_ERR(bridge) == -ENODEV)
0260             return 0;
0261         else
0262             return PTR_ERR(bridge);
0263     }
0264
0265     return drm_bridge_attach(dpi->encoder, bridge, NULL, 0);
0266 }
0267
0268 static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
0269 {
0270     struct platform_device *pdev = to_platform_device(dev);
0271     struct drm_device *drm = dev_get_drvdata(master);
0272     struct vc4_dev *vc4 = to_vc4_dev(drm);
0273     struct vc4_dpi *dpi;
0274     struct vc4_dpi_encoder *vc4_dpi_encoder;
0275     int ret;
0276
0277     dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
0278     if (!dpi)
0279         return -ENOMEM;
0280
0281     vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
0282                        GFP_KERNEL);
0283     if (!vc4_dpi_encoder)
0284         return -ENOMEM;
0285     vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
0286     vc4_dpi_encoder->dpi = dpi;
0287     dpi->encoder = &vc4_dpi_encoder->base.base;
0288
0289     dpi->pdev = pdev;
0290     dpi->regs = vc4_ioremap_regs(pdev, 0);
0291     if (IS_ERR(dpi->regs))
0292         return PTR_ERR(dpi->regs);
0293     dpi->regset.base = dpi->regs;
0294     dpi->regset.regs = dpi_regs;
0295     dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
0296
0297     if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
0298         dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
0299             DPI_READ(DPI_ID), DPI_ID_VALUE);
0300         return -ENODEV;
0301     }
0302
0303     dpi->core_clock = devm_clk_get(dev, "core");
0304     if (IS_ERR(dpi->core_clock)) {
0305         ret = PTR_ERR(dpi->core_clock);
0306         if (ret != -EPROBE_DEFER)
0307             DRM_ERROR("Failed to get core clock: %d\n", ret);
0308         return ret;
0309     }
0310     dpi->pixel_clock = devm_clk_get(dev, "pixel");
0311     if (IS_ERR(dpi->pixel_clock)) {
0312         ret = PTR_ERR(dpi->pixel_clock);
0313         if (ret != -EPROBE_DEFER)
0314             DRM_ERROR("Failed to get pixel clock: %d\n", ret);
0315         return ret;
0316     }
0317
0318     ret = clk_prepare_enable(dpi->core_clock);
0319     if (ret)
0320         DRM_ERROR("Failed to turn on core clock: %d\n", ret);
0321
0322     drm_simple_encoder_init(drm, dpi->encoder, DRM_MODE_ENCODER_DPI);
0323     drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
0324
0325     ret = vc4_dpi_init_bridge(dpi);
0326     if (ret)
0327         goto err_destroy_encoder;
0328
0329     dev_set_drvdata(dev, dpi);
0330
0331     vc4->dpi = dpi;
0332
0333     vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
0334
0335     return 0;
0336
0337 err_destroy_encoder:
0338     drm_encoder_cleanup(dpi->encoder);
0339     clk_disable_unprepare(dpi->core_clock);
0340     return ret;
0341 }
0342
0343 static void vc4_dpi_unbind(struct device *dev, struct device *master,
0344                void *data)
0345 {
0346     struct drm_device *drm = dev_get_drvdata(master);
0347     struct vc4_dev *vc4 = to_vc4_dev(drm);
0348     struct vc4_dpi *dpi = dev_get_drvdata(dev);
0349
0350     drm_of_panel_bridge_remove(dev->of_node, 0, 0);
0351
0352     drm_encoder_cleanup(dpi->encoder);
0353
0354     clk_disable_unprepare(dpi->core_clock);
0355
0356     vc4->dpi = NULL;
0357 }
0358
0359 static const struct component_ops vc4_dpi_ops = {
0360     .bind   = vc4_dpi_bind,
0361     .unbind = vc4_dpi_unbind,
0362 };
0363
0364 static int vc4_dpi_dev_probe(struct platform_device *pdev)
0365 {
0366     return component_add(&pdev->dev, &vc4_dpi_ops);
0367 }
0368
0369 static int vc4_dpi_dev_remove(struct platform_device *pdev)
0370 {
0371     component_del(&pdev->dev, &vc4_dpi_ops);
0372     return 0;
0373 }
0374
0375 struct platform_driver vc4_dpi_driver = {
0376     .probe = vc4_dpi_dev_probe,
0377     .remove = vc4_dpi_dev_remove,
0378     .driver = {
0379         .name = "vc4_dpi",
0380         .of_match_table = vc4_dpi_dt_match,
0381     },
0382 };