drm/v3d/v3d_perfmon.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2021 Raspberry Pi
0004  */
0005
0006 #include "v3d_drv.h"
0007 #include "v3d_regs.h"
0008
0009 #define V3D_PERFMONID_MIN   1
0010 #define V3D_PERFMONID_MAX   U32_MAX
0011
0012 void v3d_perfmon_get(struct v3d_perfmon *perfmon)
0013 {
0014     if (perfmon)
0015         refcount_inc(&perfmon->refcnt);
0016 }
0017
0018 void v3d_perfmon_put(struct v3d_perfmon *perfmon)
0019 {
0020     if (perfmon && refcount_dec_and_test(&perfmon->refcnt))
0021         kfree(perfmon);
0022 }
0023
0024 void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon)
0025 {
0026     unsigned int i;
0027     u32 mask;
0028     u8 ncounters;
0029
0030     if (WARN_ON_ONCE(!perfmon || v3d->active_perfmon))
0031         return;
0032
0033     ncounters = perfmon->ncounters;
0034     mask = GENMASK(ncounters - 1, 0);
0035
0036     for (i = 0; i < ncounters; i++) {
0037         u32 source = i / 4;
0038         u32 channel = V3D_SET_FIELD(perfmon->counters[i], V3D_PCTR_S0);
0039
0040         i++;
0041         channel |= V3D_SET_FIELD(i < ncounters ? perfmon->counters[i] : 0,
0042                      V3D_PCTR_S1);
0043         i++;
0044         channel |= V3D_SET_FIELD(i < ncounters ? perfmon->counters[i] : 0,
0045                      V3D_PCTR_S2);
0046         i++;
0047         channel |= V3D_SET_FIELD(i < ncounters ? perfmon->counters[i] : 0,
0048                      V3D_PCTR_S3);
0049         V3D_CORE_WRITE(0, V3D_V4_PCTR_0_SRC_X(source), channel);
0050     }
0051
0052     V3D_CORE_WRITE(0, V3D_V4_PCTR_0_CLR, mask);
0053     V3D_CORE_WRITE(0, V3D_PCTR_0_OVERFLOW, mask);
0054     V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, mask);
0055
0056     v3d->active_perfmon = perfmon;
0057 }
0058
0059 void v3d_perfmon_stop(struct v3d_dev *v3d, struct v3d_perfmon *perfmon,
0060               bool capture)
0061 {
0062     unsigned int i;
0063
0064     if (!perfmon || !v3d->active_perfmon)
0065         return;
0066
0067     mutex_lock(&perfmon->lock);
0068     if (perfmon != v3d->active_perfmon) {
0069         mutex_unlock(&perfmon->lock);
0070         return;
0071     }
0072
0073     if (capture)
0074         for (i = 0; i < perfmon->ncounters; i++)
0075             perfmon->values[i] += V3D_CORE_READ(0, V3D_PCTR_0_PCTRX(i));
0076
0077     V3D_CORE_WRITE(0, V3D_V4_PCTR_0_EN, 0);
0078
0079     v3d->active_perfmon = NULL;
0080     mutex_unlock(&perfmon->lock);
0081 }
0082
0083 struct v3d_perfmon *v3d_perfmon_find(struct v3d_file_priv *v3d_priv, int id)
0084 {
0085     struct v3d_perfmon *perfmon;
0086
0087     mutex_lock(&v3d_priv->perfmon.lock);
0088     perfmon = idr_find(&v3d_priv->perfmon.idr, id);
0089     v3d_perfmon_get(perfmon);
0090     mutex_unlock(&v3d_priv->perfmon.lock);
0091
0092     return perfmon;
0093 }
0094
0095 void v3d_perfmon_open_file(struct v3d_file_priv *v3d_priv)
0096 {
0097     mutex_init(&v3d_priv->perfmon.lock);
0098     idr_init(&v3d_priv->perfmon.idr);
0099 }
0100
0101 static int v3d_perfmon_idr_del(int id, void *elem, void *data)
0102 {
0103     struct v3d_perfmon *perfmon = elem;
0104
0105     v3d_perfmon_put(perfmon);
0106
0107     return 0;
0108 }
0109
0110 void v3d_perfmon_close_file(struct v3d_file_priv *v3d_priv)
0111 {
0112     mutex_lock(&v3d_priv->perfmon.lock);
0113     idr_for_each(&v3d_priv->perfmon.idr, v3d_perfmon_idr_del, NULL);
0114     idr_destroy(&v3d_priv->perfmon.idr);
0115     mutex_unlock(&v3d_priv->perfmon.lock);
0116 }
0117
0118 int v3d_perfmon_create_ioctl(struct drm_device *dev, void *data,
0119                  struct drm_file *file_priv)
0120 {
0121     struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
0122     struct drm_v3d_perfmon_create *req = data;
0123     struct v3d_perfmon *perfmon;
0124     unsigned int i;
0125     int ret;
0126
0127     /* Number of monitored counters cannot exceed HW limits. */
0128     if (req->ncounters > DRM_V3D_MAX_PERF_COUNTERS ||
0129         !req->ncounters)
0130         return -EINVAL;
0131
0132     /* Make sure all counters are valid. */
0133     for (i = 0; i < req->ncounters; i++) {
0134         if (req->counters[i] >= V3D_PERFCNT_NUM)
0135             return -EINVAL;
0136     }
0137
0138     perfmon = kzalloc(struct_size(perfmon, values, req->ncounters),
0139               GFP_KERNEL);
0140     if (!perfmon)
0141         return -ENOMEM;
0142
0143     for (i = 0; i < req->ncounters; i++)
0144         perfmon->counters[i] = req->counters[i];
0145
0146     perfmon->ncounters = req->ncounters;
0147
0148     refcount_set(&perfmon->refcnt, 1);
0149     mutex_init(&perfmon->lock);
0150
0151     mutex_lock(&v3d_priv->perfmon.lock);
0152     ret = idr_alloc(&v3d_priv->perfmon.idr, perfmon, V3D_PERFMONID_MIN,
0153             V3D_PERFMONID_MAX, GFP_KERNEL);
0154     mutex_unlock(&v3d_priv->perfmon.lock);
0155
0156     if (ret < 0) {
0157         kfree(perfmon);
0158         return ret;
0159     }
0160
0161     req->id = ret;
0162
0163     return 0;
0164 }
0165
0166 int v3d_perfmon_destroy_ioctl(struct drm_device *dev, void *data,
0167                   struct drm_file *file_priv)
0168 {
0169     struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
0170     struct drm_v3d_perfmon_destroy *req = data;
0171     struct v3d_perfmon *perfmon;
0172
0173     mutex_lock(&v3d_priv->perfmon.lock);
0174     perfmon = idr_remove(&v3d_priv->perfmon.idr, req->id);
0175     mutex_unlock(&v3d_priv->perfmon.lock);
0176
0177     if (!perfmon)
0178         return -EINVAL;
0179
0180     v3d_perfmon_put(perfmon);
0181
0182     return 0;
0183 }
0184
0185 int v3d_perfmon_get_values_ioctl(struct drm_device *dev, void *data,
0186                  struct drm_file *file_priv)
0187 {
0188     struct v3d_dev *v3d = to_v3d_dev(dev);
0189     struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
0190     struct drm_v3d_perfmon_get_values *req = data;
0191     struct v3d_perfmon *perfmon;
0192     int ret = 0;
0193
0194     if (req->pad != 0)
0195         return -EINVAL;
0196
0197     mutex_lock(&v3d_priv->perfmon.lock);
0198     perfmon = idr_find(&v3d_priv->perfmon.idr, req->id);
0199     v3d_perfmon_get(perfmon);
0200     mutex_unlock(&v3d_priv->perfmon.lock);
0201
0202     if (!perfmon)
0203         return -EINVAL;
0204
0205     v3d_perfmon_stop(v3d, perfmon, true);
0206
0207     if (copy_to_user(u64_to_user_ptr(req->values_ptr), perfmon->values,
0208              perfmon->ncounters * sizeof(u64)))
0209         ret = -EFAULT;
0210
0211     v3d_perfmon_put(perfmon);
0212
0213     return ret;
0214 }