0001
0002
0003
0004
0005
0006
0007
0008
0009
0010 #include <linux/backlight.h>
0011 #include <linux/delay.h>
0012 #include <linux/dma-buf.h>
0013 #include <linux/gpio/consumer.h>
0014 #include <linux/module.h>
0015 #include <linux/property.h>
0016 #include <linux/spi/spi.h>
0017 #include <video/mipi_display.h>
0018
0019 #include <drm/drm_atomic_helper.h>
0020 #include <drm/drm_drv.h>
0021 #include <drm/drm_fb_helper.h>
0022 #include <drm/drm_gem_atomic_helper.h>
0023 #include <drm/drm_gem_cma_helper.h>
0024 #include <drm/drm_managed.h>
0025 #include <drm/drm_mipi_dbi.h>
0026
0027 #define ST7735R_FRMCTR1 0xb1
0028 #define ST7735R_FRMCTR2 0xb2
0029 #define ST7735R_FRMCTR3 0xb3
0030 #define ST7735R_INVCTR 0xb4
0031 #define ST7735R_PWCTR1 0xc0
0032 #define ST7735R_PWCTR2 0xc1
0033 #define ST7735R_PWCTR3 0xc2
0034 #define ST7735R_PWCTR4 0xc3
0035 #define ST7735R_PWCTR5 0xc4
0036 #define ST7735R_VMCTR1 0xc5
0037 #define ST7735R_GAMCTRP1 0xe0
0038 #define ST7735R_GAMCTRN1 0xe1
0039
0040 #define ST7735R_MY BIT(7)
0041 #define ST7735R_MX BIT(6)
0042 #define ST7735R_MV BIT(5)
0043 #define ST7735R_RGB BIT(3)
0044
0045 struct st7735r_cfg {
0046 const struct drm_display_mode mode;
0047 unsigned int left_offset;
0048 unsigned int top_offset;
0049 unsigned int write_only:1;
0050 unsigned int rgb:1;
0051 };
0052
0053 struct st7735r_priv {
0054 struct mipi_dbi_dev dbidev;
0055 const struct st7735r_cfg *cfg;
0056 };
0057
0058 static void st7735r_pipe_enable(struct drm_simple_display_pipe *pipe,
0059 struct drm_crtc_state *crtc_state,
0060 struct drm_plane_state *plane_state)
0061 {
0062 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
0063 struct st7735r_priv *priv = container_of(dbidev, struct st7735r_priv,
0064 dbidev);
0065 struct mipi_dbi *dbi = &dbidev->dbi;
0066 int ret, idx;
0067 u8 addr_mode;
0068
0069 if (!drm_dev_enter(pipe->crtc.dev, &idx))
0070 return;
0071
0072 DRM_DEBUG_KMS("\n");
0073
0074 ret = mipi_dbi_poweron_reset(dbidev);
0075 if (ret)
0076 goto out_exit;
0077
0078 msleep(150);
0079
0080 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
0081 msleep(500);
0082
0083 mipi_dbi_command(dbi, ST7735R_FRMCTR1, 0x01, 0x2c, 0x2d);
0084 mipi_dbi_command(dbi, ST7735R_FRMCTR2, 0x01, 0x2c, 0x2d);
0085 mipi_dbi_command(dbi, ST7735R_FRMCTR3, 0x01, 0x2c, 0x2d, 0x01, 0x2c,
0086 0x2d);
0087 mipi_dbi_command(dbi, ST7735R_INVCTR, 0x07);
0088 mipi_dbi_command(dbi, ST7735R_PWCTR1, 0xa2, 0x02, 0x84);
0089 mipi_dbi_command(dbi, ST7735R_PWCTR2, 0xc5);
0090 mipi_dbi_command(dbi, ST7735R_PWCTR3, 0x0a, 0x00);
0091 mipi_dbi_command(dbi, ST7735R_PWCTR4, 0x8a, 0x2a);
0092 mipi_dbi_command(dbi, ST7735R_PWCTR5, 0x8a, 0xee);
0093 mipi_dbi_command(dbi, ST7735R_VMCTR1, 0x0e);
0094 mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE);
0095 switch (dbidev->rotation) {
0096 default:
0097 addr_mode = ST7735R_MX | ST7735R_MY;
0098 break;
0099 case 90:
0100 addr_mode = ST7735R_MX | ST7735R_MV;
0101 break;
0102 case 180:
0103 addr_mode = 0;
0104 break;
0105 case 270:
0106 addr_mode = ST7735R_MY | ST7735R_MV;
0107 break;
0108 }
0109
0110 if (priv->cfg->rgb)
0111 addr_mode |= ST7735R_RGB;
0112
0113 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
0114 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,
0115 MIPI_DCS_PIXEL_FMT_16BIT);
0116 mipi_dbi_command(dbi, ST7735R_GAMCTRP1, 0x02, 0x1c, 0x07, 0x12, 0x37,
0117 0x32, 0x29, 0x2d, 0x29, 0x25, 0x2b, 0x39, 0x00, 0x01,
0118 0x03, 0x10);
0119 mipi_dbi_command(dbi, ST7735R_GAMCTRN1, 0x03, 0x1d, 0x07, 0x06, 0x2e,
0120 0x2c, 0x29, 0x2d, 0x2e, 0x2e, 0x37, 0x3f, 0x00, 0x00,
0121 0x02, 0x10);
0122 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
0123
0124 msleep(100);
0125
0126 mipi_dbi_command(dbi, MIPI_DCS_ENTER_NORMAL_MODE);
0127
0128 msleep(20);
0129
0130 mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
0131 out_exit:
0132 drm_dev_exit(idx);
0133 }
0134
0135 static const struct drm_simple_display_pipe_funcs st7735r_pipe_funcs = {
0136 .enable = st7735r_pipe_enable,
0137 .disable = mipi_dbi_pipe_disable,
0138 .update = mipi_dbi_pipe_update,
0139 };
0140
0141 static const struct st7735r_cfg jd_t18003_t01_cfg = {
0142 .mode = { DRM_SIMPLE_MODE(128, 160, 28, 35) },
0143
0144 .write_only = true,
0145 };
0146
0147 static const struct st7735r_cfg rh128128t_cfg = {
0148 .mode = { DRM_SIMPLE_MODE(128, 128, 25, 26) },
0149 .left_offset = 2,
0150 .top_offset = 3,
0151 .rgb = true,
0152 };
0153
0154 DEFINE_DRM_GEM_CMA_FOPS(st7735r_fops);
0155
0156 static const struct drm_driver st7735r_driver = {
0157 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
0158 .fops = &st7735r_fops,
0159 DRM_GEM_CMA_DRIVER_OPS_VMAP,
0160 .debugfs_init = mipi_dbi_debugfs_init,
0161 .name = "st7735r",
0162 .desc = "Sitronix ST7735R",
0163 .date = "20171128",
0164 .major = 1,
0165 .minor = 0,
0166 };
0167
0168 static const struct of_device_id st7735r_of_match[] = {
0169 { .compatible = "jianda,jd-t18003-t01", .data = &jd_t18003_t01_cfg },
0170 { .compatible = "okaya,rh128128t", .data = &rh128128t_cfg },
0171 { },
0172 };
0173 MODULE_DEVICE_TABLE(of, st7735r_of_match);
0174
0175 static const struct spi_device_id st7735r_id[] = {
0176 { "jd-t18003-t01", (uintptr_t)&jd_t18003_t01_cfg },
0177 { "rh128128t", (uintptr_t)&rh128128t_cfg },
0178 { },
0179 };
0180 MODULE_DEVICE_TABLE(spi, st7735r_id);
0181
0182 static int st7735r_probe(struct spi_device *spi)
0183 {
0184 struct device *dev = &spi->dev;
0185 const struct st7735r_cfg *cfg;
0186 struct mipi_dbi_dev *dbidev;
0187 struct st7735r_priv *priv;
0188 struct drm_device *drm;
0189 struct mipi_dbi *dbi;
0190 struct gpio_desc *dc;
0191 u32 rotation = 0;
0192 int ret;
0193
0194 cfg = device_get_match_data(&spi->dev);
0195 if (!cfg)
0196 cfg = (void *)spi_get_device_id(spi)->driver_data;
0197
0198 priv = devm_drm_dev_alloc(dev, &st7735r_driver,
0199 struct st7735r_priv, dbidev.drm);
0200 if (IS_ERR(priv))
0201 return PTR_ERR(priv);
0202
0203 dbidev = &priv->dbidev;
0204 priv->cfg = cfg;
0205
0206 dbi = &dbidev->dbi;
0207 drm = &dbidev->drm;
0208
0209 dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
0210 if (IS_ERR(dbi->reset))
0211 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
0212
0213 dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
0214 if (IS_ERR(dc))
0215 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
0216
0217 dbidev->backlight = devm_of_find_backlight(dev);
0218 if (IS_ERR(dbidev->backlight))
0219 return PTR_ERR(dbidev->backlight);
0220
0221 device_property_read_u32(dev, "rotation", &rotation);
0222
0223 ret = mipi_dbi_spi_init(spi, dbi, dc);
0224 if (ret)
0225 return ret;
0226
0227 if (cfg->write_only)
0228 dbi->read_commands = NULL;
0229
0230 dbidev->left_offset = cfg->left_offset;
0231 dbidev->top_offset = cfg->top_offset;
0232
0233 ret = mipi_dbi_dev_init(dbidev, &st7735r_pipe_funcs, &cfg->mode,
0234 rotation);
0235 if (ret)
0236 return ret;
0237
0238 drm_mode_config_reset(drm);
0239
0240 ret = drm_dev_register(drm, 0);
0241 if (ret)
0242 return ret;
0243
0244 spi_set_drvdata(spi, drm);
0245
0246 drm_fbdev_generic_setup(drm, 0);
0247
0248 return 0;
0249 }
0250
0251 static void st7735r_remove(struct spi_device *spi)
0252 {
0253 struct drm_device *drm = spi_get_drvdata(spi);
0254
0255 drm_dev_unplug(drm);
0256 drm_atomic_helper_shutdown(drm);
0257 }
0258
0259 static void st7735r_shutdown(struct spi_device *spi)
0260 {
0261 drm_atomic_helper_shutdown(spi_get_drvdata(spi));
0262 }
0263
0264 static struct spi_driver st7735r_spi_driver = {
0265 .driver = {
0266 .name = "st7735r",
0267 .of_match_table = st7735r_of_match,
0268 },
0269 .id_table = st7735r_id,
0270 .probe = st7735r_probe,
0271 .remove = st7735r_remove,
0272 .shutdown = st7735r_shutdown,
0273 };
0274 module_spi_driver(st7735r_spi_driver);
0275
0276 MODULE_DESCRIPTION("Sitronix ST7735R DRM driver");
0277 MODULE_AUTHOR("David Lechner <david@lechnology.com>");
0278 MODULE_LICENSE("GPL");