drm/tidss/tidss_plane.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
0004  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
0005  */
0006
0007 #include <drm/drm_atomic.h>
0008 #include <drm/drm_atomic_helper.h>
0009 #include <drm/drm_blend.h>
0010 #include <drm/drm_crtc.h>
0011 #include <drm/drm_crtc_helper.h>
0012 #include <drm/drm_fourcc.h>
0013 #include <drm/drm_framebuffer.h>
0014 #include <drm/drm_fb_cma_helper.h>
0015 #include <drm/drm_gem_atomic_helper.h>
0016
0017 #include "tidss_crtc.h"
0018 #include "tidss_dispc.h"
0019 #include "tidss_drv.h"
0020 #include "tidss_plane.h"
0021
0022 /* drm_plane_helper_funcs */
0023
0024 static int tidss_plane_atomic_check(struct drm_plane *plane,
0025                     struct drm_atomic_state *state)
0026 {
0027     struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
0028                                          plane);
0029     struct drm_device *ddev = plane->dev;
0030     struct tidss_device *tidss = to_tidss(ddev);
0031     struct tidss_plane *tplane = to_tidss_plane(plane);
0032     const struct drm_format_info *finfo;
0033     struct drm_crtc_state *crtc_state;
0034     u32 hw_plane = tplane->hw_plane_id;
0035     u32 hw_videoport;
0036     int ret;
0037
0038     dev_dbg(ddev->dev, "%s\n", __func__);
0039
0040     if (!new_plane_state->crtc) {
0041         /*
0042          * The visible field is not reset by the DRM core but only
0043          * updated by drm_plane_helper_check_state(), set it manually.
0044          */
0045         new_plane_state->visible = false;
0046         return 0;
0047     }
0048
0049     crtc_state = drm_atomic_get_crtc_state(state,
0050                            new_plane_state->crtc);
0051     if (IS_ERR(crtc_state))
0052         return PTR_ERR(crtc_state);
0053
0054     ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
0055                           0,
0056                           INT_MAX, true, true);
0057     if (ret < 0)
0058         return ret;
0059
0060     /*
0061      * The HW is only able to start drawing at subpixel boundary
0062      * (the two first checks bellow). At the end of a row the HW
0063      * can only jump integer number of subpixels forward to the
0064      * beginning of the next row. So we can only show picture with
0065      * integer subpixel width (the third check). However, after
0066      * reaching the end of the drawn picture the drawing starts
0067      * again at the absolute memory address where top left corner
0068      * position of the drawn picture is (so there is no need to
0069      * check for odd height).
0070      */
0071
0072     finfo = drm_format_info(new_plane_state->fb->format->format);
0073
0074     if ((new_plane_state->src_x >> 16) % finfo->hsub != 0) {
0075         dev_dbg(ddev->dev,
0076             "%s: x-position %u not divisible subpixel size %u\n",
0077             __func__, (new_plane_state->src_x >> 16), finfo->hsub);
0078         return -EINVAL;
0079     }
0080
0081     if ((new_plane_state->src_y >> 16) % finfo->vsub != 0) {
0082         dev_dbg(ddev->dev,
0083             "%s: y-position %u not divisible subpixel size %u\n",
0084             __func__, (new_plane_state->src_y >> 16), finfo->vsub);
0085         return -EINVAL;
0086     }
0087
0088     if ((new_plane_state->src_w >> 16) % finfo->hsub != 0) {
0089         dev_dbg(ddev->dev,
0090             "%s: src width %u not divisible by subpixel size %u\n",
0091              __func__, (new_plane_state->src_w >> 16),
0092              finfo->hsub);
0093         return -EINVAL;
0094     }
0095
0096     if (!new_plane_state->visible)
0097         return 0;
0098
0099     hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport;
0100
0101     ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state,
0102                 hw_videoport);
0103     if (ret)
0104         return ret;
0105
0106     return 0;
0107 }
0108
0109 static void tidss_plane_atomic_update(struct drm_plane *plane,
0110                       struct drm_atomic_state *state)
0111 {
0112     struct drm_device *ddev = plane->dev;
0113     struct tidss_device *tidss = to_tidss(ddev);
0114     struct tidss_plane *tplane = to_tidss_plane(plane);
0115     struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
0116                                        plane);
0117     u32 hw_videoport;
0118     int ret;
0119
0120     dev_dbg(ddev->dev, "%s\n", __func__);
0121
0122     if (!new_state->visible) {
0123         dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
0124         return;
0125     }
0126
0127     hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport;
0128
0129     ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
0130                 new_state, hw_videoport);
0131
0132     if (ret) {
0133         dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
0134             __func__, tplane->hw_plane_id);
0135         dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
0136         return;
0137     }
0138
0139     dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
0140 }
0141
0142 static void tidss_plane_atomic_disable(struct drm_plane *plane,
0143                        struct drm_atomic_state *state)
0144 {
0145     struct drm_device *ddev = plane->dev;
0146     struct tidss_device *tidss = to_tidss(ddev);
0147     struct tidss_plane *tplane = to_tidss_plane(plane);
0148
0149     dev_dbg(ddev->dev, "%s\n", __func__);
0150
0151     dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
0152 }
0153
0154 static void drm_plane_destroy(struct drm_plane *plane)
0155 {
0156     struct tidss_plane *tplane = to_tidss_plane(plane);
0157
0158     drm_plane_cleanup(plane);
0159     kfree(tplane);
0160 }
0161
0162 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
0163     .atomic_check = tidss_plane_atomic_check,
0164     .atomic_update = tidss_plane_atomic_update,
0165     .atomic_disable = tidss_plane_atomic_disable,
0166 };
0167
0168 static const struct drm_plane_funcs tidss_plane_funcs = {
0169     .update_plane = drm_atomic_helper_update_plane,
0170     .disable_plane = drm_atomic_helper_disable_plane,
0171     .reset = drm_atomic_helper_plane_reset,
0172     .destroy = drm_plane_destroy,
0173     .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
0174     .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
0175 };
0176
0177 struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
0178                        u32 hw_plane_id, u32 plane_type,
0179                        u32 crtc_mask, const u32 *formats,
0180                        u32 num_formats)
0181 {
0182     struct tidss_plane *tplane;
0183     enum drm_plane_type type;
0184     u32 possible_crtcs;
0185     u32 num_planes = tidss->feat->num_planes;
0186     u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
0187                    BIT(DRM_COLOR_YCBCR_BT709));
0188     u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
0189                 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
0190     u32 default_encoding = DRM_COLOR_YCBCR_BT601;
0191     u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
0192     u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
0193                BIT(DRM_MODE_BLEND_COVERAGE));
0194     int ret;
0195
0196     tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
0197     if (!tplane)
0198         return ERR_PTR(-ENOMEM);
0199
0200     tplane->hw_plane_id = hw_plane_id;
0201
0202     possible_crtcs = crtc_mask;
0203     type = plane_type;
0204
0205     ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
0206                        possible_crtcs,
0207                        &tidss_plane_funcs,
0208                        formats, num_formats,
0209                        NULL, type, NULL);
0210     if (ret < 0)
0211         goto err;
0212
0213     drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
0214
0215     drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
0216                        num_planes - 1);
0217
0218     ret = drm_plane_create_color_properties(&tplane->plane,
0219                         color_encodings,
0220                         color_ranges,
0221                         default_encoding,
0222                         default_range);
0223     if (ret)
0224         goto err;
0225
0226     ret = drm_plane_create_alpha_property(&tplane->plane);
0227     if (ret)
0228         goto err;
0229
0230     ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
0231     if (ret)
0232         goto err;
0233
0234     return tplane;
0235
0236 err:
0237     kfree(tplane);
0238     return ERR_PTR(ret);
0239 }