drm/tidss/tidss_irq.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
0004  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
0005  */
0006
0007 #ifndef __TIDSS_IRQ_H__
0008 #define __TIDSS_IRQ_H__
0009
0010 #include <linux/types.h>
0011
0012 #include "tidss_drv.h"
0013
0014 /*
0015  * The IRQ status from various DISPC IRQ registers are packed into a single
0016  * value, where the bits are defined as follows:
0017  *
0018  * bit group |dev|wb |mrg0|mrg1|mrg2|mrg3|plane0-3| <unused> |
0019  * bit use   |D  |fou|FEOL|FEOL|FEOL|FEOL|  UUUU  |          |
0020  * bit number|0  |1-3|4-7 |8-11|  12-19  | 20-23  |  24-31   |
0021  *
0022  * device bits: D = OCP error
0023  * WB bits: f = frame done wb, o = wb buffer overflow,
0024  *      u = wb buffer uncomplete
0025  * vp bits: F = frame done, E = vsync even, O = vsync odd, L = sync lost
0026  * plane bits:  U = fifo underflow
0027  */
0028
0029 #define DSS_IRQ_DEVICE_OCP_ERR          BIT(0)
0030
0031 #define DSS_IRQ_DEVICE_FRAMEDONEWB      BIT(1)
0032 #define DSS_IRQ_DEVICE_WBBUFFEROVERFLOW     BIT(2)
0033 #define DSS_IRQ_DEVICE_WBUNCOMPLETEERROR    BIT(3)
0034 #define DSS_IRQ_DEVICE_WB_MASK          GENMASK(3, 1)
0035
0036 #define DSS_IRQ_VP_BIT_N(ch, bit)   (4 + 4 * (ch) + (bit))
0037 #define DSS_IRQ_PLANE_BIT_N(plane, bit) \
0038     (DSS_IRQ_VP_BIT_N(TIDSS_MAX_PORTS, 0) + 1 * (plane) + (bit))
0039
0040 #define DSS_IRQ_VP_BIT(ch, bit) BIT(DSS_IRQ_VP_BIT_N((ch), (bit)))
0041 #define DSS_IRQ_PLANE_BIT(plane, bit) \
0042     BIT(DSS_IRQ_PLANE_BIT_N((plane), (bit)))
0043
0044 static inline dispc_irq_t DSS_IRQ_VP_MASK(u32 ch)
0045 {
0046     return GENMASK(DSS_IRQ_VP_BIT_N((ch), 3), DSS_IRQ_VP_BIT_N((ch), 0));
0047 }
0048
0049 static inline dispc_irq_t DSS_IRQ_PLANE_MASK(u32 plane)
0050 {
0051     return GENMASK(DSS_IRQ_PLANE_BIT_N((plane), 0),
0052                DSS_IRQ_PLANE_BIT_N((plane), 0));
0053 }
0054
0055 #define DSS_IRQ_VP_FRAME_DONE(ch)   DSS_IRQ_VP_BIT((ch), 0)
0056 #define DSS_IRQ_VP_VSYNC_EVEN(ch)   DSS_IRQ_VP_BIT((ch), 1)
0057 #define DSS_IRQ_VP_VSYNC_ODD(ch)    DSS_IRQ_VP_BIT((ch), 2)
0058 #define DSS_IRQ_VP_SYNC_LOST(ch)    DSS_IRQ_VP_BIT((ch), 3)
0059
0060 #define DSS_IRQ_PLANE_FIFO_UNDERFLOW(plane) DSS_IRQ_PLANE_BIT((plane), 0)
0061
0062 struct drm_crtc;
0063 struct drm_device;
0064
0065 struct tidss_device;
0066
0067 void tidss_irq_enable_vblank(struct drm_crtc *crtc);
0068 void tidss_irq_disable_vblank(struct drm_crtc *crtc);
0069
0070 int tidss_irq_install(struct drm_device *ddev, unsigned int irq);
0071 void tidss_irq_uninstall(struct drm_device *ddev);
0072
0073 void tidss_irq_resume(struct tidss_device *tidss);
0074
0075 #endif