drm/sun4i/sun8i_csc.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
0004  */
0005
0006 #include <drm/drm_print.h>
0007
0008 #include "sun8i_csc.h"
0009 #include "sun8i_mixer.h"
0010
0011 static const u32 ccsc_base[][2] = {
0012     [CCSC_MIXER0_LAYOUT]    = {CCSC00_OFFSET, CCSC01_OFFSET},
0013     [CCSC_MIXER1_LAYOUT]    = {CCSC10_OFFSET, CCSC11_OFFSET},
0014     [CCSC_D1_MIXER0_LAYOUT] = {CCSC00_OFFSET, CCSC01_D1_OFFSET},
0015 };
0016
0017 /*
0018  * Factors are in two's complement format, 10 bits for fractinal part.
0019  * First tree values in each line are multiplication factor and last
0020  * value is constant, which is added at the end.
0021  */
0022
0023 static const u32 yuv2rgb[2][2][12] = {
0024     [DRM_COLOR_YCBCR_LIMITED_RANGE] = {
0025         [DRM_COLOR_YCBCR_BT601] = {
0026             0x000004A8, 0x00000000, 0x00000662, 0xFFFC8451,
0027             0x000004A8, 0xFFFFFE6F, 0xFFFFFCC0, 0x00021E4D,
0028             0x000004A8, 0x00000811, 0x00000000, 0xFFFBACA9,
0029         },
0030         [DRM_COLOR_YCBCR_BT709] = {
0031             0x000004A8, 0x00000000, 0x0000072B, 0xFFFC1F99,
0032             0x000004A8, 0xFFFFFF26, 0xFFFFFDDF, 0x00013383,
0033             0x000004A8, 0x00000873, 0x00000000, 0xFFFB7BEF,
0034         }
0035     },
0036     [DRM_COLOR_YCBCR_FULL_RANGE] = {
0037         [DRM_COLOR_YCBCR_BT601] = {
0038             0x00000400, 0x00000000, 0x0000059B, 0xFFFD322E,
0039             0x00000400, 0xFFFFFEA0, 0xFFFFFD25, 0x00021DD5,
0040             0x00000400, 0x00000716, 0x00000000, 0xFFFC74BD,
0041         },
0042         [DRM_COLOR_YCBCR_BT709] = {
0043             0x00000400, 0x00000000, 0x0000064C, 0xFFFCD9B4,
0044             0x00000400, 0xFFFFFF41, 0xFFFFFE21, 0x00014F96,
0045             0x00000400, 0x0000076C, 0x00000000, 0xFFFC49EF,
0046         }
0047     },
0048 };
0049
0050 /*
0051  * DE3 has a bit different CSC units. Factors are in two's complement format.
0052  * First three factors in a row are multiplication factors which have 17 bits
0053  * for fractional part. Fourth value in a row is comprised of two factors.
0054  * Upper 16 bits represents difference, which is subtracted from the input
0055  * value before multiplication and lower 16 bits represents constant, which
0056  * is addes at the end.
0057  *
0058  * x' = c00 * (x + d0) + c01 * (y + d1) + c02 * (z + d2) + const0
0059  * y' = c10 * (x + d0) + c11 * (y + d1) + c12 * (z + d2) + const1
0060  * z' = c20 * (x + d0) + c21 * (y + d1) + c22 * (z + d2) + const2
0061  *
0062  * Please note that above formula is true only for Blender CSC. Other DE3 CSC
0063  * units takes only positive value for difference. From what can be deducted
0064  * from BSP driver code, those units probably automatically assume that
0065  * difference has to be subtracted.
0066  *
0067  * Layout of factors in table:
0068  * c00 c01 c02 [d0 const0]
0069  * c10 c11 c12 [d1 const1]
0070  * c20 c21 c22 [d2 const2]
0071  */
0072
0073 static const u32 yuv2rgb_de3[2][3][12] = {
0074     [DRM_COLOR_YCBCR_LIMITED_RANGE] = {
0075         [DRM_COLOR_YCBCR_BT601] = {
0076             0x0002542A, 0x00000000, 0x0003312A, 0xFFC00000,
0077             0x0002542A, 0xFFFF376B, 0xFFFE5FC3, 0xFE000000,
0078             0x0002542A, 0x000408D2, 0x00000000, 0xFE000000,
0079         },
0080         [DRM_COLOR_YCBCR_BT709] = {
0081             0x0002542A, 0x00000000, 0x000395E2, 0xFFC00000,
0082             0x0002542A, 0xFFFF92D2, 0xFFFEEF27, 0xFE000000,
0083             0x0002542A, 0x0004398C, 0x00000000, 0xFE000000,
0084         },
0085         [DRM_COLOR_YCBCR_BT2020] = {
0086             0x0002542A, 0x00000000, 0x00035B7B, 0xFFC00000,
0087             0x0002542A, 0xFFFFA017, 0xFFFEB2FC, 0xFE000000,
0088             0x0002542A, 0x00044896, 0x00000000, 0xFE000000,
0089         }
0090     },
0091     [DRM_COLOR_YCBCR_FULL_RANGE] = {
0092         [DRM_COLOR_YCBCR_BT601] = {
0093             0x00020000, 0x00000000, 0x0002CDD2, 0x00000000,
0094             0x00020000, 0xFFFF4FCE, 0xFFFE925D, 0xFE000000,
0095             0x00020000, 0x00038B43, 0x00000000, 0xFE000000,
0096         },
0097         [DRM_COLOR_YCBCR_BT709] = {
0098             0x00020000, 0x00000000, 0x0003264C, 0x00000000,
0099             0x00020000, 0xFFFFA018, 0xFFFF1053, 0xFE000000,
0100             0x00020000, 0x0003B611, 0x00000000, 0xFE000000,
0101         },
0102         [DRM_COLOR_YCBCR_BT2020] = {
0103             0x00020000, 0x00000000, 0x0002F2FE, 0x00000000,
0104             0x00020000, 0xFFFFABC0, 0xFFFEDB78, 0xFE000000,
0105             0x00020000, 0x0003C346, 0x00000000, 0xFE000000,
0106         }
0107     },
0108 };
0109
0110 static void sun8i_csc_set_coefficients(struct regmap *map, u32 base,
0111                        enum sun8i_csc_mode mode,
0112                        enum drm_color_encoding encoding,
0113                        enum drm_color_range range)
0114 {
0115     const u32 *table;
0116     u32 base_reg;
0117     int i;
0118
0119     table = yuv2rgb[range][encoding];
0120
0121     switch (mode) {
0122     case SUN8I_CSC_MODE_YUV2RGB:
0123         base_reg = SUN8I_CSC_COEFF(base, 0);
0124         regmap_bulk_write(map, base_reg, table, 12);
0125         break;
0126     case SUN8I_CSC_MODE_YVU2RGB:
0127         for (i = 0; i < 12; i++) {
0128             if ((i & 3) == 1)
0129                 base_reg = SUN8I_CSC_COEFF(base, i + 1);
0130             else if ((i & 3) == 2)
0131                 base_reg = SUN8I_CSC_COEFF(base, i - 1);
0132             else
0133                 base_reg = SUN8I_CSC_COEFF(base, i);
0134             regmap_write(map, base_reg, table[i]);
0135         }
0136         break;
0137     default:
0138         DRM_WARN("Wrong CSC mode specified.\n");
0139         return;
0140     }
0141 }
0142
0143 static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer,
0144                         enum sun8i_csc_mode mode,
0145                         enum drm_color_encoding encoding,
0146                         enum drm_color_range range)
0147 {
0148     const u32 *table;
0149     u32 addr;
0150     int i;
0151
0152     table = yuv2rgb_de3[range][encoding];
0153
0154     switch (mode) {
0155     case SUN8I_CSC_MODE_YUV2RGB:
0156         addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0);
0157         regmap_bulk_write(map, addr, table, 12);
0158         break;
0159     case SUN8I_CSC_MODE_YVU2RGB:
0160         for (i = 0; i < 12; i++) {
0161             if ((i & 3) == 1)
0162                 addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
0163                                     layer,
0164                                     i + 1);
0165             else if ((i & 3) == 2)
0166                 addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
0167                                     layer,
0168                                     i - 1);
0169             else
0170                 addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE,
0171                                     layer, i);
0172             regmap_write(map, addr, table[i]);
0173         }
0174         break;
0175     default:
0176         DRM_WARN("Wrong CSC mode specified.\n");
0177         return;
0178     }
0179 }
0180
0181 static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable)
0182 {
0183     u32 val;
0184
0185     if (enable)
0186         val = SUN8I_CSC_CTRL_EN;
0187     else
0188         val = 0;
0189
0190     regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val);
0191 }
0192
0193 static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable)
0194 {
0195     u32 val, mask;
0196
0197     mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer);
0198
0199     if (enable)
0200         val = mask;
0201     else
0202         val = 0;
0203
0204     regmap_update_bits(map, SUN50I_MIXER_BLEND_CSC_CTL(DE3_BLD_BASE),
0205                mask, val);
0206 }
0207
0208 void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
0209                      enum sun8i_csc_mode mode,
0210                      enum drm_color_encoding encoding,
0211                      enum drm_color_range range)
0212 {
0213     u32 base;
0214
0215     if (mixer->cfg->is_de3) {
0216         sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer,
0217                         mode, encoding, range);
0218         return;
0219     }
0220
0221     base = ccsc_base[mixer->cfg->ccsc][layer];
0222
0223     sun8i_csc_set_coefficients(mixer->engine.regs, base,
0224                    mode, encoding, range);
0225 }
0226
0227 void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable)
0228 {
0229     u32 base;
0230
0231     if (mixer->cfg->is_de3) {
0232         sun8i_de3_ccsc_enable(mixer->engine.regs, layer, enable);
0233         return;
0234     }
0235
0236     base = ccsc_base[mixer->cfg->ccsc][layer];
0237
0238     sun8i_csc_enable(mixer->engine.regs, base, enable);
0239 }