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0008
0009 #include <linux/clk.h>
0010 #include <linux/component.h>
0011 #include <linux/io.h>
0012 #include <linux/module.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/reset.h>
0016 #include <linux/seq_file.h>
0017
0018 #include <drm/drm_atomic_helper.h>
0019 #include <drm/drm_debugfs.h>
0020 #include <drm/drm_device.h>
0021 #include <drm/drm_file.h>
0022 #include <drm/drm_print.h>
0023
0024 #include "sti_crtc.h"
0025 #include "sti_drv.h"
0026 #include "sti_vtg.h"
0027
0028
0029 #define TVO_CSC_MAIN_M0 0x000
0030 #define TVO_CSC_MAIN_M1 0x004
0031 #define TVO_CSC_MAIN_M2 0x008
0032 #define TVO_CSC_MAIN_M3 0x00c
0033 #define TVO_CSC_MAIN_M4 0x010
0034 #define TVO_CSC_MAIN_M5 0x014
0035 #define TVO_CSC_MAIN_M6 0x018
0036 #define TVO_CSC_MAIN_M7 0x01c
0037 #define TVO_MAIN_IN_VID_FORMAT 0x030
0038 #define TVO_CSC_AUX_M0 0x100
0039 #define TVO_CSC_AUX_M1 0x104
0040 #define TVO_CSC_AUX_M2 0x108
0041 #define TVO_CSC_AUX_M3 0x10c
0042 #define TVO_CSC_AUX_M4 0x110
0043 #define TVO_CSC_AUX_M5 0x114
0044 #define TVO_CSC_AUX_M6 0x118
0045 #define TVO_CSC_AUX_M7 0x11c
0046 #define TVO_AUX_IN_VID_FORMAT 0x130
0047 #define TVO_VIP_HDF 0x400
0048 #define TVO_HD_SYNC_SEL 0x418
0049 #define TVO_HD_DAC_CFG_OFF 0x420
0050 #define TVO_VIP_HDMI 0x500
0051 #define TVO_HDMI_FORCE_COLOR_0 0x504
0052 #define TVO_HDMI_FORCE_COLOR_1 0x508
0053 #define TVO_HDMI_CLIP_VALUE_B_CB 0x50c
0054 #define TVO_HDMI_CLIP_VALUE_Y_G 0x510
0055 #define TVO_HDMI_CLIP_VALUE_R_CR 0x514
0056 #define TVO_HDMI_SYNC_SEL 0x518
0057 #define TVO_HDMI_DFV_OBS 0x540
0058 #define TVO_VIP_DVO 0x600
0059 #define TVO_DVO_SYNC_SEL 0x618
0060 #define TVO_DVO_CONFIG 0x620
0061
0062 #define TVO_IN_FMT_SIGNED BIT(0)
0063 #define TVO_SYNC_EXT BIT(4)
0064
0065 #define TVO_VIP_REORDER_R_SHIFT 24
0066 #define TVO_VIP_REORDER_G_SHIFT 20
0067 #define TVO_VIP_REORDER_B_SHIFT 16
0068 #define TVO_VIP_REORDER_MASK 0x3
0069 #define TVO_VIP_REORDER_Y_G_SEL 0
0070 #define TVO_VIP_REORDER_CB_B_SEL 1
0071 #define TVO_VIP_REORDER_CR_R_SEL 2
0072
0073 #define TVO_VIP_CLIP_SHIFT 8
0074 #define TVO_VIP_CLIP_MASK 0x7
0075 #define TVO_VIP_CLIP_DISABLED 0
0076 #define TVO_VIP_CLIP_EAV_SAV 1
0077 #define TVO_VIP_CLIP_LIMITED_RANGE_RGB_Y 2
0078 #define TVO_VIP_CLIP_LIMITED_RANGE_CB_CR 3
0079 #define TVO_VIP_CLIP_PROG_RANGE 4
0080
0081 #define TVO_VIP_RND_SHIFT 4
0082 #define TVO_VIP_RND_MASK 0x3
0083 #define TVO_VIP_RND_8BIT_ROUNDED 0
0084 #define TVO_VIP_RND_10BIT_ROUNDED 1
0085 #define TVO_VIP_RND_12BIT_ROUNDED 2
0086
0087 #define TVO_VIP_SEL_INPUT_MASK 0xf
0088 #define TVO_VIP_SEL_INPUT_MAIN 0x0
0089 #define TVO_VIP_SEL_INPUT_AUX 0x8
0090 #define TVO_VIP_SEL_INPUT_FORCE_COLOR 0xf
0091 #define TVO_VIP_SEL_INPUT_BYPASS_MASK 0x1
0092 #define TVO_VIP_SEL_INPUT_BYPASSED 1
0093
0094 #define TVO_SYNC_MAIN_VTG_SET_REF 0x00
0095 #define TVO_SYNC_AUX_VTG_SET_REF 0x10
0096
0097 #define TVO_SYNC_HD_DCS_SHIFT 8
0098
0099 #define TVO_SYNC_DVO_PAD_HSYNC_SHIFT 8
0100 #define TVO_SYNC_DVO_PAD_VSYNC_SHIFT 16
0101
0102 #define ENCODER_CRTC_MASK (BIT(0) | BIT(1))
0103
0104 #define TVO_MIN_HD_HEIGHT 720
0105
0106
0107 enum sti_tvout_video_out_type {
0108 STI_TVOUT_VIDEO_OUT_RGB,
0109 STI_TVOUT_VIDEO_OUT_YUV,
0110 };
0111
0112 struct sti_tvout {
0113 struct device *dev;
0114 struct drm_device *drm_dev;
0115 void __iomem *regs;
0116 struct reset_control *reset;
0117 struct drm_encoder *hdmi;
0118 struct drm_encoder *hda;
0119 struct drm_encoder *dvo;
0120 bool debugfs_registered;
0121 };
0122
0123 struct sti_tvout_encoder {
0124 struct drm_encoder encoder;
0125 struct sti_tvout *tvout;
0126 };
0127
0128 #define to_sti_tvout_encoder(x) \
0129 container_of(x, struct sti_tvout_encoder, encoder)
0130
0131 #define to_sti_tvout(x) to_sti_tvout_encoder(x)->tvout
0132
0133
0134 static const u32 rgb_to_ycbcr_601[8] = {
0135 0xF927082E, 0x04C9FEAB, 0x01D30964, 0xFA95FD3D,
0136 0x0000082E, 0x00002000, 0x00002000, 0x00000000
0137 };
0138
0139
0140 static const u32 rgb_to_ycbcr_709[8] = {
0141 0xF891082F, 0x0367FF40, 0x01280B71, 0xF9B1FE20,
0142 0x0000082F, 0x00002000, 0x00002000, 0x00000000
0143 };
0144
0145 static u32 tvout_read(struct sti_tvout *tvout, int offset)
0146 {
0147 return readl(tvout->regs + offset);
0148 }
0149
0150 static void tvout_write(struct sti_tvout *tvout, u32 val, int offset)
0151 {
0152 writel(val, tvout->regs + offset);
0153 }
0154
0155
0156
0157
0158
0159
0160
0161
0162
0163
0164 static void tvout_vip_set_color_order(struct sti_tvout *tvout, int reg,
0165 u32 cr_r, u32 y_g, u32 cb_b)
0166 {
0167 u32 val = tvout_read(tvout, reg);
0168
0169 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT);
0170 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT);
0171 val &= ~(TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT);
0172 val |= cr_r << TVO_VIP_REORDER_R_SHIFT;
0173 val |= y_g << TVO_VIP_REORDER_G_SHIFT;
0174 val |= cb_b << TVO_VIP_REORDER_B_SHIFT;
0175
0176 tvout_write(tvout, val, reg);
0177 }
0178
0179
0180
0181
0182
0183
0184
0185
0186 static void tvout_vip_set_clip_mode(struct sti_tvout *tvout, int reg, u32 range)
0187 {
0188 u32 val = tvout_read(tvout, reg);
0189
0190 val &= ~(TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT);
0191 val |= range << TVO_VIP_CLIP_SHIFT;
0192 tvout_write(tvout, val, reg);
0193 }
0194
0195
0196
0197
0198
0199
0200
0201
0202 static void tvout_vip_set_rnd(struct sti_tvout *tvout, int reg, u32 rnd)
0203 {
0204 u32 val = tvout_read(tvout, reg);
0205
0206 val &= ~(TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT);
0207 val |= rnd << TVO_VIP_RND_SHIFT;
0208 tvout_write(tvout, val, reg);
0209 }
0210
0211
0212
0213
0214
0215
0216
0217
0218
0219 static void tvout_vip_set_sel_input(struct sti_tvout *tvout,
0220 int reg,
0221 bool main_path,
0222 enum sti_tvout_video_out_type video_out)
0223 {
0224 u32 sel_input;
0225 u32 val = tvout_read(tvout, reg);
0226
0227 if (main_path)
0228 sel_input = TVO_VIP_SEL_INPUT_MAIN;
0229 else
0230 sel_input = TVO_VIP_SEL_INPUT_AUX;
0231
0232 switch (video_out) {
0233 case STI_TVOUT_VIDEO_OUT_RGB:
0234 sel_input |= TVO_VIP_SEL_INPUT_BYPASSED;
0235 break;
0236 case STI_TVOUT_VIDEO_OUT_YUV:
0237 sel_input &= ~TVO_VIP_SEL_INPUT_BYPASSED;
0238 break;
0239 }
0240
0241
0242 sel_input = sel_input ^ TVO_VIP_SEL_INPUT_BYPASS_MASK;
0243
0244 val &= ~TVO_VIP_SEL_INPUT_MASK;
0245 val |= sel_input;
0246 tvout_write(tvout, val, reg);
0247 }
0248
0249
0250
0251
0252
0253
0254
0255
0256 static void tvout_vip_set_in_vid_fmt(struct sti_tvout *tvout,
0257 int reg, u32 in_vid_fmt)
0258 {
0259 u32 val = tvout_read(tvout, reg);
0260
0261 val &= ~TVO_IN_FMT_SIGNED;
0262 val |= in_vid_fmt;
0263 tvout_write(tvout, val, reg);
0264 }
0265
0266
0267
0268
0269
0270
0271
0272 static void tvout_preformatter_set_matrix(struct sti_tvout *tvout,
0273 struct drm_display_mode *mode)
0274 {
0275 unsigned int i;
0276 const u32 *pf_matrix;
0277
0278 if (mode->vdisplay >= TVO_MIN_HD_HEIGHT)
0279 pf_matrix = rgb_to_ycbcr_709;
0280 else
0281 pf_matrix = rgb_to_ycbcr_601;
0282
0283 for (i = 0; i < 8; i++) {
0284 tvout_write(tvout, *(pf_matrix + i),
0285 TVO_CSC_MAIN_M0 + (i * 4));
0286 tvout_write(tvout, *(pf_matrix + i),
0287 TVO_CSC_AUX_M0 + (i * 4));
0288 }
0289 }
0290
0291
0292
0293
0294
0295
0296
0297
0298 static void tvout_dvo_start(struct sti_tvout *tvout, bool main_path)
0299 {
0300 u32 tvo_in_vid_format;
0301 int val, tmp;
0302
0303 dev_dbg(tvout->dev, "%s\n", __func__);
0304
0305 if (main_path) {
0306 DRM_DEBUG_DRIVER("main vip for DVO\n");
0307
0308 tmp = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_DVO;
0309 val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
0310 val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
0311 val |= tmp;
0312 tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
0313 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
0314 } else {
0315 DRM_DEBUG_DRIVER("aux vip for DVO\n");
0316
0317 tmp = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_DVO;
0318 val = tmp << TVO_SYNC_DVO_PAD_VSYNC_SHIFT;
0319 val |= tmp << TVO_SYNC_DVO_PAD_HSYNC_SHIFT;
0320 val |= tmp;
0321 tvout_write(tvout, val, TVO_DVO_SYNC_SEL);
0322 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
0323 }
0324
0325
0326 tvout_vip_set_color_order(tvout, TVO_VIP_DVO,
0327 TVO_VIP_REORDER_CR_R_SEL,
0328 TVO_VIP_REORDER_Y_G_SEL,
0329 TVO_VIP_REORDER_CB_B_SEL);
0330
0331
0332 tvout_vip_set_clip_mode(tvout, TVO_VIP_DVO, TVO_VIP_CLIP_DISABLED);
0333
0334
0335 tvout_vip_set_rnd(tvout, TVO_VIP_DVO, TVO_VIP_RND_8BIT_ROUNDED);
0336
0337
0338 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
0339
0340
0341 tvout_vip_set_sel_input(tvout, TVO_VIP_DVO, main_path,
0342 STI_TVOUT_VIDEO_OUT_RGB);
0343 }
0344
0345
0346
0347
0348
0349
0350
0351
0352 static void tvout_hdmi_start(struct sti_tvout *tvout, bool main_path)
0353 {
0354 u32 tvo_in_vid_format;
0355
0356 dev_dbg(tvout->dev, "%s\n", __func__);
0357
0358 if (main_path) {
0359 DRM_DEBUG_DRIVER("main vip for hdmi\n");
0360
0361 tvout_write(tvout,
0362 TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDMI,
0363 TVO_HDMI_SYNC_SEL);
0364 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
0365 } else {
0366 DRM_DEBUG_DRIVER("aux vip for hdmi\n");
0367
0368 tvout_write(tvout,
0369 TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDMI,
0370 TVO_HDMI_SYNC_SEL);
0371 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
0372 }
0373
0374
0375 tvout_vip_set_color_order(tvout, TVO_VIP_HDMI,
0376 TVO_VIP_REORDER_CR_R_SEL,
0377 TVO_VIP_REORDER_Y_G_SEL,
0378 TVO_VIP_REORDER_CB_B_SEL);
0379
0380
0381 tvout_vip_set_clip_mode(tvout, TVO_VIP_HDMI, TVO_VIP_CLIP_DISABLED);
0382
0383
0384 tvout_vip_set_rnd(tvout, TVO_VIP_HDMI, TVO_VIP_RND_8BIT_ROUNDED);
0385
0386
0387 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
0388
0389
0390 tvout_vip_set_sel_input(tvout, TVO_VIP_HDMI, main_path,
0391 STI_TVOUT_VIDEO_OUT_RGB);
0392 }
0393
0394
0395
0396
0397
0398
0399
0400
0401 static void tvout_hda_start(struct sti_tvout *tvout, bool main_path)
0402 {
0403 u32 tvo_in_vid_format;
0404 int val;
0405
0406 dev_dbg(tvout->dev, "%s\n", __func__);
0407
0408 if (main_path) {
0409 DRM_DEBUG_DRIVER("main vip for HDF\n");
0410
0411 val = TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
0412 val = val << TVO_SYNC_HD_DCS_SHIFT;
0413 val |= TVO_SYNC_MAIN_VTG_SET_REF | VTG_SYNC_ID_HDF;
0414 tvout_write(tvout, val, TVO_HD_SYNC_SEL);
0415 tvo_in_vid_format = TVO_MAIN_IN_VID_FORMAT;
0416 } else {
0417 DRM_DEBUG_DRIVER("aux vip for HDF\n");
0418
0419 val = TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDDCS;
0420 val = val << TVO_SYNC_HD_DCS_SHIFT;
0421 val |= TVO_SYNC_AUX_VTG_SET_REF | VTG_SYNC_ID_HDF;
0422 tvout_write(tvout, val, TVO_HD_SYNC_SEL);
0423 tvo_in_vid_format = TVO_AUX_IN_VID_FORMAT;
0424 }
0425
0426
0427 tvout_vip_set_color_order(tvout, TVO_VIP_HDF,
0428 TVO_VIP_REORDER_CR_R_SEL,
0429 TVO_VIP_REORDER_Y_G_SEL,
0430 TVO_VIP_REORDER_CB_B_SEL);
0431
0432
0433 tvout_vip_set_clip_mode(tvout, TVO_VIP_HDF, TVO_VIP_CLIP_DISABLED);
0434
0435
0436 tvout_vip_set_rnd(tvout, TVO_VIP_HDF, TVO_VIP_RND_10BIT_ROUNDED);
0437
0438
0439 tvout_vip_set_in_vid_fmt(tvout, tvo_in_vid_format, TVO_IN_FMT_SIGNED);
0440
0441
0442 tvout_vip_set_sel_input(tvout, TVO_VIP_HDF, main_path,
0443 STI_TVOUT_VIDEO_OUT_YUV);
0444
0445
0446 tvout_write(tvout, 0, TVO_HD_DAC_CFG_OFF);
0447 }
0448
0449 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
0450 readl(tvout->regs + reg))
0451
0452 static void tvout_dbg_vip(struct seq_file *s, int val)
0453 {
0454 int r, g, b, tmp, mask;
0455 char *const reorder[] = {"Y_G", "Cb_B", "Cr_R"};
0456 char *const clipping[] = {"No", "EAV/SAV", "Limited range RGB/Y",
0457 "Limited range Cb/Cr", "decided by register"};
0458 char *const round[] = {"8-bit", "10-bit", "12-bit"};
0459 char *const input_sel[] = {"Main (color matrix enabled)",
0460 "Main (color matrix by-passed)",
0461 "", "", "", "", "", "",
0462 "Aux (color matrix enabled)",
0463 "Aux (color matrix by-passed)",
0464 "", "", "", "", "", "Force value"};
0465
0466 seq_putc(s, '\t');
0467 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_R_SHIFT;
0468 r = (val & mask) >> TVO_VIP_REORDER_R_SHIFT;
0469 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_G_SHIFT;
0470 g = (val & mask) >> TVO_VIP_REORDER_G_SHIFT;
0471 mask = TVO_VIP_REORDER_MASK << TVO_VIP_REORDER_B_SHIFT;
0472 b = (val & mask) >> TVO_VIP_REORDER_B_SHIFT;
0473 seq_printf(s, "%-24s %s->%s %s->%s %s->%s\n", "Reorder:",
0474 reorder[r], reorder[TVO_VIP_REORDER_CR_R_SEL],
0475 reorder[g], reorder[TVO_VIP_REORDER_Y_G_SEL],
0476 reorder[b], reorder[TVO_VIP_REORDER_CB_B_SEL]);
0477 seq_puts(s, "\t\t\t\t\t");
0478 mask = TVO_VIP_CLIP_MASK << TVO_VIP_CLIP_SHIFT;
0479 tmp = (val & mask) >> TVO_VIP_CLIP_SHIFT;
0480 seq_printf(s, "%-24s %s\n", "Clipping:", clipping[tmp]);
0481 seq_puts(s, "\t\t\t\t\t");
0482 mask = TVO_VIP_RND_MASK << TVO_VIP_RND_SHIFT;
0483 tmp = (val & mask) >> TVO_VIP_RND_SHIFT;
0484 seq_printf(s, "%-24s input data rounded to %s per component\n",
0485 "Round:", round[tmp]);
0486 seq_puts(s, "\t\t\t\t\t");
0487 tmp = (val & TVO_VIP_SEL_INPUT_MASK);
0488 seq_printf(s, "%-24s %s", "Input selection:", input_sel[tmp]);
0489 }
0490
0491 static void tvout_dbg_hd_dac_cfg(struct seq_file *s, int val)
0492 {
0493 seq_printf(s, "\t%-24s %s", "HD DAC:",
0494 val & 1 ? "disabled" : "enabled");
0495 }
0496
0497 static int tvout_dbg_show(struct seq_file *s, void *data)
0498 {
0499 struct drm_info_node *node = s->private;
0500 struct sti_tvout *tvout = (struct sti_tvout *)node->info_ent->data;
0501 struct drm_crtc *crtc;
0502
0503 seq_printf(s, "TVOUT: (vaddr = 0x%p)", tvout->regs);
0504
0505 seq_puts(s, "\n\n HDMI encoder: ");
0506 crtc = tvout->hdmi->crtc;
0507 if (crtc) {
0508 seq_printf(s, "connected to %s path",
0509 sti_crtc_is_main(crtc) ? "main" : "aux");
0510 DBGFS_DUMP(TVO_HDMI_SYNC_SEL);
0511 DBGFS_DUMP(TVO_VIP_HDMI);
0512 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDMI));
0513 } else {
0514 seq_puts(s, "disabled");
0515 }
0516
0517 seq_puts(s, "\n\n DVO encoder: ");
0518 crtc = tvout->dvo->crtc;
0519 if (crtc) {
0520 seq_printf(s, "connected to %s path",
0521 sti_crtc_is_main(crtc) ? "main" : "aux");
0522 DBGFS_DUMP(TVO_DVO_SYNC_SEL);
0523 DBGFS_DUMP(TVO_DVO_CONFIG);
0524 DBGFS_DUMP(TVO_VIP_DVO);
0525 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_DVO));
0526 } else {
0527 seq_puts(s, "disabled");
0528 }
0529
0530 seq_puts(s, "\n\n HDA encoder: ");
0531 crtc = tvout->hda->crtc;
0532 if (crtc) {
0533 seq_printf(s, "connected to %s path",
0534 sti_crtc_is_main(crtc) ? "main" : "aux");
0535 DBGFS_DUMP(TVO_HD_SYNC_SEL);
0536 DBGFS_DUMP(TVO_HD_DAC_CFG_OFF);
0537 tvout_dbg_hd_dac_cfg(s,
0538 readl(tvout->regs + TVO_HD_DAC_CFG_OFF));
0539 DBGFS_DUMP(TVO_VIP_HDF);
0540 tvout_dbg_vip(s, readl(tvout->regs + TVO_VIP_HDF));
0541 } else {
0542 seq_puts(s, "disabled");
0543 }
0544
0545 seq_puts(s, "\n\n main path configuration");
0546 DBGFS_DUMP(TVO_CSC_MAIN_M0);
0547 DBGFS_DUMP(TVO_CSC_MAIN_M1);
0548 DBGFS_DUMP(TVO_CSC_MAIN_M2);
0549 DBGFS_DUMP(TVO_CSC_MAIN_M3);
0550 DBGFS_DUMP(TVO_CSC_MAIN_M4);
0551 DBGFS_DUMP(TVO_CSC_MAIN_M5);
0552 DBGFS_DUMP(TVO_CSC_MAIN_M6);
0553 DBGFS_DUMP(TVO_CSC_MAIN_M7);
0554 DBGFS_DUMP(TVO_MAIN_IN_VID_FORMAT);
0555
0556 seq_puts(s, "\n\n auxiliary path configuration");
0557 DBGFS_DUMP(TVO_CSC_AUX_M0);
0558 DBGFS_DUMP(TVO_CSC_AUX_M2);
0559 DBGFS_DUMP(TVO_CSC_AUX_M3);
0560 DBGFS_DUMP(TVO_CSC_AUX_M4);
0561 DBGFS_DUMP(TVO_CSC_AUX_M5);
0562 DBGFS_DUMP(TVO_CSC_AUX_M6);
0563 DBGFS_DUMP(TVO_CSC_AUX_M7);
0564 DBGFS_DUMP(TVO_AUX_IN_VID_FORMAT);
0565 seq_putc(s, '\n');
0566 return 0;
0567 }
0568
0569 static struct drm_info_list tvout_debugfs_files[] = {
0570 { "tvout", tvout_dbg_show, 0, NULL },
0571 };
0572
0573 static void tvout_debugfs_init(struct sti_tvout *tvout, struct drm_minor *minor)
0574 {
0575 unsigned int i;
0576
0577 for (i = 0; i < ARRAY_SIZE(tvout_debugfs_files); i++)
0578 tvout_debugfs_files[i].data = tvout;
0579
0580 drm_debugfs_create_files(tvout_debugfs_files,
0581 ARRAY_SIZE(tvout_debugfs_files),
0582 minor->debugfs_root, minor);
0583 }
0584
0585 static void sti_tvout_encoder_dpms(struct drm_encoder *encoder, int mode)
0586 {
0587 }
0588
0589 static void sti_tvout_encoder_mode_set(struct drm_encoder *encoder,
0590 struct drm_display_mode *mode,
0591 struct drm_display_mode *adjusted_mode)
0592 {
0593 }
0594
0595 static void sti_tvout_encoder_destroy(struct drm_encoder *encoder)
0596 {
0597 struct sti_tvout_encoder *sti_encoder = to_sti_tvout_encoder(encoder);
0598
0599 drm_encoder_cleanup(encoder);
0600 kfree(sti_encoder);
0601 }
0602
0603 static int sti_tvout_late_register(struct drm_encoder *encoder)
0604 {
0605 struct sti_tvout *tvout = to_sti_tvout(encoder);
0606
0607 if (tvout->debugfs_registered)
0608 return 0;
0609
0610 tvout_debugfs_init(tvout, encoder->dev->primary);
0611
0612 tvout->debugfs_registered = true;
0613 return 0;
0614 }
0615
0616 static void sti_tvout_early_unregister(struct drm_encoder *encoder)
0617 {
0618 struct sti_tvout *tvout = to_sti_tvout(encoder);
0619
0620 if (!tvout->debugfs_registered)
0621 return;
0622
0623 tvout->debugfs_registered = false;
0624 }
0625
0626 static const struct drm_encoder_funcs sti_tvout_encoder_funcs = {
0627 .destroy = sti_tvout_encoder_destroy,
0628 .late_register = sti_tvout_late_register,
0629 .early_unregister = sti_tvout_early_unregister,
0630 };
0631
0632 static void sti_dvo_encoder_enable(struct drm_encoder *encoder)
0633 {
0634 struct sti_tvout *tvout = to_sti_tvout(encoder);
0635
0636 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
0637
0638 tvout_dvo_start(tvout, sti_crtc_is_main(encoder->crtc));
0639 }
0640
0641 static void sti_dvo_encoder_disable(struct drm_encoder *encoder)
0642 {
0643 struct sti_tvout *tvout = to_sti_tvout(encoder);
0644
0645
0646 tvout_write(tvout, 0x0, TVO_VIP_DVO);
0647 }
0648
0649 static const struct drm_encoder_helper_funcs sti_dvo_encoder_helper_funcs = {
0650 .dpms = sti_tvout_encoder_dpms,
0651 .mode_set = sti_tvout_encoder_mode_set,
0652 .enable = sti_dvo_encoder_enable,
0653 .disable = sti_dvo_encoder_disable,
0654 };
0655
0656 static struct drm_encoder *
0657 sti_tvout_create_dvo_encoder(struct drm_device *dev,
0658 struct sti_tvout *tvout)
0659 {
0660 struct sti_tvout_encoder *encoder;
0661 struct drm_encoder *drm_encoder;
0662
0663 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
0664 if (!encoder)
0665 return NULL;
0666
0667 encoder->tvout = tvout;
0668
0669 drm_encoder = &encoder->encoder;
0670
0671 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
0672
0673 drm_encoder_init(dev, drm_encoder,
0674 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_LVDS,
0675 NULL);
0676
0677 drm_encoder_helper_add(drm_encoder, &sti_dvo_encoder_helper_funcs);
0678
0679 return drm_encoder;
0680 }
0681
0682 static void sti_hda_encoder_enable(struct drm_encoder *encoder)
0683 {
0684 struct sti_tvout *tvout = to_sti_tvout(encoder);
0685
0686 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
0687
0688 tvout_hda_start(tvout, sti_crtc_is_main(encoder->crtc));
0689 }
0690
0691 static void sti_hda_encoder_disable(struct drm_encoder *encoder)
0692 {
0693 struct sti_tvout *tvout = to_sti_tvout(encoder);
0694
0695
0696 tvout_write(tvout, 0x0, TVO_VIP_HDF);
0697
0698
0699 tvout_write(tvout, 1, TVO_HD_DAC_CFG_OFF);
0700 }
0701
0702 static const struct drm_encoder_helper_funcs sti_hda_encoder_helper_funcs = {
0703 .dpms = sti_tvout_encoder_dpms,
0704 .mode_set = sti_tvout_encoder_mode_set,
0705 .commit = sti_hda_encoder_enable,
0706 .disable = sti_hda_encoder_disable,
0707 };
0708
0709 static struct drm_encoder *sti_tvout_create_hda_encoder(struct drm_device *dev,
0710 struct sti_tvout *tvout)
0711 {
0712 struct sti_tvout_encoder *encoder;
0713 struct drm_encoder *drm_encoder;
0714
0715 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
0716 if (!encoder)
0717 return NULL;
0718
0719 encoder->tvout = tvout;
0720
0721 drm_encoder = &encoder->encoder;
0722
0723 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
0724
0725 drm_encoder_init(dev, drm_encoder,
0726 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
0727
0728 drm_encoder_helper_add(drm_encoder, &sti_hda_encoder_helper_funcs);
0729
0730 return drm_encoder;
0731 }
0732
0733 static void sti_hdmi_encoder_enable(struct drm_encoder *encoder)
0734 {
0735 struct sti_tvout *tvout = to_sti_tvout(encoder);
0736
0737 tvout_preformatter_set_matrix(tvout, &encoder->crtc->mode);
0738
0739 tvout_hdmi_start(tvout, sti_crtc_is_main(encoder->crtc));
0740 }
0741
0742 static void sti_hdmi_encoder_disable(struct drm_encoder *encoder)
0743 {
0744 struct sti_tvout *tvout = to_sti_tvout(encoder);
0745
0746
0747 tvout_write(tvout, 0x0, TVO_VIP_HDMI);
0748 }
0749
0750 static const struct drm_encoder_helper_funcs sti_hdmi_encoder_helper_funcs = {
0751 .dpms = sti_tvout_encoder_dpms,
0752 .mode_set = sti_tvout_encoder_mode_set,
0753 .commit = sti_hdmi_encoder_enable,
0754 .disable = sti_hdmi_encoder_disable,
0755 };
0756
0757 static struct drm_encoder *sti_tvout_create_hdmi_encoder(struct drm_device *dev,
0758 struct sti_tvout *tvout)
0759 {
0760 struct sti_tvout_encoder *encoder;
0761 struct drm_encoder *drm_encoder;
0762
0763 encoder = devm_kzalloc(tvout->dev, sizeof(*encoder), GFP_KERNEL);
0764 if (!encoder)
0765 return NULL;
0766
0767 encoder->tvout = tvout;
0768
0769 drm_encoder = &encoder->encoder;
0770
0771 drm_encoder->possible_crtcs = ENCODER_CRTC_MASK;
0772
0773 drm_encoder_init(dev, drm_encoder,
0774 &sti_tvout_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL);
0775
0776 drm_encoder_helper_add(drm_encoder, &sti_hdmi_encoder_helper_funcs);
0777
0778 return drm_encoder;
0779 }
0780
0781 static void sti_tvout_create_encoders(struct drm_device *dev,
0782 struct sti_tvout *tvout)
0783 {
0784 tvout->hdmi = sti_tvout_create_hdmi_encoder(dev, tvout);
0785 tvout->hda = sti_tvout_create_hda_encoder(dev, tvout);
0786 tvout->dvo = sti_tvout_create_dvo_encoder(dev, tvout);
0787
0788 tvout->hdmi->possible_clones = drm_encoder_mask(tvout->hdmi) |
0789 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
0790 tvout->hda->possible_clones = drm_encoder_mask(tvout->hdmi) |
0791 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
0792 tvout->dvo->possible_clones = drm_encoder_mask(tvout->hdmi) |
0793 drm_encoder_mask(tvout->hda) | drm_encoder_mask(tvout->dvo);
0794 }
0795
0796 static void sti_tvout_destroy_encoders(struct sti_tvout *tvout)
0797 {
0798 if (tvout->hdmi)
0799 drm_encoder_cleanup(tvout->hdmi);
0800 tvout->hdmi = NULL;
0801
0802 if (tvout->hda)
0803 drm_encoder_cleanup(tvout->hda);
0804 tvout->hda = NULL;
0805
0806 if (tvout->dvo)
0807 drm_encoder_cleanup(tvout->dvo);
0808 tvout->dvo = NULL;
0809 }
0810
0811 static int sti_tvout_bind(struct device *dev, struct device *master, void *data)
0812 {
0813 struct sti_tvout *tvout = dev_get_drvdata(dev);
0814 struct drm_device *drm_dev = data;
0815
0816 tvout->drm_dev = drm_dev;
0817
0818 sti_tvout_create_encoders(drm_dev, tvout);
0819
0820 return 0;
0821 }
0822
0823 static void sti_tvout_unbind(struct device *dev, struct device *master,
0824 void *data)
0825 {
0826 struct sti_tvout *tvout = dev_get_drvdata(dev);
0827
0828 sti_tvout_destroy_encoders(tvout);
0829 }
0830
0831 static const struct component_ops sti_tvout_ops = {
0832 .bind = sti_tvout_bind,
0833 .unbind = sti_tvout_unbind,
0834 };
0835
0836 static int sti_tvout_probe(struct platform_device *pdev)
0837 {
0838 struct device *dev = &pdev->dev;
0839 struct device_node *node = dev->of_node;
0840 struct sti_tvout *tvout;
0841 struct resource *res;
0842
0843 DRM_INFO("%s\n", __func__);
0844
0845 if (!node)
0846 return -ENODEV;
0847
0848 tvout = devm_kzalloc(dev, sizeof(*tvout), GFP_KERNEL);
0849 if (!tvout)
0850 return -ENOMEM;
0851
0852 tvout->dev = dev;
0853
0854
0855 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tvout-reg");
0856 if (!res) {
0857 DRM_ERROR("Invalid glue resource\n");
0858 return -ENOMEM;
0859 }
0860 tvout->regs = devm_ioremap(dev, res->start, resource_size(res));
0861 if (!tvout->regs)
0862 return -ENOMEM;
0863
0864
0865 tvout->reset = devm_reset_control_get(dev, "tvout");
0866
0867 if (!IS_ERR(tvout->reset))
0868 reset_control_deassert(tvout->reset);
0869
0870 platform_set_drvdata(pdev, tvout);
0871
0872 return component_add(dev, &sti_tvout_ops);
0873 }
0874
0875 static int sti_tvout_remove(struct platform_device *pdev)
0876 {
0877 component_del(&pdev->dev, &sti_tvout_ops);
0878 return 0;
0879 }
0880
0881 static const struct of_device_id tvout_of_match[] = {
0882 { .compatible = "st,stih407-tvout", },
0883 { }
0884 };
0885 MODULE_DEVICE_TABLE(of, tvout_of_match);
0886
0887 struct platform_driver sti_tvout_driver = {
0888 .driver = {
0889 .name = "sti-tvout",
0890 .owner = THIS_MODULE,
0891 .of_match_table = tvout_of_match,
0892 },
0893 .probe = sti_tvout_probe,
0894 .remove = sti_tvout_remove,
0895 };
0896
0897 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
0898 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
0899 MODULE_LICENSE("GPL");