drm/sti/sti_hdmi.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) STMicroelectronics SA 2014
0004  * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
0005  */
0006
0007 #ifndef _STI_HDMI_H_
0008 #define _STI_HDMI_H_
0009
0010 #include <linux/hdmi.h>
0011 #include <linux/platform_device.h>
0012
0013 #include <media/cec-notifier.h>
0014
0015 #include <drm/drm_modes.h>
0016 #include <drm/drm_property.h>
0017
0018 #define HDMI_STA           0x0010
0019 #define HDMI_STA_DLL_LCK   BIT(5)
0020 #define HDMI_STA_HOT_PLUG  BIT(4)
0021
0022 struct sti_hdmi;
0023
0024 struct hdmi_phy_ops {
0025     bool (*start)(struct sti_hdmi *hdmi);
0026     void (*stop)(struct sti_hdmi *hdmi);
0027 };
0028
0029 struct hdmi_audio_params {
0030     bool enabled;
0031     unsigned int sample_width;
0032     unsigned int sample_rate;
0033     struct hdmi_audio_infoframe cea;
0034 };
0035
0036 #define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
0037
0038 /**
0039  * STI hdmi structure
0040  *
0041  * @dev: driver device
0042  * @drm_dev: pointer to drm device
0043  * @mode: current display mode selected
0044  * @regs: hdmi register
0045  * @syscfg: syscfg register for pll rejection configuration
0046  * @clk_pix: hdmi pixel clock
0047  * @clk_tmds: hdmi tmds clock
0048  * @clk_phy: hdmi phy clock
0049  * @clk_audio: hdmi audio clock
0050  * @irq: hdmi interrupt number
0051  * @irq_status: interrupt status register
0052  * @phy_ops: phy start/stop operations
0053  * @enabled: true if hdmi is enabled else false
0054  * @hpd: hot plug detect status
0055  * @wait_event: wait event
0056  * @event_received: wait event status
0057  * @reset: reset control of the hdmi phy
0058  * @ddc_adapt: i2c ddc adapter
0059  * @colorspace: current colorspace selected
0060  * @hdmi_monitor: true if HDMI monitor detected else DVI monitor assumed
0061  * @audio_pdev: ASoC hdmi-codec platform device
0062  * @audio: hdmi audio parameters.
0063  * @drm_connector: hdmi connector
0064  * @notifier: hotplug detect notifier
0065  */
0066 struct sti_hdmi {
0067     struct device dev;
0068     struct drm_device *drm_dev;
0069     struct drm_display_mode mode;
0070     void __iomem *regs;
0071     void __iomem *syscfg;
0072     struct clk *clk_pix;
0073     struct clk *clk_tmds;
0074     struct clk *clk_phy;
0075     struct clk *clk_audio;
0076     int irq;
0077     u32 irq_status;
0078     struct hdmi_phy_ops *phy_ops;
0079     bool enabled;
0080     bool hpd;
0081     wait_queue_head_t wait_event;
0082     bool event_received;
0083     struct reset_control *reset;
0084     struct i2c_adapter *ddc_adapt;
0085     enum hdmi_colorspace colorspace;
0086     bool hdmi_monitor;
0087     struct platform_device *audio_pdev;
0088     struct hdmi_audio_params audio;
0089     struct drm_connector *drm_connector;
0090     struct cec_notifier *notifier;
0091 };
0092
0093 u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
0094 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
0095
0096 /**
0097  * hdmi phy config structure
0098  *
0099  * A pointer to an array of these structures is passed to a TMDS (HDMI) output
0100  * via the control interface to provide board and SoC specific
0101  * configurations of the HDMI PHY. Each entry in the array specifies a hardware
0102  * specific configuration for a given TMDS clock frequency range.
0103  *
0104  * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
0105  * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
0106  * @config: SoC specific register configuration
0107  */
0108 struct hdmi_phy_config {
0109     u32 min_tmds_freq;
0110     u32 max_tmds_freq;
0111     u32 config[4];
0112 };
0113
0114 #endif