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0009 #include <linux/clk.h>
0010 #include <linux/component.h>
0011 #include <linux/mfd/syscon.h>
0012 #include <linux/of_graph.h>
0013 #include <linux/phy/phy.h>
0014 #include <linux/pinctrl/devinfo.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/pm_runtime.h>
0017 #include <linux/regmap.h>
0018 #include <linux/reset.h>
0019
0020 #include <drm/display/drm_dp_helper.h>
0021 #include <drm/drm_atomic_helper.h>
0022 #include <drm/drm_bridge.h>
0023 #include <drm/drm_bridge_connector.h>
0024 #include <drm/drm_of.h>
0025 #include <drm/drm_panel.h>
0026 #include <drm/drm_probe_helper.h>
0027 #include <drm/drm_simple_kms_helper.h>
0028
0029 #include "rockchip_drm_drv.h"
0030 #include "rockchip_drm_vop.h"
0031 #include "rockchip_lvds.h"
0032
0033 #define DISPLAY_OUTPUT_RGB 0
0034 #define DISPLAY_OUTPUT_LVDS 1
0035 #define DISPLAY_OUTPUT_DUAL_LVDS 2
0036
0037 struct rockchip_lvds;
0038
0039
0040
0041
0042
0043
0044 struct rockchip_lvds_soc_data {
0045 int (*probe)(struct platform_device *pdev, struct rockchip_lvds *lvds);
0046 const struct drm_encoder_helper_funcs *helper_funcs;
0047 };
0048
0049 struct rockchip_lvds {
0050 struct device *dev;
0051 void __iomem *regs;
0052 struct regmap *grf;
0053 struct clk *pclk;
0054 struct phy *dphy;
0055 const struct rockchip_lvds_soc_data *soc_data;
0056 int output;
0057 int format;
0058 struct drm_device *drm_dev;
0059 struct drm_panel *panel;
0060 struct drm_bridge *bridge;
0061 struct drm_connector connector;
0062 struct rockchip_encoder encoder;
0063 struct dev_pin_info *pins;
0064 };
0065
0066 static inline struct rockchip_lvds *connector_to_lvds(struct drm_connector *connector)
0067 {
0068 return container_of(connector, struct rockchip_lvds, connector);
0069 }
0070
0071 static inline struct rockchip_lvds *encoder_to_lvds(struct drm_encoder *encoder)
0072 {
0073 struct rockchip_encoder *rkencoder = to_rockchip_encoder(encoder);
0074
0075 return container_of(rkencoder, struct rockchip_lvds, encoder);
0076 }
0077
0078 static inline void rk3288_writel(struct rockchip_lvds *lvds, u32 offset,
0079 u32 val)
0080 {
0081 writel_relaxed(val, lvds->regs + offset);
0082 if (lvds->output == DISPLAY_OUTPUT_LVDS)
0083 return;
0084 writel_relaxed(val, lvds->regs + offset + RK3288_LVDS_CH1_OFFSET);
0085 }
0086
0087 static inline int rockchip_lvds_name_to_format(const char *s)
0088 {
0089 if (strncmp(s, "jeida-18", 8) == 0)
0090 return LVDS_JEIDA_18;
0091 else if (strncmp(s, "jeida-24", 8) == 0)
0092 return LVDS_JEIDA_24;
0093 else if (strncmp(s, "vesa-24", 7) == 0)
0094 return LVDS_VESA_24;
0095
0096 return -EINVAL;
0097 }
0098
0099 static inline int rockchip_lvds_name_to_output(const char *s)
0100 {
0101 if (strncmp(s, "rgb", 3) == 0)
0102 return DISPLAY_OUTPUT_RGB;
0103 else if (strncmp(s, "lvds", 4) == 0)
0104 return DISPLAY_OUTPUT_LVDS;
0105 else if (strncmp(s, "duallvds", 8) == 0)
0106 return DISPLAY_OUTPUT_DUAL_LVDS;
0107
0108 return -EINVAL;
0109 }
0110
0111 static const struct drm_connector_funcs rockchip_lvds_connector_funcs = {
0112 .fill_modes = drm_helper_probe_single_connector_modes,
0113 .destroy = drm_connector_cleanup,
0114 .reset = drm_atomic_helper_connector_reset,
0115 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
0116 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
0117 };
0118
0119 static int rockchip_lvds_connector_get_modes(struct drm_connector *connector)
0120 {
0121 struct rockchip_lvds *lvds = connector_to_lvds(connector);
0122 struct drm_panel *panel = lvds->panel;
0123
0124 return drm_panel_get_modes(panel, connector);
0125 }
0126
0127 static const
0128 struct drm_connector_helper_funcs rockchip_lvds_connector_helper_funcs = {
0129 .get_modes = rockchip_lvds_connector_get_modes,
0130 };
0131
0132 static int
0133 rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
0134 struct drm_crtc_state *crtc_state,
0135 struct drm_connector_state *conn_state)
0136 {
0137 struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
0138
0139 s->output_mode = ROCKCHIP_OUT_MODE_P888;
0140 s->output_type = DRM_MODE_CONNECTOR_LVDS;
0141
0142 return 0;
0143 }
0144
0145 static int rk3288_lvds_poweron(struct rockchip_lvds *lvds)
0146 {
0147 int ret;
0148 u32 val;
0149
0150 ret = clk_enable(lvds->pclk);
0151 if (ret < 0) {
0152 DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret);
0153 return ret;
0154 }
0155 ret = pm_runtime_get_sync(lvds->dev);
0156 if (ret < 0) {
0157 DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
0158 clk_disable(lvds->pclk);
0159 return ret;
0160 }
0161 val = RK3288_LVDS_CH0_REG0_LANE4_EN | RK3288_LVDS_CH0_REG0_LANE3_EN |
0162 RK3288_LVDS_CH0_REG0_LANE2_EN | RK3288_LVDS_CH0_REG0_LANE1_EN |
0163 RK3288_LVDS_CH0_REG0_LANE0_EN;
0164 if (lvds->output == DISPLAY_OUTPUT_RGB) {
0165 val |= RK3288_LVDS_CH0_REG0_TTL_EN |
0166 RK3288_LVDS_CH0_REG0_LANECK_EN;
0167 rk3288_writel(lvds, RK3288_LVDS_CH0_REG0, val);
0168 rk3288_writel(lvds, RK3288_LVDS_CH0_REG2,
0169 RK3288_LVDS_PLL_FBDIV_REG2(0x46));
0170 rk3288_writel(lvds, RK3288_LVDS_CH0_REG4,
0171 RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
0172 RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
0173 RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
0174 RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
0175 RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
0176 RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
0177 rk3288_writel(lvds, RK3288_LVDS_CH0_REG5,
0178 RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
0179 RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
0180 RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
0181 RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
0182 RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
0183 RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
0184 } else {
0185 val |= RK3288_LVDS_CH0_REG0_LVDS_EN |
0186 RK3288_LVDS_CH0_REG0_LANECK_EN;
0187 rk3288_writel(lvds, RK3288_LVDS_CH0_REG0, val);
0188 rk3288_writel(lvds, RK3288_LVDS_CH0_REG1,
0189 RK3288_LVDS_CH0_REG1_LANECK_BIAS |
0190 RK3288_LVDS_CH0_REG1_LANE4_BIAS |
0191 RK3288_LVDS_CH0_REG1_LANE3_BIAS |
0192 RK3288_LVDS_CH0_REG1_LANE2_BIAS |
0193 RK3288_LVDS_CH0_REG1_LANE1_BIAS |
0194 RK3288_LVDS_CH0_REG1_LANE0_BIAS);
0195 rk3288_writel(lvds, RK3288_LVDS_CH0_REG2,
0196 RK3288_LVDS_CH0_REG2_RESERVE_ON |
0197 RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
0198 RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
0199 RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
0200 RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
0201 RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
0202 RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
0203 RK3288_LVDS_PLL_FBDIV_REG2(0x46));
0204 rk3288_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
0205 rk3288_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
0206 }
0207 rk3288_writel(lvds, RK3288_LVDS_CH0_REG3,
0208 RK3288_LVDS_PLL_FBDIV_REG3(0x46));
0209 rk3288_writel(lvds, RK3288_LVDS_CH0_REGD,
0210 RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
0211 rk3288_writel(lvds, RK3288_LVDS_CH0_REG20,
0212 RK3288_LVDS_CH0_REG20_LSB);
0213
0214 rk3288_writel(lvds, RK3288_LVDS_CFG_REGC,
0215 RK3288_LVDS_CFG_REGC_PLL_ENABLE);
0216 rk3288_writel(lvds, RK3288_LVDS_CFG_REG21,
0217 RK3288_LVDS_CFG_REG21_TX_ENABLE);
0218
0219 return 0;
0220 }
0221
0222 static void rk3288_lvds_poweroff(struct rockchip_lvds *lvds)
0223 {
0224 int ret;
0225 u32 val;
0226
0227 rk3288_writel(lvds, RK3288_LVDS_CFG_REG21,
0228 RK3288_LVDS_CFG_REG21_TX_ENABLE);
0229 rk3288_writel(lvds, RK3288_LVDS_CFG_REGC,
0230 RK3288_LVDS_CFG_REGC_PLL_ENABLE);
0231 val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN;
0232 val |= val << 16;
0233 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val);
0234 if (ret != 0)
0235 DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
0236
0237 pm_runtime_put(lvds->dev);
0238 clk_disable(lvds->pclk);
0239 }
0240
0241 static int rk3288_lvds_grf_config(struct drm_encoder *encoder,
0242 struct drm_display_mode *mode)
0243 {
0244 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
0245 u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
0246 u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
0247 u32 val;
0248 int ret;
0249
0250
0251 if (lvds->output == DISPLAY_OUTPUT_RGB)
0252 if (lvds->pins && !IS_ERR(lvds->pins->default_state))
0253 pinctrl_select_state(lvds->pins->p,
0254 lvds->pins->default_state);
0255 val = lvds->format | LVDS_CH0_EN;
0256 if (lvds->output == DISPLAY_OUTPUT_RGB)
0257 val |= LVDS_TTL_EN | LVDS_CH1_EN;
0258 else if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
0259 val |= LVDS_DUAL | LVDS_CH1_EN;
0260
0261 if ((mode->htotal - mode->hsync_start) & 0x01)
0262 val |= LVDS_START_PHASE_RST_1;
0263
0264 val |= (pin_dclk << 8) | (pin_hsync << 9);
0265 val |= (0xffff << 16);
0266 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON7, val);
0267 if (ret)
0268 DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
0269
0270 return ret;
0271 }
0272
0273 static int rk3288_lvds_set_vop_source(struct rockchip_lvds *lvds,
0274 struct drm_encoder *encoder)
0275 {
0276 u32 val;
0277 int ret;
0278
0279 ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
0280 if (ret < 0)
0281 return ret;
0282
0283 val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
0284 if (ret)
0285 val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT;
0286
0287 ret = regmap_write(lvds->grf, RK3288_LVDS_GRF_SOC_CON6, val);
0288 if (ret < 0)
0289 return ret;
0290
0291 return 0;
0292 }
0293
0294 static void rk3288_lvds_encoder_enable(struct drm_encoder *encoder)
0295 {
0296 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
0297 struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
0298 int ret;
0299
0300 drm_panel_prepare(lvds->panel);
0301
0302 ret = rk3288_lvds_poweron(lvds);
0303 if (ret < 0) {
0304 DRM_DEV_ERROR(lvds->dev, "failed to power on LVDS: %d\n", ret);
0305 drm_panel_unprepare(lvds->panel);
0306 return;
0307 }
0308
0309 ret = rk3288_lvds_grf_config(encoder, mode);
0310 if (ret) {
0311 DRM_DEV_ERROR(lvds->dev, "failed to configure LVDS: %d\n", ret);
0312 drm_panel_unprepare(lvds->panel);
0313 return;
0314 }
0315
0316 ret = rk3288_lvds_set_vop_source(lvds, encoder);
0317 if (ret) {
0318 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret);
0319 drm_panel_unprepare(lvds->panel);
0320 return;
0321 }
0322
0323 drm_panel_enable(lvds->panel);
0324 }
0325
0326 static void rk3288_lvds_encoder_disable(struct drm_encoder *encoder)
0327 {
0328 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
0329
0330 drm_panel_disable(lvds->panel);
0331 rk3288_lvds_poweroff(lvds);
0332 drm_panel_unprepare(lvds->panel);
0333 }
0334
0335 static int px30_lvds_poweron(struct rockchip_lvds *lvds)
0336 {
0337 int ret;
0338
0339 ret = pm_runtime_get_sync(lvds->dev);
0340 if (ret < 0) {
0341 DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
0342 return ret;
0343 }
0344
0345
0346 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
0347 PX30_LVDS_MODE_EN(1) | PX30_LVDS_P2S_EN(1),
0348 PX30_LVDS_MODE_EN(1) | PX30_LVDS_P2S_EN(1));
0349 }
0350
0351 static void px30_lvds_poweroff(struct rockchip_lvds *lvds)
0352 {
0353 regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
0354 PX30_LVDS_MODE_EN(1) | PX30_LVDS_P2S_EN(1),
0355 PX30_LVDS_MODE_EN(0) | PX30_LVDS_P2S_EN(0));
0356
0357 pm_runtime_put(lvds->dev);
0358 }
0359
0360 static int px30_lvds_grf_config(struct drm_encoder *encoder,
0361 struct drm_display_mode *mode)
0362 {
0363 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
0364
0365 if (lvds->output != DISPLAY_OUTPUT_LVDS) {
0366 DRM_DEV_ERROR(lvds->dev, "Unsupported display output %d\n",
0367 lvds->output);
0368 return -EINVAL;
0369 }
0370
0371
0372 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
0373 PX30_LVDS_FORMAT(lvds->format),
0374 PX30_LVDS_FORMAT(lvds->format));
0375 }
0376
0377 static int px30_lvds_set_vop_source(struct rockchip_lvds *lvds,
0378 struct drm_encoder *encoder)
0379 {
0380 int vop;
0381
0382 vop = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
0383 if (vop < 0)
0384 return vop;
0385
0386 return regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
0387 PX30_LVDS_VOP_SEL(1),
0388 PX30_LVDS_VOP_SEL(vop));
0389 }
0390
0391 static void px30_lvds_encoder_enable(struct drm_encoder *encoder)
0392 {
0393 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
0394 struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
0395 int ret;
0396
0397 drm_panel_prepare(lvds->panel);
0398
0399 ret = px30_lvds_poweron(lvds);
0400 if (ret) {
0401 DRM_DEV_ERROR(lvds->dev, "failed to power on LVDS: %d\n", ret);
0402 drm_panel_unprepare(lvds->panel);
0403 return;
0404 }
0405
0406 ret = px30_lvds_grf_config(encoder, mode);
0407 if (ret) {
0408 DRM_DEV_ERROR(lvds->dev, "failed to configure LVDS: %d\n", ret);
0409 drm_panel_unprepare(lvds->panel);
0410 return;
0411 }
0412
0413 ret = px30_lvds_set_vop_source(lvds, encoder);
0414 if (ret) {
0415 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret);
0416 drm_panel_unprepare(lvds->panel);
0417 return;
0418 }
0419
0420 drm_panel_enable(lvds->panel);
0421 }
0422
0423 static void px30_lvds_encoder_disable(struct drm_encoder *encoder)
0424 {
0425 struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
0426
0427 drm_panel_disable(lvds->panel);
0428 px30_lvds_poweroff(lvds);
0429 drm_panel_unprepare(lvds->panel);
0430 }
0431
0432 static const
0433 struct drm_encoder_helper_funcs rk3288_lvds_encoder_helper_funcs = {
0434 .enable = rk3288_lvds_encoder_enable,
0435 .disable = rk3288_lvds_encoder_disable,
0436 .atomic_check = rockchip_lvds_encoder_atomic_check,
0437 };
0438
0439 static const
0440 struct drm_encoder_helper_funcs px30_lvds_encoder_helper_funcs = {
0441 .enable = px30_lvds_encoder_enable,
0442 .disable = px30_lvds_encoder_disable,
0443 .atomic_check = rockchip_lvds_encoder_atomic_check,
0444 };
0445
0446 static int rk3288_lvds_probe(struct platform_device *pdev,
0447 struct rockchip_lvds *lvds)
0448 {
0449 int ret;
0450
0451 lvds->regs = devm_platform_ioremap_resource(pdev, 0);
0452 if (IS_ERR(lvds->regs))
0453 return PTR_ERR(lvds->regs);
0454
0455 lvds->pclk = devm_clk_get(lvds->dev, "pclk_lvds");
0456 if (IS_ERR(lvds->pclk)) {
0457 DRM_DEV_ERROR(lvds->dev, "could not get pclk_lvds\n");
0458 return PTR_ERR(lvds->pclk);
0459 }
0460
0461 lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
0462 GFP_KERNEL);
0463 if (!lvds->pins)
0464 return -ENOMEM;
0465
0466 lvds->pins->p = devm_pinctrl_get(lvds->dev);
0467 if (IS_ERR(lvds->pins->p)) {
0468 DRM_DEV_ERROR(lvds->dev, "no pinctrl handle\n");
0469 devm_kfree(lvds->dev, lvds->pins);
0470 lvds->pins = NULL;
0471 } else {
0472 lvds->pins->default_state =
0473 pinctrl_lookup_state(lvds->pins->p, "lcdc");
0474 if (IS_ERR(lvds->pins->default_state)) {
0475 DRM_DEV_ERROR(lvds->dev, "no default pinctrl state\n");
0476 devm_kfree(lvds->dev, lvds->pins);
0477 lvds->pins = NULL;
0478 }
0479 }
0480
0481 ret = clk_prepare(lvds->pclk);
0482 if (ret < 0) {
0483 DRM_DEV_ERROR(lvds->dev, "failed to prepare pclk_lvds\n");
0484 return ret;
0485 }
0486
0487 return 0;
0488 }
0489
0490 static int px30_lvds_probe(struct platform_device *pdev,
0491 struct rockchip_lvds *lvds)
0492 {
0493 int ret;
0494
0495
0496 ret = regmap_update_bits(lvds->grf, PX30_LVDS_GRF_PD_VO_CON1,
0497 PX30_LVDS_MSBSEL(1),
0498 PX30_LVDS_MSBSEL(1));
0499 if (ret)
0500 return ret;
0501
0502
0503 lvds->dphy = devm_phy_get(&pdev->dev, "dphy");
0504 if (IS_ERR(lvds->dphy))
0505 return PTR_ERR(lvds->dphy);
0506
0507 ret = phy_init(lvds->dphy);
0508 if (ret)
0509 return ret;
0510
0511 ret = phy_set_mode(lvds->dphy, PHY_MODE_LVDS);
0512 if (ret)
0513 return ret;
0514
0515 return phy_power_on(lvds->dphy);
0516 }
0517
0518 static const struct rockchip_lvds_soc_data rk3288_lvds_data = {
0519 .probe = rk3288_lvds_probe,
0520 .helper_funcs = &rk3288_lvds_encoder_helper_funcs,
0521 };
0522
0523 static const struct rockchip_lvds_soc_data px30_lvds_data = {
0524 .probe = px30_lvds_probe,
0525 .helper_funcs = &px30_lvds_encoder_helper_funcs,
0526 };
0527
0528 static const struct of_device_id rockchip_lvds_dt_ids[] = {
0529 {
0530 .compatible = "rockchip,rk3288-lvds",
0531 .data = &rk3288_lvds_data
0532 },
0533 {
0534 .compatible = "rockchip,px30-lvds",
0535 .data = &px30_lvds_data
0536 },
0537 {}
0538 };
0539 MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids);
0540
0541 static int rockchip_lvds_bind(struct device *dev, struct device *master,
0542 void *data)
0543 {
0544 struct rockchip_lvds *lvds = dev_get_drvdata(dev);
0545 struct drm_device *drm_dev = data;
0546 struct drm_encoder *encoder;
0547 struct drm_connector *connector;
0548 struct device_node *remote = NULL;
0549 struct device_node *port, *endpoint;
0550 int ret = 0, child_count = 0;
0551 const char *name;
0552 u32 endpoint_id = 0;
0553
0554 lvds->drm_dev = drm_dev;
0555 port = of_graph_get_port_by_id(dev->of_node, 1);
0556 if (!port) {
0557 DRM_DEV_ERROR(dev,
0558 "can't found port point, please init lvds panel port!\n");
0559 return -EINVAL;
0560 }
0561 for_each_child_of_node(port, endpoint) {
0562 child_count++;
0563 of_property_read_u32(endpoint, "reg", &endpoint_id);
0564 ret = drm_of_find_panel_or_bridge(dev->of_node, 1, endpoint_id,
0565 &lvds->panel, &lvds->bridge);
0566 if (!ret) {
0567 of_node_put(endpoint);
0568 break;
0569 }
0570 }
0571 if (!child_count) {
0572 DRM_DEV_ERROR(dev, "lvds port does not have any children\n");
0573 ret = -EINVAL;
0574 goto err_put_port;
0575 } else if (ret) {
0576 DRM_DEV_ERROR(dev, "failed to find panel and bridge node\n");
0577 ret = -EPROBE_DEFER;
0578 goto err_put_port;
0579 }
0580 if (lvds->panel)
0581 remote = lvds->panel->dev->of_node;
0582 else
0583 remote = lvds->bridge->of_node;
0584 if (of_property_read_string(dev->of_node, "rockchip,output", &name))
0585
0586 lvds->output = DISPLAY_OUTPUT_RGB;
0587 else
0588 lvds->output = rockchip_lvds_name_to_output(name);
0589
0590 if (lvds->output < 0) {
0591 DRM_DEV_ERROR(dev, "invalid output type [%s]\n", name);
0592 ret = lvds->output;
0593 goto err_put_remote;
0594 }
0595
0596 if (of_property_read_string(remote, "data-mapping", &name))
0597
0598 lvds->format = LVDS_VESA_18;
0599 else
0600 lvds->format = rockchip_lvds_name_to_format(name);
0601
0602 if (lvds->format < 0) {
0603 DRM_DEV_ERROR(dev, "invalid data-mapping format [%s]\n", name);
0604 ret = lvds->format;
0605 goto err_put_remote;
0606 }
0607
0608 encoder = &lvds->encoder.encoder;
0609 encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
0610 dev->of_node);
0611
0612 ret = drm_simple_encoder_init(drm_dev, encoder, DRM_MODE_ENCODER_LVDS);
0613 if (ret < 0) {
0614 DRM_DEV_ERROR(drm_dev->dev,
0615 "failed to initialize encoder: %d\n", ret);
0616 goto err_put_remote;
0617 }
0618
0619 drm_encoder_helper_add(encoder, lvds->soc_data->helper_funcs);
0620 connector = &lvds->connector;
0621
0622 if (lvds->panel) {
0623 connector->dpms = DRM_MODE_DPMS_OFF;
0624 ret = drm_connector_init(drm_dev, connector,
0625 &rockchip_lvds_connector_funcs,
0626 DRM_MODE_CONNECTOR_LVDS);
0627 if (ret < 0) {
0628 DRM_DEV_ERROR(drm_dev->dev,
0629 "failed to initialize connector: %d\n", ret);
0630 goto err_free_encoder;
0631 }
0632
0633 drm_connector_helper_add(connector,
0634 &rockchip_lvds_connector_helper_funcs);
0635 } else {
0636 ret = drm_bridge_attach(encoder, lvds->bridge, NULL,
0637 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
0638 if (ret)
0639 goto err_free_encoder;
0640
0641 connector = drm_bridge_connector_init(lvds->drm_dev, encoder);
0642 if (IS_ERR(connector)) {
0643 DRM_DEV_ERROR(drm_dev->dev,
0644 "failed to initialize bridge connector: %pe\n",
0645 connector);
0646 ret = PTR_ERR(connector);
0647 goto err_free_encoder;
0648 }
0649 }
0650
0651 ret = drm_connector_attach_encoder(connector, encoder);
0652 if (ret < 0) {
0653 DRM_DEV_ERROR(drm_dev->dev,
0654 "failed to attach encoder: %d\n", ret);
0655 goto err_free_connector;
0656 }
0657
0658 pm_runtime_enable(dev);
0659 of_node_put(remote);
0660 of_node_put(port);
0661
0662 return 0;
0663
0664 err_free_connector:
0665 drm_connector_cleanup(connector);
0666 err_free_encoder:
0667 drm_encoder_cleanup(encoder);
0668 err_put_remote:
0669 of_node_put(remote);
0670 err_put_port:
0671 of_node_put(port);
0672
0673 return ret;
0674 }
0675
0676 static void rockchip_lvds_unbind(struct device *dev, struct device *master,
0677 void *data)
0678 {
0679 struct rockchip_lvds *lvds = dev_get_drvdata(dev);
0680 const struct drm_encoder_helper_funcs *encoder_funcs;
0681
0682 encoder_funcs = lvds->soc_data->helper_funcs;
0683 encoder_funcs->disable(&lvds->encoder.encoder);
0684 pm_runtime_disable(dev);
0685 drm_connector_cleanup(&lvds->connector);
0686 drm_encoder_cleanup(&lvds->encoder.encoder);
0687 }
0688
0689 static const struct component_ops rockchip_lvds_component_ops = {
0690 .bind = rockchip_lvds_bind,
0691 .unbind = rockchip_lvds_unbind,
0692 };
0693
0694 static int rockchip_lvds_probe(struct platform_device *pdev)
0695 {
0696 struct device *dev = &pdev->dev;
0697 struct rockchip_lvds *lvds;
0698 const struct of_device_id *match;
0699 int ret;
0700
0701 if (!dev->of_node)
0702 return -ENODEV;
0703
0704 lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
0705 if (!lvds)
0706 return -ENOMEM;
0707
0708 lvds->dev = dev;
0709 match = of_match_node(rockchip_lvds_dt_ids, dev->of_node);
0710 if (!match)
0711 return -ENODEV;
0712 lvds->soc_data = match->data;
0713
0714 lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
0715 "rockchip,grf");
0716 if (IS_ERR(lvds->grf)) {
0717 DRM_DEV_ERROR(dev, "missing rockchip,grf property\n");
0718 return PTR_ERR(lvds->grf);
0719 }
0720
0721 ret = lvds->soc_data->probe(pdev, lvds);
0722 if (ret) {
0723 DRM_DEV_ERROR(dev, "Platform initialization failed\n");
0724 return ret;
0725 }
0726
0727 dev_set_drvdata(dev, lvds);
0728
0729 ret = component_add(&pdev->dev, &rockchip_lvds_component_ops);
0730 if (ret < 0) {
0731 DRM_DEV_ERROR(dev, "failed to add component\n");
0732 clk_unprepare(lvds->pclk);
0733 }
0734
0735 return ret;
0736 }
0737
0738 static int rockchip_lvds_remove(struct platform_device *pdev)
0739 {
0740 struct rockchip_lvds *lvds = platform_get_drvdata(pdev);
0741
0742 component_del(&pdev->dev, &rockchip_lvds_component_ops);
0743 clk_unprepare(lvds->pclk);
0744
0745 return 0;
0746 }
0747
0748 struct platform_driver rockchip_lvds_driver = {
0749 .probe = rockchip_lvds_probe,
0750 .remove = rockchip_lvds_remove,
0751 .driver = {
0752 .name = "rockchip-lvds",
0753 .of_match_table = of_match_ptr(rockchip_lvds_dt_ids),
0754 },
0755 };