drm/rockchip/rockchip_drm_drv.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
0004  * Author:Mark Yao <mark.yao@rock-chips.com>
0005  *
0006  * based on exynos_drm_drv.h
0007  */
0008
0009 #ifndef _ROCKCHIP_DRM_DRV_H
0010 #define _ROCKCHIP_DRM_DRV_H
0011
0012 #include <drm/drm_fb_helper.h>
0013 #include <drm/drm_atomic_helper.h>
0014 #include <drm/drm_gem.h>
0015
0016 #include <linux/module.h>
0017 #include <linux/component.h>
0018
0019 #define ROCKCHIP_MAX_FB_BUFFER  3
0020 #define ROCKCHIP_MAX_CONNECTOR  2
0021 #define ROCKCHIP_MAX_CRTC   4
0022
0023 struct drm_device;
0024 struct drm_connector;
0025 struct iommu_domain;
0026
0027 struct rockchip_crtc_state {
0028     struct drm_crtc_state base;
0029     int output_type;
0030     int output_mode;
0031     int output_bpc;
0032     int output_flags;
0033     bool enable_afbc;
0034     u32 bus_format;
0035     u32 bus_flags;
0036     int color_space;
0037 };
0038 #define to_rockchip_crtc_state(s) \
0039         container_of(s, struct rockchip_crtc_state, base)
0040
0041 /*
0042  * Rockchip drm private structure.
0043  *
0044  * @crtc: array of enabled CRTCs, used to map from "pipe" to drm_crtc.
0045  * @num_pipe: number of pipes for this device.
0046  * @mm_lock: protect drm_mm on multi-threads.
0047  */
0048 struct rockchip_drm_private {
0049     struct iommu_domain *domain;
0050     struct device *iommu_dev;
0051     struct mutex mm_lock;
0052     struct drm_mm mm;
0053 };
0054
0055 struct rockchip_encoder {
0056     int crtc_endpoint_id;
0057     struct drm_encoder encoder;
0058 };
0059
0060 int rockchip_drm_dma_attach_device(struct drm_device *drm_dev,
0061                    struct device *dev);
0062 void rockchip_drm_dma_detach_device(struct drm_device *drm_dev,
0063                     struct device *dev);
0064 void rockchip_drm_dma_init_device(struct drm_device *drm_dev,
0065                   struct device *dev);
0066 int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout);
0067 int rockchip_drm_encoder_set_crtc_endpoint_id(struct rockchip_encoder *rencoder,
0068                           struct device_node *np, int port, int reg);
0069 int rockchip_drm_endpoint_is_subdriver(struct device_node *ep);
0070 extern struct platform_driver cdn_dp_driver;
0071 extern struct platform_driver dw_hdmi_rockchip_pltfm_driver;
0072 extern struct platform_driver dw_mipi_dsi_rockchip_driver;
0073 extern struct platform_driver inno_hdmi_driver;
0074 extern struct platform_driver rockchip_dp_driver;
0075 extern struct platform_driver rockchip_lvds_driver;
0076 extern struct platform_driver vop_platform_driver;
0077 extern struct platform_driver rk3066_hdmi_driver;
0078 extern struct platform_driver vop2_platform_driver;
0079
0080 static inline struct rockchip_encoder *to_rockchip_encoder(struct drm_encoder *encoder)
0081 {
0082     return container_of(encoder, struct rockchip_encoder, encoder);
0083 }
0084
0085 #endif /* _ROCKCHIP_DRM_DRV_H_ */