drm/rockchip/rk3066_hdmi.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
0004  *    Zheng Yang <zhengyang@rock-chips.com>
0005  */
0006
0007 #ifndef __RK3066_HDMI_H__
0008 #define __RK3066_HDMI_H__
0009
0010 #define GRF_SOC_CON0                0x150
0011 #define HDMI_VIDEO_SEL              BIT(14)
0012
0013 #define DDC_SEGMENT_ADDR            0x30
0014 #define HDMI_SCL_RATE               (50 * 1000)
0015 #define HDMI_MAXIMUM_INFO_FRAME_SIZE        0x11
0016
0017 #define N_32K                   0x1000
0018 #define N_441K                  0x1880
0019 #define N_882K                  0x3100
0020 #define N_1764K                 0x6200
0021 #define N_48K                   0x1800
0022 #define N_96K                   0x3000
0023 #define N_192K                  0x6000
0024
0025 #define HDMI_SYS_CTRL               0x000
0026 #define HDMI_LR_SWAP_N3             0x004
0027 #define HDMI_N2                 0x008
0028 #define HDMI_N1                 0x00c
0029 #define HDMI_SPDIF_FS_CTS_INT3          0x010
0030 #define HDMI_CTS_INT2               0x014
0031 #define HDMI_CTS_INT1               0x018
0032 #define HDMI_CTS_EXT3               0x01c
0033 #define HDMI_CTS_EXT2               0x020
0034 #define HDMI_CTS_EXT1               0x024
0035 #define HDMI_AUDIO_CTRL1            0x028
0036 #define HDMI_AUDIO_CTRL2            0x02c
0037 #define HDMI_I2S_AUDIO_CTRL         0x030
0038 #define HDMI_I2S_SWAP               0x040
0039 #define HDMI_AUDIO_STA_BIT_CTRL1        0x044
0040 #define HDMI_AUDIO_STA_BIT_CTRL2        0x048
0041 #define HDMI_AUDIO_SRC_NUM_AND_LENGTH       0x050
0042 #define HDMI_AV_CTRL1               0x054
0043 #define HDMI_VIDEO_CTRL1            0x058
0044 #define HDMI_DEEP_COLOR_MODE            0x05c
0045
0046 #define HDMI_EXT_VIDEO_PARA         0x0c0
0047 #define HDMI_EXT_HTOTAL_L           0x0c4
0048 #define HDMI_EXT_HTOTAL_H           0x0c8
0049 #define HDMI_EXT_HBLANK_L           0x0cc
0050 #define HDMI_EXT_HBLANK_H           0x0d0
0051 #define HDMI_EXT_HDELAY_L           0x0d4
0052 #define HDMI_EXT_HDELAY_H           0x0d8
0053 #define HDMI_EXT_HDURATION_L            0x0dc
0054 #define HDMI_EXT_HDURATION_H            0x0e0
0055 #define HDMI_EXT_VTOTAL_L           0x0e4
0056 #define HDMI_EXT_VTOTAL_H           0x0e8
0057 #define HDMI_AV_CTRL2               0x0ec
0058 #define HDMI_EXT_VBLANK_L           0x0f4
0059 #define HDMI_EXT_VBLANK_H           0x10c
0060 #define HDMI_EXT_VDELAY             0x0f8
0061 #define HDMI_EXT_VDURATION          0x0fc
0062
0063 #define HDMI_CP_MANU_SEND_CTRL          0x100
0064 #define HDMI_CP_AUTO_SEND_CTRL          0x104
0065 #define HDMI_AUTO_CHECKSUM_OPT          0x108
0066
0067 #define HDMI_VIDEO_CTRL2            0x114
0068
0069 #define HDMI_PHY_OPTION             0x144
0070
0071 #define HDMI_CP_BUF_INDEX           0x17c
0072 #define HDMI_CP_BUF_ACC_HB0         0x180
0073 #define HDMI_CP_BUF_ACC_HB1         0x184
0074 #define HDMI_CP_BUF_ACC_HB2         0x188
0075 #define HDMI_CP_BUF_ACC_PB0         0x18c
0076
0077 #define HDMI_DDC_READ_FIFO_ADDR         0x200
0078 #define HDMI_DDC_BUS_FREQ_L         0x204
0079 #define HDMI_DDC_BUS_FREQ_H         0x208
0080 #define HDMI_DDC_BUS_CTRL           0x2dc
0081 #define HDMI_DDC_I2C_LEN            0x278
0082 #define HDMI_DDC_I2C_OFFSET         0x280
0083 #define HDMI_DDC_I2C_CTRL           0x284
0084 #define HDMI_DDC_I2C_READ_BUF0          0x288
0085 #define HDMI_DDC_I2C_READ_BUF1          0x28c
0086 #define HDMI_DDC_I2C_READ_BUF2          0x290
0087 #define HDMI_DDC_I2C_READ_BUF3          0x294
0088 #define HDMI_DDC_I2C_WRITE_BUF0         0x298
0089 #define HDMI_DDC_I2C_WRITE_BUF1         0x29c
0090 #define HDMI_DDC_I2C_WRITE_BUF2         0x2a0
0091 #define HDMI_DDC_I2C_WRITE_BUF3         0x2a4
0092 #define HDMI_DDC_I2C_WRITE_BUF4         0x2ac
0093 #define HDMI_DDC_I2C_WRITE_BUF5         0x2b0
0094 #define HDMI_DDC_I2C_WRITE_BUF6         0x2b4
0095
0096 #define HDMI_INTR_MASK1             0x248
0097 #define HDMI_INTR_MASK2             0x24c
0098 #define HDMI_INTR_STATUS1           0x250
0099 #define HDMI_INTR_STATUS2           0x254
0100 #define HDMI_INTR_MASK3             0x258
0101 #define HDMI_INTR_MASK4             0x25c
0102 #define HDMI_INTR_STATUS3           0x260
0103 #define HDMI_INTR_STATUS4           0x264
0104
0105 #define HDMI_HDCP_CTRL              0x2bc
0106
0107 #define HDMI_EDID_SEGMENT_POINTER       0x310
0108 #define HDMI_EDID_WORD_ADDR         0x314
0109 #define HDMI_EDID_FIFO_ADDR         0x318
0110
0111 #define HDMI_HPG_MENS_STA           0x37c
0112
0113 #define HDMI_INTERNAL_CLK_DIVIDER       0x800
0114
0115 enum {
0116     /* HDMI_SYS_CTRL */
0117     HDMI_SYS_POWER_MODE_MASK = 0xf0,
0118     HDMI_SYS_POWER_MODE_A = 0x10,
0119     HDMI_SYS_POWER_MODE_B = 0x20,
0120     HDMI_SYS_POWER_MODE_D = 0x40,
0121     HDMI_SYS_POWER_MODE_E = 0x80,
0122     HDMI_SYS_PLL_RESET_MASK = 0x0c,
0123     HDMI_SYS_PLL_RESET = 0x0c,
0124     HDMI_SYS_PLLB_RESET = 0x08,
0125
0126     /* HDMI_LR_SWAP_N3 */
0127     HDMI_AUDIO_LR_SWAP_MASK = 0xf0,
0128     HDMI_AUDIO_LR_SWAP_SUBPACKET0 = 0x10,
0129     HDMI_AUDIO_LR_SWAP_SUBPACKET1 = 0x20,
0130     HDMI_AUDIO_LR_SWAP_SUBPACKET2 = 0x40,
0131     HDMI_AUDIO_LR_SWAP_SUBPACKET3 = 0x80,
0132     HDMI_AUDIO_N_19_16_MASK = 0x0f,
0133
0134     /* HDMI_AUDIO_CTRL1 */
0135     HDMI_AUDIO_EXTERNAL_CTS = BIT(7),
0136     HDMI_AUDIO_INPUT_IIS = 0,
0137     HDMI_AUDIO_INPUT_SPDIF = 0x08,
0138     HDMI_AUDIO_INPUT_MCLK_ACTIVE = 0x04,
0139     HDMI_AUDIO_INPUT_MCLK_DEACTIVE = 0,
0140     HDMI_AUDIO_INPUT_MCLK_RATE_128X = 0,
0141     HDMI_AUDIO_INPUT_MCLK_RATE_256X = 1,
0142     HDMI_AUDIO_INPUT_MCLK_RATE_384X = 2,
0143     HDMI_AUDIO_INPUT_MCLK_RATE_512X = 3,
0144
0145     /* HDMI_I2S_AUDIO_CTRL */
0146     HDMI_AUDIO_I2S_FORMAT_STANDARD = 0,
0147     HDMI_AUDIO_I2S_CHANNEL_1_2 = 0x04,
0148     HDMI_AUDIO_I2S_CHANNEL_3_4 = 0x0c,
0149     HDMI_AUDIO_I2S_CHANNEL_5_6 = 0x1c,
0150     HDMI_AUDIO_I2S_CHANNEL_7_8 = 0x3c,
0151
0152     /* HDMI_AV_CTRL1 */
0153     HDMI_AUDIO_SAMPLE_FRE_MASK = 0xf0,
0154     HDMI_AUDIO_SAMPLE_FRE_32000 = 0x30,
0155     HDMI_AUDIO_SAMPLE_FRE_44100 = 0,
0156     HDMI_AUDIO_SAMPLE_FRE_48000 = 0x20,
0157     HDMI_AUDIO_SAMPLE_FRE_88200 = 0x80,
0158     HDMI_AUDIO_SAMPLE_FRE_96000 = 0xa0,
0159     HDMI_AUDIO_SAMPLE_FRE_176400 = 0xc0,
0160     HDMI_AUDIO_SAMPLE_FRE_192000 = 0xe0,
0161     HDMI_AUDIO_SAMPLE_FRE_768000 = 0x90,
0162
0163     HDMI_VIDEO_INPUT_FORMAT_MASK = 0x0e,
0164     HDMI_VIDEO_INPUT_RGB_YCBCR444 = 0,
0165     HDMI_VIDEO_INPUT_YCBCR422 = 0x02,
0166     HDMI_VIDEO_DE_MASK = 0x1,
0167     HDMI_VIDEO_INTERNAL_DE = 0,
0168     HDMI_VIDEO_EXTERNAL_DE = 0x01,
0169
0170     /* HDMI_VIDEO_CTRL1 */
0171     HDMI_VIDEO_OUTPUT_FORMAT_MASK = 0xc0,
0172     HDMI_VIDEO_OUTPUT_RGB444 = 0,
0173     HDMI_VIDEO_OUTPUT_YCBCR444 = 0x40,
0174     HDMI_VIDEO_OUTPUT_YCBCR422 = 0x80,
0175     HDMI_VIDEO_INPUT_DATA_DEPTH_MASK = 0x30,
0176     HDMI_VIDEO_INPUT_DATA_DEPTH_12BIT = 0,
0177     HDMI_VIDEO_INPUT_DATA_DEPTH_10BIT = 0x10,
0178     HDMI_VIDEO_INPUT_DATA_DEPTH_8BIT = 0x30,
0179     HDMI_VIDEO_INPUT_COLOR_MASK = 1,
0180     HDMI_VIDEO_INPUT_COLOR_RGB = 0,
0181     HDMI_VIDEO_INPUT_COLOR_YCBCR = 1,
0182
0183     /* HDMI_EXT_VIDEO_PARA */
0184     HDMI_VIDEO_VSYNC_OFFSET_SHIFT = 4,
0185     HDMI_VIDEO_VSYNC_ACTIVE_HIGH = BIT(3),
0186     HDMI_VIDEO_VSYNC_ACTIVE_LOW = 0,
0187     HDMI_VIDEO_HSYNC_ACTIVE_HIGH = BIT(2),
0188     HDMI_VIDEO_HSYNC_ACTIVE_LOW = 0,
0189     HDMI_VIDEO_MODE_INTERLACE = BIT(1),
0190     HDMI_VIDEO_MODE_PROGRESSIVE = 0,
0191     HDMI_EXT_VIDEO_SET_EN = BIT(0),
0192
0193     /* HDMI_CP_AUTO_SEND_CTRL */
0194
0195     /* HDMI_VIDEO_CTRL2 */
0196     HDMI_VIDEO_AV_MUTE_MASK = 0xc0,
0197     HDMI_VIDEO_CLR_AV_MUTE = BIT(7),
0198     HDMI_VIDEO_SET_AV_MUTE = BIT(6),
0199     HDMI_AUDIO_CP_LOGIC_RESET_MASK = BIT(2),
0200     HDMI_AUDIO_CP_LOGIC_RESET = BIT(2),
0201     HDMI_VIDEO_AUDIO_DISABLE_MASK = 0x3,
0202     HDMI_AUDIO_DISABLE = BIT(1),
0203     HDMI_VIDEO_DISABLE = BIT(0),
0204
0205     /* HDMI_CP_BUF_INDEX */
0206     HDMI_INFOFRAME_VSI = 0x05,
0207     HDMI_INFOFRAME_AVI = 0x06,
0208     HDMI_INFOFRAME_AAI = 0x08,
0209
0210     /* HDMI_INTR_MASK1 */
0211     /* HDMI_INTR_STATUS1 */
0212     HDMI_INTR_HOTPLUG = BIT(7),
0213     HDMI_INTR_MSENS = BIT(6),
0214     HDMI_INTR_VSYNC = BIT(5),
0215     HDMI_INTR_AUDIO_FIFO_FULL = BIT(4),
0216     HDMI_INTR_EDID_MASK = 0x6,
0217     HDMI_INTR_EDID_READY = BIT(2),
0218     HDMI_INTR_EDID_ERR = BIT(1),
0219
0220     /* HDMI_HDCP_CTRL */
0221     HDMI_VIDEO_MODE_MASK = BIT(1),
0222     HDMI_VIDEO_MODE_HDMI = BIT(1),
0223
0224     /* HDMI_HPG_MENS_STA */
0225     HDMI_HPG_IN_STATUS_HIGH = BIT(7),
0226     HDMI_MSENS_IN_STATUS_HIGH = BIT(6),
0227 };
0228
0229 #endif /* __RK3066_HDMI_H__ */