drm/radeon/uvd_v3_1.c

0001 /*
0002  * Copyright 2013 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Christian König <christian.koenig@amd.com>
0023  */
0024
0025 #include "radeon.h"
0026 #include "radeon_asic.h"
0027 #include "nid.h"
0028
0029 /**
0030  * uvd_v3_1_semaphore_emit - emit semaphore command
0031  *
0032  * @rdev: radeon_device pointer
0033  * @ring: radeon_ring pointer
0034  * @semaphore: semaphore to emit commands for
0035  * @emit_wait: true if we should emit a wait command
0036  *
0037  * Emit a semaphore command (either wait or signal) to the UVD ring.
0038  */
0039 bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev,
0040                  struct radeon_ring *ring,
0041                  struct radeon_semaphore *semaphore,
0042                  bool emit_wait)
0043 {
0044     uint64_t addr = semaphore->gpu_addr;
0045
0046     radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0));
0047     radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
0048
0049     radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0));
0050     radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
0051
0052     radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0));
0053     radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0));
0054
0055     return true;
0056 }