drm/radeon/rs780_dpm.h

0001 /*
0002  * Copyright 2011 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef __RS780_DPM_H__
0024 #define __RS780_DPM_H__
0025
0026 enum rs780_vddc_level {
0027     RS780_VDDC_LEVEL_UNKNOWN = 0,
0028     RS780_VDDC_LEVEL_LOW = 1,
0029     RS780_VDDC_LEVEL_HIGH = 2,
0030 };
0031
0032 struct igp_power_info {
0033     /* flags */
0034     bool invert_pwm_required;
0035     bool pwm_voltage_control;
0036     bool voltage_control;
0037     bool gfx_clock_gating;
0038     /* stored values */
0039     u32 system_config;
0040     u32 bootup_uma_clk;
0041     u16 max_voltage;
0042     u16 min_voltage;
0043     u16 boot_voltage;
0044     u16 inter_voltage_low;
0045     u16 inter_voltage_high;
0046     u16 num_of_cycles_in_period;
0047     /* variable */
0048     int crtc_id;
0049     int refresh_rate;
0050 };
0051
0052 struct igp_ps {
0053     enum rs780_vddc_level min_voltage;
0054     enum rs780_vddc_level max_voltage;
0055     u32 sclk_low;
0056     u32 sclk_high;
0057     u32 flags;
0058 };
0059
0060 #define RS780_CGFTV_DFLT                 0x0303000f
0061 #define RS780_FBDIVTIMERVAL_DFLT         0x2710
0062
0063 #define RS780_FVTHROTUTC0_DFLT   0x04010040
0064 #define RS780_FVTHROTUTC1_DFLT   0x04010040
0065 #define RS780_FVTHROTUTC2_DFLT   0x04010040
0066 #define RS780_FVTHROTUTC3_DFLT   0x04010040
0067 #define RS780_FVTHROTUTC4_DFLT   0x04010040
0068
0069 #define RS780_FVTHROTDTC0_DFLT 0x04010040
0070 #define RS780_FVTHROTDTC1_DFLT 0x04010040
0071 #define RS780_FVTHROTDTC2_DFLT 0x04010040
0072 #define RS780_FVTHROTDTC3_DFLT 0x04010040
0073 #define RS780_FVTHROTDTC4_DFLT 0x04010040
0074
0075 #define RS780_FVTHROTFBUSREG0_DFLT       0x00001001
0076 #define RS780_FVTHROTFBUSREG1_DFLT       0x00002002
0077 #define RS780_FVTHROTFBDSREG0_DFLT       0x00004001
0078 #define RS780_FVTHROTFBDSREG1_DFLT       0x00020010
0079
0080 #define RS780_FVTHROTPWMUSREG0_DFLT      0x00002001
0081 #define RS780_FVTHROTPWMUSREG1_DFLT      0x00004003
0082 #define RS780_FVTHROTPWMDSREG0_DFLT      0x00002001
0083 #define RS780_FVTHROTPWMDSREG1_DFLT      0x00004003
0084
0085 #define RS780_FVTHROTPWMFBDIVRANGEREG0_DFLT  0x37
0086 #define RS780_FVTHROTPWMFBDIVRANGEREG1_DFLT  0x4b
0087 #define RS780_FVTHROTPWMFBDIVRANGEREG2_DFLT  0x8b
0088
0089 #define RS780D_FVTHROTPWMFBDIVRANGEREG0_DFLT  0x8b
0090 #define RS780D_FVTHROTPWMFBDIVRANGEREG1_DFLT  0x8c
0091 #define RS780D_FVTHROTPWMFBDIVRANGEREG2_DFLT  0xb5
0092
0093 #define RS880D_FVTHROTPWMFBDIVRANGEREG0_DFLT  0x8d
0094 #define RS880D_FVTHROTPWMFBDIVRANGEREG1_DFLT  0x8e
0095 #define RS880D_FVTHROTPWMFBDIVRANGEREG2_DFLT  0xBa
0096
0097 #define RS780_FVTHROTPWMRANGE0_GPIO_DFLT  0x1a
0098 #define RS780_FVTHROTPWMRANGE1_GPIO_DFLT  0x1a
0099 #define RS780_FVTHROTPWMRANGE2_GPIO_DFLT  0x0
0100 #define RS780_FVTHROTPWMRANGE3_GPIO_DFLT  0x0
0101
0102 #define RS780_SLOWCLKFEEDBACKDIV_DFLT 110
0103
0104 #define RS780_CGCLKGATING_DFLT           0x0000E204
0105
0106 #define RS780_DEFAULT_VCLK_FREQ  53300 /* 10 khz */
0107 #define RS780_DEFAULT_DCLK_FREQ  40000 /* 10 khz */
0108
0109 #endif