drm/radeon/radeon_ucode.h

0001 /*
0002  * Copyright 2012 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef __RADEON_UCODE_H__
0024 #define __RADEON_UCODE_H__
0025
0026 /* CP */
0027 #define R600_PFP_UCODE_SIZE          576
0028 #define R600_PM4_UCODE_SIZE          1792
0029 #define R700_PFP_UCODE_SIZE          848
0030 #define R700_PM4_UCODE_SIZE          1360
0031 #define EVERGREEN_PFP_UCODE_SIZE     1120
0032 #define EVERGREEN_PM4_UCODE_SIZE     1376
0033 #define CAYMAN_PFP_UCODE_SIZE        2176
0034 #define CAYMAN_PM4_UCODE_SIZE        2176
0035 #define SI_PFP_UCODE_SIZE            2144
0036 #define SI_PM4_UCODE_SIZE            2144
0037 #define SI_CE_UCODE_SIZE             2144
0038 #define CIK_PFP_UCODE_SIZE           2144
0039 #define CIK_ME_UCODE_SIZE            2144
0040 #define CIK_CE_UCODE_SIZE            2144
0041
0042 /* MEC */
0043 #define CIK_MEC_UCODE_SIZE           4192
0044
0045 /* RLC */
0046 #define R600_RLC_UCODE_SIZE          768
0047 #define R700_RLC_UCODE_SIZE          1024
0048 #define EVERGREEN_RLC_UCODE_SIZE     768
0049 #define CAYMAN_RLC_UCODE_SIZE        1024
0050 #define ARUBA_RLC_UCODE_SIZE         1536
0051 #define SI_RLC_UCODE_SIZE            2048
0052 #define BONAIRE_RLC_UCODE_SIZE       2048
0053 #define KB_RLC_UCODE_SIZE            2560
0054 #define KV_RLC_UCODE_SIZE            2560
0055 #define ML_RLC_UCODE_SIZE            2560
0056
0057 /* MC */
0058 #define BTC_MC_UCODE_SIZE            6024
0059 #define CAYMAN_MC_UCODE_SIZE         6037
0060 #define SI_MC_UCODE_SIZE             7769
0061 #define TAHITI_MC_UCODE_SIZE         7808
0062 #define PITCAIRN_MC_UCODE_SIZE       7775
0063 #define VERDE_MC_UCODE_SIZE          7875
0064 #define OLAND_MC_UCODE_SIZE          7863
0065 #define BONAIRE_MC_UCODE_SIZE        7866
0066 #define BONAIRE_MC2_UCODE_SIZE       7948
0067 #define HAWAII_MC_UCODE_SIZE         7933
0068 #define HAWAII_MC2_UCODE_SIZE        8091
0069
0070 /* SDMA */
0071 #define CIK_SDMA_UCODE_SIZE          1050
0072 #define CIK_SDMA_UCODE_VERSION       64
0073
0074 /* SMC */
0075 #define RV770_SMC_UCODE_START        0x0100
0076 #define RV770_SMC_UCODE_SIZE         0x410d
0077 #define RV770_SMC_INT_VECTOR_START   0xffc0
0078 #define RV770_SMC_INT_VECTOR_SIZE    0x0040
0079
0080 #define RV730_SMC_UCODE_START        0x0100
0081 #define RV730_SMC_UCODE_SIZE         0x412c
0082 #define RV730_SMC_INT_VECTOR_START   0xffc0
0083 #define RV730_SMC_INT_VECTOR_SIZE    0x0040
0084
0085 #define RV710_SMC_UCODE_START        0x0100
0086 #define RV710_SMC_UCODE_SIZE         0x3f1f
0087 #define RV710_SMC_INT_VECTOR_START   0xffc0
0088 #define RV710_SMC_INT_VECTOR_SIZE    0x0040
0089
0090 #define RV740_SMC_UCODE_START        0x0100
0091 #define RV740_SMC_UCODE_SIZE         0x41c5
0092 #define RV740_SMC_INT_VECTOR_START   0xffc0
0093 #define RV740_SMC_INT_VECTOR_SIZE    0x0040
0094
0095 #define CEDAR_SMC_UCODE_START        0x0100
0096 #define CEDAR_SMC_UCODE_SIZE         0x5d50
0097 #define CEDAR_SMC_INT_VECTOR_START   0xffc0
0098 #define CEDAR_SMC_INT_VECTOR_SIZE    0x0040
0099
0100 #define REDWOOD_SMC_UCODE_START      0x0100
0101 #define REDWOOD_SMC_UCODE_SIZE       0x5f0a
0102 #define REDWOOD_SMC_INT_VECTOR_START 0xffc0
0103 #define REDWOOD_SMC_INT_VECTOR_SIZE  0x0040
0104
0105 #define JUNIPER_SMC_UCODE_START      0x0100
0106 #define JUNIPER_SMC_UCODE_SIZE       0x5f1f
0107 #define JUNIPER_SMC_INT_VECTOR_START 0xffc0
0108 #define JUNIPER_SMC_INT_VECTOR_SIZE  0x0040
0109
0110 #define CYPRESS_SMC_UCODE_START      0x0100
0111 #define CYPRESS_SMC_UCODE_SIZE       0x61f7
0112 #define CYPRESS_SMC_INT_VECTOR_START 0xffc0
0113 #define CYPRESS_SMC_INT_VECTOR_SIZE  0x0040
0114
0115 #define BARTS_SMC_UCODE_START        0x0100
0116 #define BARTS_SMC_UCODE_SIZE         0x6107
0117 #define BARTS_SMC_INT_VECTOR_START   0xffc0
0118 #define BARTS_SMC_INT_VECTOR_SIZE    0x0040
0119
0120 #define TURKS_SMC_UCODE_START        0x0100
0121 #define TURKS_SMC_UCODE_SIZE         0x605b
0122 #define TURKS_SMC_INT_VECTOR_START   0xffc0
0123 #define TURKS_SMC_INT_VECTOR_SIZE    0x0040
0124
0125 #define CAICOS_SMC_UCODE_START       0x0100
0126 #define CAICOS_SMC_UCODE_SIZE        0x5fbd
0127 #define CAICOS_SMC_INT_VECTOR_START  0xffc0
0128 #define CAICOS_SMC_INT_VECTOR_SIZE   0x0040
0129
0130 #define CAYMAN_SMC_UCODE_START       0x0100
0131 #define CAYMAN_SMC_UCODE_SIZE        0x79ec
0132 #define CAYMAN_SMC_INT_VECTOR_START  0xffc0
0133 #define CAYMAN_SMC_INT_VECTOR_SIZE   0x0040
0134
0135 #define TAHITI_SMC_UCODE_START       0x10000
0136 #define TAHITI_SMC_UCODE_SIZE        0xf458
0137
0138 #define PITCAIRN_SMC_UCODE_START     0x10000
0139 #define PITCAIRN_SMC_UCODE_SIZE      0xe9f4
0140
0141 #define VERDE_SMC_UCODE_START        0x10000
0142 #define VERDE_SMC_UCODE_SIZE         0xebe4
0143
0144 #define OLAND_SMC_UCODE_START        0x10000
0145 #define OLAND_SMC_UCODE_SIZE         0xe7b4
0146
0147 #define HAINAN_SMC_UCODE_START       0x10000
0148 #define HAINAN_SMC_UCODE_SIZE        0xe67C
0149
0150 #define BONAIRE_SMC_UCODE_START      0x20000
0151 #define BONAIRE_SMC_UCODE_SIZE       0x1FDEC
0152
0153 #define HAWAII_SMC_UCODE_START       0x20000
0154 #define HAWAII_SMC_UCODE_SIZE        0x1FDEC
0155
0156 struct common_firmware_header {
0157     uint32_t size_bytes; /* size of the entire header+image(s) in bytes */
0158     uint32_t header_size_bytes; /* size of just the header in bytes */
0159     uint16_t header_version_major; /* header version */
0160     uint16_t header_version_minor; /* header version */
0161     uint16_t ip_version_major; /* IP version */
0162     uint16_t ip_version_minor; /* IP version */
0163     uint32_t ucode_version;
0164     uint32_t ucode_size_bytes; /* size of ucode in bytes */
0165     uint32_t ucode_array_offset_bytes; /* payload offset from the start of the header */
0166     uint32_t crc32;  /* crc32 checksum of the payload */
0167 };
0168
0169 /* version_major=1, version_minor=0 */
0170 struct mc_firmware_header_v1_0 {
0171     struct common_firmware_header header;
0172     uint32_t io_debug_size_bytes; /* size of debug array in dwords */
0173     uint32_t io_debug_array_offset_bytes; /* payload offset from the start of the header */
0174 };
0175
0176 /* version_major=1, version_minor=0 */
0177 struct smc_firmware_header_v1_0 {
0178     struct common_firmware_header header;
0179     uint32_t ucode_start_addr;
0180 };
0181
0182 /* version_major=1, version_minor=0 */
0183 struct gfx_firmware_header_v1_0 {
0184     struct common_firmware_header header;
0185     uint32_t ucode_feature_version;
0186     uint32_t jt_offset; /* jt location */
0187     uint32_t jt_size;  /* size of jt */
0188 };
0189
0190 /* version_major=1, version_minor=0 */
0191 struct rlc_firmware_header_v1_0 {
0192     struct common_firmware_header header;
0193     uint32_t ucode_feature_version;
0194     uint32_t save_and_restore_offset;
0195     uint32_t clear_state_descriptor_offset;
0196     uint32_t avail_scratch_ram_locations;
0197     uint32_t master_pkt_description_offset;
0198 };
0199
0200 /* version_major=1, version_minor=0 */
0201 struct sdma_firmware_header_v1_0 {
0202     struct common_firmware_header header;
0203     uint32_t ucode_feature_version;
0204     uint32_t ucode_change_version;
0205     uint32_t jt_offset; /* jt location */
0206     uint32_t jt_size; /* size of jt */
0207 };
0208
0209 /* header is fixed size */
0210 union radeon_firmware_header {
0211     struct common_firmware_header common;
0212     struct mc_firmware_header_v1_0 mc;
0213     struct smc_firmware_header_v1_0 smc;
0214     struct gfx_firmware_header_v1_0 gfx;
0215     struct rlc_firmware_header_v1_0 rlc;
0216     struct sdma_firmware_header_v1_0 sdma;
0217     uint8_t raw[0x100];
0218 };
0219
0220 void radeon_ucode_print_mc_hdr(const struct common_firmware_header *hdr);
0221 void radeon_ucode_print_smc_hdr(const struct common_firmware_header *hdr);
0222 void radeon_ucode_print_gfx_hdr(const struct common_firmware_header *hdr);
0223 void radeon_ucode_print_rlc_hdr(const struct common_firmware_header *hdr);
0224 void radeon_ucode_print_sdma_hdr(const struct common_firmware_header *hdr);
0225 int radeon_ucode_validate(const struct firmware *fw);
0226
0227 #endif