drm/radeon/radeon_ucode.c

0001 /*
0002  * Copyright 2014 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023
0024 #include <linux/firmware.h>
0025 #include <linux/slab.h>
0026 #include <linux/module.h>
0027
0028 #include "radeon.h"
0029 #include "radeon_ucode.h"
0030
0031 static void radeon_ucode_print_common_hdr(const struct common_firmware_header *hdr)
0032 {
0033     DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
0034     DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
0035     DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
0036     DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
0037     DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
0038     DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
0039     DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
0040     DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
0041     DRM_DEBUG("ucode_array_offset_bytes: %u\n",
0042           le32_to_cpu(hdr->ucode_array_offset_bytes));
0043     DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
0044 }
0045
0046 void radeon_ucode_print_mc_hdr(const struct common_firmware_header *hdr)
0047 {
0048     uint16_t version_major = le16_to_cpu(hdr->header_version_major);
0049     uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
0050
0051     DRM_DEBUG("MC\n");
0052     radeon_ucode_print_common_hdr(hdr);
0053
0054     if (version_major == 1) {
0055         const struct mc_firmware_header_v1_0 *mc_hdr =
0056             container_of(hdr, struct mc_firmware_header_v1_0, header);
0057
0058         DRM_DEBUG("io_debug_size_bytes: %u\n",
0059               le32_to_cpu(mc_hdr->io_debug_size_bytes));
0060         DRM_DEBUG("io_debug_array_offset_bytes: %u\n",
0061               le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));
0062     } else {
0063         DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor);
0064     }
0065 }
0066
0067 void radeon_ucode_print_smc_hdr(const struct common_firmware_header *hdr)
0068 {
0069     uint16_t version_major = le16_to_cpu(hdr->header_version_major);
0070     uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
0071
0072     DRM_DEBUG("SMC\n");
0073     radeon_ucode_print_common_hdr(hdr);
0074
0075     if (version_major == 1) {
0076         const struct smc_firmware_header_v1_0 *smc_hdr =
0077             container_of(hdr, struct smc_firmware_header_v1_0, header);
0078
0079         DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
0080     } else {
0081         DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor);
0082     }
0083 }
0084
0085 void radeon_ucode_print_gfx_hdr(const struct common_firmware_header *hdr)
0086 {
0087     uint16_t version_major = le16_to_cpu(hdr->header_version_major);
0088     uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
0089
0090     DRM_DEBUG("GFX\n");
0091     radeon_ucode_print_common_hdr(hdr);
0092
0093     if (version_major == 1) {
0094         const struct gfx_firmware_header_v1_0 *gfx_hdr =
0095             container_of(hdr, struct gfx_firmware_header_v1_0, header);
0096
0097         DRM_DEBUG("ucode_feature_version: %u\n",
0098               le32_to_cpu(gfx_hdr->ucode_feature_version));
0099         DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
0100         DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
0101     } else {
0102         DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor);
0103     }
0104 }
0105
0106 void radeon_ucode_print_rlc_hdr(const struct common_firmware_header *hdr)
0107 {
0108     uint16_t version_major = le16_to_cpu(hdr->header_version_major);
0109     uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
0110
0111     DRM_DEBUG("RLC\n");
0112     radeon_ucode_print_common_hdr(hdr);
0113
0114     if (version_major == 1) {
0115         const struct rlc_firmware_header_v1_0 *rlc_hdr =
0116             container_of(hdr, struct rlc_firmware_header_v1_0, header);
0117
0118         DRM_DEBUG("ucode_feature_version: %u\n",
0119               le32_to_cpu(rlc_hdr->ucode_feature_version));
0120         DRM_DEBUG("save_and_restore_offset: %u\n",
0121               le32_to_cpu(rlc_hdr->save_and_restore_offset));
0122         DRM_DEBUG("clear_state_descriptor_offset: %u\n",
0123               le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));
0124         DRM_DEBUG("avail_scratch_ram_locations: %u\n",
0125               le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));
0126         DRM_DEBUG("master_pkt_description_offset: %u\n",
0127               le32_to_cpu(rlc_hdr->master_pkt_description_offset));
0128     } else {
0129         DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor);
0130     }
0131 }
0132
0133 void radeon_ucode_print_sdma_hdr(const struct common_firmware_header *hdr)
0134 {
0135     uint16_t version_major = le16_to_cpu(hdr->header_version_major);
0136     uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
0137
0138     DRM_DEBUG("SDMA\n");
0139     radeon_ucode_print_common_hdr(hdr);
0140
0141     if (version_major == 1) {
0142         const struct sdma_firmware_header_v1_0 *sdma_hdr =
0143             container_of(hdr, struct sdma_firmware_header_v1_0, header);
0144
0145         DRM_DEBUG("ucode_feature_version: %u\n",
0146               le32_to_cpu(sdma_hdr->ucode_feature_version));
0147         DRM_DEBUG("ucode_change_version: %u\n",
0148               le32_to_cpu(sdma_hdr->ucode_change_version));
0149         DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));
0150         DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));
0151     } else {
0152         DRM_ERROR("Unknown SDMA ucode version: %u.%u\n",
0153               version_major, version_minor);
0154     }
0155 }
0156
0157 int radeon_ucode_validate(const struct firmware *fw)
0158 {
0159     const struct common_firmware_header *hdr =
0160         (const struct common_firmware_header *)fw->data;
0161
0162     if (fw->size == le32_to_cpu(hdr->size_bytes))
0163         return 0;
0164
0165     return -EINVAL;
0166 }
0167