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0029 #include <linux/pci.h>
0030 #include <linux/pm_runtime.h>
0031
0032 #include <drm/drm_crtc_helper.h>
0033 #include <drm/drm_device.h>
0034 #include <drm/drm_drv.h>
0035 #include <drm/drm_probe_helper.h>
0036 #include <drm/drm_vblank.h>
0037 #include <drm/radeon_drm.h>
0038
0039 #include "atom.h"
0040 #include "radeon.h"
0041 #include "radeon_kms.h"
0042 #include "radeon_reg.h"
0043
0044
0045 #define RADEON_WAIT_IDLE_TIMEOUT 200
0046
0047
0048
0049
0050
0051
0052
0053
0054 static irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
0055 {
0056 struct drm_device *dev = (struct drm_device *) arg;
0057 struct radeon_device *rdev = dev->dev_private;
0058 irqreturn_t ret;
0059
0060 ret = radeon_irq_process(rdev);
0061 if (ret == IRQ_HANDLED)
0062 pm_runtime_mark_last_busy(dev->dev);
0063 return ret;
0064 }
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080 static void radeon_hotplug_work_func(struct work_struct *work)
0081 {
0082 struct radeon_device *rdev = container_of(work, struct radeon_device,
0083 hotplug_work.work);
0084 struct drm_device *dev = rdev->ddev;
0085 struct drm_mode_config *mode_config = &dev->mode_config;
0086 struct drm_connector *connector;
0087
0088
0089
0090 if (!rdev->mode_info.mode_config_initialized)
0091 return;
0092
0093 mutex_lock(&mode_config->mutex);
0094 list_for_each_entry(connector, &mode_config->connector_list, head)
0095 radeon_connector_hotplug(connector);
0096 mutex_unlock(&mode_config->mutex);
0097
0098 drm_helper_hpd_irq_event(dev);
0099 }
0100
0101 static void radeon_dp_work_func(struct work_struct *work)
0102 {
0103 struct radeon_device *rdev = container_of(work, struct radeon_device,
0104 dp_work);
0105 struct drm_device *dev = rdev->ddev;
0106 struct drm_mode_config *mode_config = &dev->mode_config;
0107 struct drm_connector *connector;
0108
0109
0110 list_for_each_entry(connector, &mode_config->connector_list, head)
0111 radeon_connector_hotplug(connector);
0112 }
0113
0114
0115
0116
0117
0118
0119
0120
0121 static void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
0122 {
0123 struct radeon_device *rdev = dev->dev_private;
0124 unsigned long irqflags;
0125 unsigned i;
0126
0127 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0128
0129 for (i = 0; i < RADEON_NUM_RINGS; i++)
0130 atomic_set(&rdev->irq.ring_int[i], 0);
0131 rdev->irq.dpm_thermal = false;
0132 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
0133 rdev->irq.hpd[i] = false;
0134 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
0135 rdev->irq.crtc_vblank_int[i] = false;
0136 atomic_set(&rdev->irq.pflip[i], 0);
0137 rdev->irq.afmt[i] = false;
0138 }
0139 radeon_irq_set(rdev);
0140 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0141
0142 radeon_irq_process(rdev);
0143 }
0144
0145
0146
0147
0148
0149
0150
0151
0152
0153 static int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
0154 {
0155 struct radeon_device *rdev = dev->dev_private;
0156
0157 if (ASIC_IS_AVIVO(rdev))
0158 dev->max_vblank_count = 0x00ffffff;
0159 else
0160 dev->max_vblank_count = 0x001fffff;
0161
0162 return 0;
0163 }
0164
0165
0166
0167
0168
0169
0170
0171
0172 static void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
0173 {
0174 struct radeon_device *rdev = dev->dev_private;
0175 unsigned long irqflags;
0176 unsigned i;
0177
0178 if (rdev == NULL) {
0179 return;
0180 }
0181 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0182
0183 for (i = 0; i < RADEON_NUM_RINGS; i++)
0184 atomic_set(&rdev->irq.ring_int[i], 0);
0185 rdev->irq.dpm_thermal = false;
0186 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
0187 rdev->irq.hpd[i] = false;
0188 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
0189 rdev->irq.crtc_vblank_int[i] = false;
0190 atomic_set(&rdev->irq.pflip[i], 0);
0191 rdev->irq.afmt[i] = false;
0192 }
0193 radeon_irq_set(rdev);
0194 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0195 }
0196
0197 static int radeon_irq_install(struct radeon_device *rdev, int irq)
0198 {
0199 struct drm_device *dev = rdev->ddev;
0200 int ret;
0201
0202 if (irq == IRQ_NOTCONNECTED)
0203 return -ENOTCONN;
0204
0205 radeon_driver_irq_preinstall_kms(dev);
0206
0207
0208 ret = request_irq(irq, radeon_driver_irq_handler_kms,
0209 IRQF_SHARED, dev->driver->name, dev);
0210 if (ret)
0211 return ret;
0212
0213 radeon_driver_irq_postinstall_kms(dev);
0214
0215 return 0;
0216 }
0217
0218 static void radeon_irq_uninstall(struct radeon_device *rdev)
0219 {
0220 struct drm_device *dev = rdev->ddev;
0221 struct pci_dev *pdev = to_pci_dev(dev->dev);
0222
0223 radeon_driver_irq_uninstall_kms(dev);
0224 free_irq(pdev->irq, dev);
0225 }
0226
0227
0228
0229
0230
0231
0232
0233
0234
0235
0236
0237 static bool radeon_msi_ok(struct radeon_device *rdev)
0238 {
0239
0240 if (rdev->family < CHIP_RV380)
0241 return false;
0242
0243
0244 if (rdev->flags & RADEON_IS_AGP)
0245 return false;
0246
0247
0248
0249
0250
0251
0252 if (rdev->family < CHIP_BONAIRE) {
0253 dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
0254 rdev->pdev->no_64bit_msi = 1;
0255 }
0256
0257
0258 if (radeon_msi == 1)
0259 return true;
0260 else if (radeon_msi == 0)
0261 return false;
0262
0263
0264
0265 if ((rdev->pdev->device == 0x791f) &&
0266 (rdev->pdev->subsystem_vendor == 0x103c) &&
0267 (rdev->pdev->subsystem_device == 0x30c2))
0268 return true;
0269
0270
0271 if ((rdev->pdev->device == 0x791f) &&
0272 (rdev->pdev->subsystem_vendor == 0x1028) &&
0273 (rdev->pdev->subsystem_device == 0x01fc))
0274 return true;
0275
0276
0277 if ((rdev->pdev->device == 0x791f) &&
0278 (rdev->pdev->subsystem_vendor == 0x1028) &&
0279 (rdev->pdev->subsystem_device == 0x01fd))
0280 return true;
0281
0282
0283 if ((rdev->pdev->device == 0x791f) &&
0284 (rdev->pdev->subsystem_vendor == 0x107b) &&
0285 (rdev->pdev->subsystem_device == 0x0185))
0286 return true;
0287
0288
0289 if (rdev->family == CHIP_RS690)
0290 return true;
0291
0292
0293
0294
0295
0296 if (rdev->family == CHIP_RV515)
0297 return false;
0298 if (rdev->flags & RADEON_IS_IGP) {
0299
0300 if (rdev->family >= CHIP_PALM)
0301 return true;
0302
0303 return false;
0304 }
0305
0306 return true;
0307 }
0308
0309
0310
0311
0312
0313
0314
0315
0316
0317 int radeon_irq_kms_init(struct radeon_device *rdev)
0318 {
0319 int r = 0;
0320
0321 spin_lock_init(&rdev->irq.lock);
0322
0323
0324 rdev->ddev->vblank_disable_immediate = true;
0325
0326 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
0327 if (r) {
0328 return r;
0329 }
0330
0331
0332 rdev->msi_enabled = 0;
0333
0334 if (radeon_msi_ok(rdev)) {
0335 int ret = pci_enable_msi(rdev->pdev);
0336 if (!ret) {
0337 rdev->msi_enabled = 1;
0338 dev_info(rdev->dev, "radeon: using MSI.\n");
0339 }
0340 }
0341
0342 INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
0343 INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
0344 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
0345
0346 rdev->irq.installed = true;
0347 r = radeon_irq_install(rdev, rdev->pdev->irq);
0348 if (r) {
0349 rdev->irq.installed = false;
0350 flush_delayed_work(&rdev->hotplug_work);
0351 return r;
0352 }
0353
0354 DRM_INFO("radeon: irq initialized.\n");
0355 return 0;
0356 }
0357
0358
0359
0360
0361
0362
0363
0364
0365 void radeon_irq_kms_fini(struct radeon_device *rdev)
0366 {
0367 if (rdev->irq.installed) {
0368 radeon_irq_uninstall(rdev);
0369 rdev->irq.installed = false;
0370 if (rdev->msi_enabled)
0371 pci_disable_msi(rdev->pdev);
0372 flush_delayed_work(&rdev->hotplug_work);
0373 }
0374 }
0375
0376
0377
0378
0379
0380
0381
0382
0383
0384
0385
0386 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
0387 {
0388 unsigned long irqflags;
0389
0390 if (!rdev->irq.installed)
0391 return;
0392
0393 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
0394 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0395 radeon_irq_set(rdev);
0396 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0397 }
0398 }
0399
0400
0401
0402
0403
0404
0405
0406
0407
0408
0409
0410 bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
0411 {
0412 return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
0413 }
0414
0415
0416
0417
0418
0419
0420
0421
0422
0423
0424
0425 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
0426 {
0427 unsigned long irqflags;
0428
0429 if (!rdev->irq.installed)
0430 return;
0431
0432 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
0433 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0434 radeon_irq_set(rdev);
0435 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0436 }
0437 }
0438
0439
0440
0441
0442
0443
0444
0445
0446
0447
0448 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
0449 {
0450 unsigned long irqflags;
0451
0452 if (crtc < 0 || crtc >= rdev->num_crtc)
0453 return;
0454
0455 if (!rdev->irq.installed)
0456 return;
0457
0458 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
0459 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0460 radeon_irq_set(rdev);
0461 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0462 }
0463 }
0464
0465
0466
0467
0468
0469
0470
0471
0472
0473
0474 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
0475 {
0476 unsigned long irqflags;
0477
0478 if (crtc < 0 || crtc >= rdev->num_crtc)
0479 return;
0480
0481 if (!rdev->irq.installed)
0482 return;
0483
0484 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
0485 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0486 radeon_irq_set(rdev);
0487 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0488 }
0489 }
0490
0491
0492
0493
0494
0495
0496
0497
0498
0499 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
0500 {
0501 unsigned long irqflags;
0502
0503 if (!rdev->irq.installed)
0504 return;
0505
0506 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0507 rdev->irq.afmt[block] = true;
0508 radeon_irq_set(rdev);
0509 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0510
0511 }
0512
0513
0514
0515
0516
0517
0518
0519
0520
0521 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
0522 {
0523 unsigned long irqflags;
0524
0525 if (!rdev->irq.installed)
0526 return;
0527
0528 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0529 rdev->irq.afmt[block] = false;
0530 radeon_irq_set(rdev);
0531 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0532 }
0533
0534
0535
0536
0537
0538
0539
0540
0541
0542 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
0543 {
0544 unsigned long irqflags;
0545 int i;
0546
0547 if (!rdev->irq.installed)
0548 return;
0549
0550 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0551 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
0552 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
0553 radeon_irq_set(rdev);
0554 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0555 }
0556
0557
0558
0559
0560
0561
0562
0563
0564
0565 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
0566 {
0567 unsigned long irqflags;
0568 int i;
0569
0570 if (!rdev->irq.installed)
0571 return;
0572
0573 spin_lock_irqsave(&rdev->irq.lock, irqflags);
0574 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
0575 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
0576 radeon_irq_set(rdev);
0577 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
0578 }
0579
0580
0581
0582
0583
0584
0585
0586
0587
0588
0589
0590
0591
0592
0593
0594
0595
0596
0597 void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
0598 u32 reg, u32 mask,
0599 bool enable, const char *name, unsigned n)
0600 {
0601 u32 tmp = RREG32(reg);
0602
0603
0604 if (!!(tmp & mask) == enable)
0605 return;
0606
0607 if (enable) {
0608 DRM_DEBUG("%s%d interrupts enabled\n", name, n);
0609 WREG32(reg, tmp |= mask);
0610 } else {
0611 DRM_DEBUG("%s%d interrupts disabled\n", name, n);
0612 WREG32(reg, tmp & ~mask);
0613 }
0614 }