0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027 #include <drm/display/drm_dp_mst_helper.h>
0028 #include <drm/drm_edid.h>
0029 #include <drm/drm_crtc_helper.h>
0030 #include <drm/drm_fb_helper.h>
0031 #include <drm/drm_probe_helper.h>
0032 #include <drm/radeon_drm.h>
0033 #include "radeon.h"
0034 #include "radeon_audio.h"
0035 #include "atom.h"
0036
0037 #include <linux/pm_runtime.h>
0038 #include <linux/vga_switcheroo.h>
0039
0040 static int radeon_dp_handle_hpd(struct drm_connector *connector)
0041 {
0042 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0043 int ret;
0044
0045 ret = radeon_dp_mst_check_status(radeon_connector);
0046 if (ret == -EINVAL)
0047 return 1;
0048 return 0;
0049 }
0050 void radeon_connector_hotplug(struct drm_connector *connector)
0051 {
0052 struct drm_device *dev = connector->dev;
0053 struct radeon_device *rdev = dev->dev_private;
0054 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0055
0056 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
0057 struct radeon_connector_atom_dig *dig_connector =
0058 radeon_connector->con_priv;
0059
0060 if (radeon_connector->is_mst_connector)
0061 return;
0062 if (dig_connector->is_mst) {
0063 radeon_dp_handle_hpd(connector);
0064 return;
0065 }
0066 }
0067
0068
0069
0070 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
0071 return;
0072
0073 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
0074
0075
0076
0077 if (connector->dpms != DRM_MODE_DPMS_ON)
0078 return;
0079
0080
0081 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
0082 struct radeon_connector_atom_dig *dig_connector =
0083 radeon_connector->con_priv;
0084
0085
0086 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
0087 return;
0088
0089
0090 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
0091
0092
0093
0094 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT &&
0095 radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) &&
0096 radeon_dp_needs_link_train(radeon_connector)) {
0097
0098 if (!radeon_dp_getdpcd(radeon_connector))
0099 return;
0100
0101
0102
0103
0104 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
0105 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
0106 }
0107 }
0108 }
0109
0110 static void radeon_property_change_mode(struct drm_encoder *encoder)
0111 {
0112 struct drm_crtc *crtc = encoder->crtc;
0113
0114 if (crtc && crtc->enabled) {
0115 drm_crtc_helper_set_mode(crtc, &crtc->mode,
0116 crtc->x, crtc->y, crtc->primary->fb);
0117 }
0118 }
0119
0120 int radeon_get_monitor_bpc(struct drm_connector *connector)
0121 {
0122 struct drm_device *dev = connector->dev;
0123 struct radeon_device *rdev = dev->dev_private;
0124 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0125 struct radeon_connector_atom_dig *dig_connector;
0126 int bpc = 8;
0127 int mode_clock, max_tmds_clock;
0128
0129 switch (connector->connector_type) {
0130 case DRM_MODE_CONNECTOR_DVII:
0131 case DRM_MODE_CONNECTOR_HDMIB:
0132 if (radeon_connector->use_digital) {
0133 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
0134 if (connector->display_info.bpc)
0135 bpc = connector->display_info.bpc;
0136 }
0137 }
0138 break;
0139 case DRM_MODE_CONNECTOR_DVID:
0140 case DRM_MODE_CONNECTOR_HDMIA:
0141 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
0142 if (connector->display_info.bpc)
0143 bpc = connector->display_info.bpc;
0144 }
0145 break;
0146 case DRM_MODE_CONNECTOR_DisplayPort:
0147 dig_connector = radeon_connector->con_priv;
0148 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
0149 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
0150 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
0151 if (connector->display_info.bpc)
0152 bpc = connector->display_info.bpc;
0153 }
0154 break;
0155 case DRM_MODE_CONNECTOR_eDP:
0156 case DRM_MODE_CONNECTOR_LVDS:
0157 if (connector->display_info.bpc)
0158 bpc = connector->display_info.bpc;
0159 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
0160 const struct drm_connector_helper_funcs *connector_funcs =
0161 connector->helper_private;
0162 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
0163 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
0164 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
0165
0166 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
0167 bpc = 6;
0168 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
0169 bpc = 8;
0170 }
0171 break;
0172 }
0173
0174 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
0175
0176 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
0177 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
0178 connector->name, bpc);
0179 bpc = 8;
0180 }
0181
0182
0183
0184
0185
0186
0187
0188 if (bpc > 12) {
0189 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
0190 connector->name, bpc);
0191 bpc = 12;
0192 }
0193
0194
0195 if (connector->display_info.max_tmds_clock > 0) {
0196
0197 mode_clock = radeon_connector->pixelclock_for_modeset;
0198
0199
0200 max_tmds_clock = connector->display_info.max_tmds_clock;
0201
0202 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
0203 connector->name, mode_clock, max_tmds_clock);
0204
0205
0206 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
0207 if ((connector->display_info.edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) &&
0208 (mode_clock * 5/4 <= max_tmds_clock))
0209 bpc = 10;
0210 else
0211 bpc = 8;
0212
0213 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
0214 connector->name, bpc);
0215 }
0216
0217 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
0218 bpc = 8;
0219 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
0220 connector->name, bpc);
0221 }
0222 }
0223 else if (bpc > 8) {
0224
0225 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
0226 connector->name);
0227 bpc = 8;
0228 }
0229 }
0230
0231 if ((radeon_deep_color == 0) && (bpc > 8)) {
0232 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
0233 connector->name);
0234 bpc = 8;
0235 }
0236
0237 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
0238 connector->name, connector->display_info.bpc, bpc);
0239
0240 return bpc;
0241 }
0242
0243 static void
0244 radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
0245 {
0246 struct drm_device *dev = connector->dev;
0247 struct radeon_device *rdev = dev->dev_private;
0248 struct drm_encoder *best_encoder;
0249 struct drm_encoder *encoder;
0250 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
0251 bool connected;
0252
0253 best_encoder = connector_funcs->best_encoder(connector);
0254
0255 drm_connector_for_each_possible_encoder(connector, encoder) {
0256 if ((encoder == best_encoder) && (status == connector_status_connected))
0257 connected = true;
0258 else
0259 connected = false;
0260
0261 if (rdev->is_atom_bios)
0262 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
0263 else
0264 radeon_combios_connected_scratch_regs(connector, encoder, connected);
0265 }
0266 }
0267
0268 static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
0269 {
0270 struct drm_encoder *encoder;
0271
0272 drm_connector_for_each_possible_encoder(connector, encoder) {
0273 if (encoder->encoder_type == encoder_type)
0274 return encoder;
0275 }
0276
0277 return NULL;
0278 }
0279
0280 struct edid *radeon_connector_edid(struct drm_connector *connector)
0281 {
0282 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0283 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
0284
0285 if (radeon_connector->edid) {
0286 return radeon_connector->edid;
0287 } else if (edid_blob) {
0288 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
0289 if (edid)
0290 radeon_connector->edid = edid;
0291 }
0292 return radeon_connector->edid;
0293 }
0294
0295 static void radeon_connector_get_edid(struct drm_connector *connector)
0296 {
0297 struct drm_device *dev = connector->dev;
0298 struct radeon_device *rdev = dev->dev_private;
0299 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0300
0301 if (radeon_connector->edid)
0302 return;
0303
0304
0305 if (radeon_connector->router.ddc_valid)
0306 radeon_router_select_ddc_port(radeon_connector);
0307
0308 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
0309 ENCODER_OBJECT_ID_NONE) &&
0310 radeon_connector->ddc_bus->has_aux) {
0311 radeon_connector->edid = drm_get_edid(connector,
0312 &radeon_connector->ddc_bus->aux.ddc);
0313 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
0314 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
0315 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
0316
0317 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
0318 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
0319 radeon_connector->ddc_bus->has_aux)
0320 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
0321 &radeon_connector->ddc_bus->aux.ddc);
0322 else if (radeon_connector->ddc_bus)
0323 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
0324 &radeon_connector->ddc_bus->adapter);
0325 } else if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC &&
0326 connector->connector_type == DRM_MODE_CONNECTOR_LVDS &&
0327 radeon_connector->ddc_bus) {
0328 radeon_connector->edid = drm_get_edid_switcheroo(&radeon_connector->base,
0329 &radeon_connector->ddc_bus->adapter);
0330 } else if (radeon_connector->ddc_bus) {
0331 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
0332 &radeon_connector->ddc_bus->adapter);
0333 }
0334
0335 if (!radeon_connector->edid) {
0336
0337
0338
0339 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
0340 return;
0341
0342 if (rdev->is_atom_bios) {
0343
0344 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
0345 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
0346 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
0347 } else {
0348
0349 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
0350 }
0351 }
0352 }
0353
0354 static void radeon_connector_free_edid(struct drm_connector *connector)
0355 {
0356 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0357
0358 if (radeon_connector->edid) {
0359 kfree(radeon_connector->edid);
0360 radeon_connector->edid = NULL;
0361 }
0362 }
0363
0364 static int radeon_ddc_get_modes(struct drm_connector *connector)
0365 {
0366 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0367 int ret;
0368
0369 if (radeon_connector->edid) {
0370 drm_connector_update_edid_property(connector, radeon_connector->edid);
0371 ret = drm_add_edid_modes(connector, radeon_connector->edid);
0372 return ret;
0373 }
0374 drm_connector_update_edid_property(connector, NULL);
0375 return 0;
0376 }
0377
0378 static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
0379 {
0380 struct drm_encoder *encoder;
0381
0382
0383 drm_connector_for_each_possible_encoder(connector, encoder)
0384 return encoder;
0385
0386 return NULL;
0387 }
0388
0389 static void radeon_get_native_mode(struct drm_connector *connector)
0390 {
0391 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0392 struct radeon_encoder *radeon_encoder;
0393
0394 if (encoder == NULL)
0395 return;
0396
0397 radeon_encoder = to_radeon_encoder(encoder);
0398
0399 if (!list_empty(&connector->probed_modes)) {
0400 struct drm_display_mode *preferred_mode =
0401 list_first_entry(&connector->probed_modes,
0402 struct drm_display_mode, head);
0403
0404 radeon_encoder->native_mode = *preferred_mode;
0405 } else {
0406 radeon_encoder->native_mode.clock = 0;
0407 }
0408 }
0409
0410
0411
0412
0413
0414
0415
0416 static enum drm_connector_status
0417 radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
0418 struct drm_encoder *encoder,
0419 enum drm_connector_status current_status,
0420 bool priority)
0421 {
0422 struct drm_device *dev = connector->dev;
0423 struct drm_connector *conflict;
0424 struct radeon_connector *radeon_conflict;
0425
0426 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
0427 struct drm_encoder *enc;
0428
0429 if (conflict == connector)
0430 continue;
0431
0432 radeon_conflict = to_radeon_connector(conflict);
0433
0434 drm_connector_for_each_possible_encoder(conflict, enc) {
0435
0436 if (enc == encoder) {
0437 if (conflict->status != connector_status_connected)
0438 continue;
0439
0440 if (radeon_conflict->use_digital)
0441 continue;
0442
0443 if (priority) {
0444 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
0445 conflict->name);
0446 DRM_DEBUG_KMS("in favor of %s\n",
0447 connector->name);
0448 conflict->status = connector_status_disconnected;
0449 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
0450 } else {
0451 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
0452 connector->name);
0453 DRM_DEBUG_KMS("in favor of %s\n",
0454 conflict->name);
0455 current_status = connector_status_disconnected;
0456 }
0457 break;
0458 }
0459 }
0460 }
0461 return current_status;
0462
0463 }
0464
0465 static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
0466 {
0467 struct drm_device *dev = encoder->dev;
0468 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
0469 struct drm_display_mode *mode = NULL;
0470 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
0471
0472 if (native_mode->hdisplay != 0 &&
0473 native_mode->vdisplay != 0 &&
0474 native_mode->clock != 0) {
0475 mode = drm_mode_duplicate(dev, native_mode);
0476 if (!mode)
0477 return NULL;
0478 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
0479 drm_mode_set_name(mode);
0480
0481 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
0482 } else if (native_mode->hdisplay != 0 &&
0483 native_mode->vdisplay != 0) {
0484
0485
0486
0487
0488
0489
0490
0491 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
0492 if (!mode)
0493 return NULL;
0494 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
0495 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
0496 }
0497 return mode;
0498 }
0499
0500 static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
0501 {
0502 struct drm_device *dev = encoder->dev;
0503 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
0504 struct drm_display_mode *mode = NULL;
0505 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
0506 int i;
0507 struct mode_size {
0508 int w;
0509 int h;
0510 } common_modes[17] = {
0511 { 640, 480},
0512 { 720, 480},
0513 { 800, 600},
0514 { 848, 480},
0515 {1024, 768},
0516 {1152, 768},
0517 {1280, 720},
0518 {1280, 800},
0519 {1280, 854},
0520 {1280, 960},
0521 {1280, 1024},
0522 {1440, 900},
0523 {1400, 1050},
0524 {1680, 1050},
0525 {1600, 1200},
0526 {1920, 1080},
0527 {1920, 1200}
0528 };
0529
0530 for (i = 0; i < 17; i++) {
0531 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
0532 if (common_modes[i].w > 1024 ||
0533 common_modes[i].h > 768)
0534 continue;
0535 }
0536 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
0537 if (common_modes[i].w > native_mode->hdisplay ||
0538 common_modes[i].h > native_mode->vdisplay ||
0539 (common_modes[i].w == native_mode->hdisplay &&
0540 common_modes[i].h == native_mode->vdisplay))
0541 continue;
0542 }
0543 if (common_modes[i].w < 320 || common_modes[i].h < 200)
0544 continue;
0545
0546 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
0547 drm_mode_probed_add(connector, mode);
0548 }
0549 }
0550
0551 static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
0552 uint64_t val)
0553 {
0554 struct drm_device *dev = connector->dev;
0555 struct radeon_device *rdev = dev->dev_private;
0556 struct drm_encoder *encoder;
0557 struct radeon_encoder *radeon_encoder;
0558
0559 if (property == rdev->mode_info.coherent_mode_property) {
0560 struct radeon_encoder_atom_dig *dig;
0561 bool new_coherent_mode;
0562
0563
0564 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0565 if (!encoder)
0566 return 0;
0567
0568 radeon_encoder = to_radeon_encoder(encoder);
0569
0570 if (!radeon_encoder->enc_priv)
0571 return 0;
0572
0573 dig = radeon_encoder->enc_priv;
0574 new_coherent_mode = val ? true : false;
0575 if (dig->coherent_mode != new_coherent_mode) {
0576 dig->coherent_mode = new_coherent_mode;
0577 radeon_property_change_mode(&radeon_encoder->base);
0578 }
0579 }
0580
0581 if (property == rdev->mode_info.audio_property) {
0582 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0583
0584 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0585 if (!encoder)
0586 return 0;
0587
0588 radeon_encoder = to_radeon_encoder(encoder);
0589
0590 if (radeon_connector->audio != val) {
0591 radeon_connector->audio = val;
0592 radeon_property_change_mode(&radeon_encoder->base);
0593 }
0594 }
0595
0596 if (property == rdev->mode_info.dither_property) {
0597 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0598
0599 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0600 if (!encoder)
0601 return 0;
0602
0603 radeon_encoder = to_radeon_encoder(encoder);
0604
0605 if (radeon_connector->dither != val) {
0606 radeon_connector->dither = val;
0607 radeon_property_change_mode(&radeon_encoder->base);
0608 }
0609 }
0610
0611 if (property == rdev->mode_info.underscan_property) {
0612
0613 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0614 if (!encoder)
0615 return 0;
0616
0617 radeon_encoder = to_radeon_encoder(encoder);
0618
0619 if (radeon_encoder->underscan_type != val) {
0620 radeon_encoder->underscan_type = val;
0621 radeon_property_change_mode(&radeon_encoder->base);
0622 }
0623 }
0624
0625 if (property == rdev->mode_info.underscan_hborder_property) {
0626
0627 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0628 if (!encoder)
0629 return 0;
0630
0631 radeon_encoder = to_radeon_encoder(encoder);
0632
0633 if (radeon_encoder->underscan_hborder != val) {
0634 radeon_encoder->underscan_hborder = val;
0635 radeon_property_change_mode(&radeon_encoder->base);
0636 }
0637 }
0638
0639 if (property == rdev->mode_info.underscan_vborder_property) {
0640
0641 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0642 if (!encoder)
0643 return 0;
0644
0645 radeon_encoder = to_radeon_encoder(encoder);
0646
0647 if (radeon_encoder->underscan_vborder != val) {
0648 radeon_encoder->underscan_vborder = val;
0649 radeon_property_change_mode(&radeon_encoder->base);
0650 }
0651 }
0652
0653 if (property == rdev->mode_info.tv_std_property) {
0654 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
0655 if (!encoder) {
0656 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
0657 }
0658
0659 if (!encoder)
0660 return 0;
0661
0662 radeon_encoder = to_radeon_encoder(encoder);
0663 if (!radeon_encoder->enc_priv)
0664 return 0;
0665 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
0666 struct radeon_encoder_atom_dac *dac_int;
0667 dac_int = radeon_encoder->enc_priv;
0668 dac_int->tv_std = val;
0669 } else {
0670 struct radeon_encoder_tv_dac *dac_int;
0671 dac_int = radeon_encoder->enc_priv;
0672 dac_int->tv_std = val;
0673 }
0674 radeon_property_change_mode(&radeon_encoder->base);
0675 }
0676
0677 if (property == rdev->mode_info.load_detect_property) {
0678 struct radeon_connector *radeon_connector =
0679 to_radeon_connector(connector);
0680
0681 if (val == 0)
0682 radeon_connector->dac_load_detect = false;
0683 else
0684 radeon_connector->dac_load_detect = true;
0685 }
0686
0687 if (property == rdev->mode_info.tmds_pll_property) {
0688 struct radeon_encoder_int_tmds *tmds = NULL;
0689 bool ret = false;
0690
0691 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
0692 if (!encoder)
0693 return 0;
0694
0695 radeon_encoder = to_radeon_encoder(encoder);
0696
0697 tmds = radeon_encoder->enc_priv;
0698 if (!tmds)
0699 return 0;
0700
0701 if (val == 0) {
0702 if (rdev->is_atom_bios)
0703 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
0704 else
0705 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
0706 }
0707 if (val == 1 || !ret)
0708 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
0709
0710 radeon_property_change_mode(&radeon_encoder->base);
0711 }
0712
0713 if (property == dev->mode_config.scaling_mode_property) {
0714 enum radeon_rmx_type rmx_type;
0715
0716 if (connector->encoder)
0717 radeon_encoder = to_radeon_encoder(connector->encoder);
0718 else {
0719 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
0720 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
0721 }
0722
0723 switch (val) {
0724 default:
0725 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
0726 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
0727 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
0728 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
0729 }
0730 if (radeon_encoder->rmx_type == rmx_type)
0731 return 0;
0732
0733 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
0734 (radeon_encoder->native_mode.clock == 0))
0735 return 0;
0736
0737 radeon_encoder->rmx_type = rmx_type;
0738
0739 radeon_property_change_mode(&radeon_encoder->base);
0740 }
0741
0742 if (property == rdev->mode_info.output_csc_property) {
0743 if (connector->encoder)
0744 radeon_encoder = to_radeon_encoder(connector->encoder);
0745 else {
0746 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
0747 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
0748 }
0749
0750 if (radeon_encoder->output_csc == val)
0751 return 0;
0752
0753 radeon_encoder->output_csc = val;
0754
0755 if (connector->encoder && connector->encoder->crtc) {
0756 struct drm_crtc *crtc = connector->encoder->crtc;
0757 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
0758
0759 radeon_crtc->output_csc = radeon_encoder->output_csc;
0760
0761
0762
0763
0764
0765 crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);
0766 }
0767 }
0768
0769 return 0;
0770 }
0771
0772 static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
0773 struct drm_connector *connector)
0774 {
0775 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
0776 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
0777 struct drm_display_mode *t, *mode;
0778
0779
0780 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
0781 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
0782 if (mode->hdisplay != native_mode->hdisplay ||
0783 mode->vdisplay != native_mode->vdisplay)
0784 drm_mode_copy(native_mode, mode);
0785 }
0786 }
0787
0788
0789 if (!native_mode->clock) {
0790 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
0791 if (mode->hdisplay == native_mode->hdisplay &&
0792 mode->vdisplay == native_mode->vdisplay) {
0793 drm_mode_copy(native_mode, mode);
0794 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
0795 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
0796 break;
0797 }
0798 }
0799 }
0800
0801 if (!native_mode->clock) {
0802 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
0803 radeon_encoder->rmx_type = RMX_OFF;
0804 }
0805 }
0806
0807 static int radeon_lvds_get_modes(struct drm_connector *connector)
0808 {
0809 struct drm_encoder *encoder;
0810 int ret = 0;
0811 struct drm_display_mode *mode;
0812
0813 radeon_connector_get_edid(connector);
0814 ret = radeon_ddc_get_modes(connector);
0815 if (ret > 0) {
0816 encoder = radeon_best_single_encoder(connector);
0817 if (encoder) {
0818 radeon_fixup_lvds_native_mode(encoder, connector);
0819
0820 radeon_add_common_modes(encoder, connector);
0821 }
0822 return ret;
0823 }
0824
0825 encoder = radeon_best_single_encoder(connector);
0826 if (!encoder)
0827 return 0;
0828
0829
0830 mode = radeon_fp_native_mode(encoder);
0831 if (mode) {
0832 ret = 1;
0833 drm_mode_probed_add(connector, mode);
0834
0835 connector->display_info.width_mm = mode->width_mm;
0836 connector->display_info.height_mm = mode->height_mm;
0837
0838 radeon_add_common_modes(encoder, connector);
0839 }
0840
0841 return ret;
0842 }
0843
0844 static enum drm_mode_status radeon_lvds_mode_valid(struct drm_connector *connector,
0845 struct drm_display_mode *mode)
0846 {
0847 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0848
0849 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
0850 return MODE_PANEL;
0851
0852 if (encoder) {
0853 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
0854 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
0855
0856
0857
0858
0859 if ((mode->hdisplay > native_mode->hdisplay) ||
0860 (mode->vdisplay > native_mode->vdisplay))
0861 return MODE_PANEL;
0862
0863
0864 if (radeon_encoder->rmx_type == RMX_OFF) {
0865 if ((mode->hdisplay != native_mode->hdisplay) ||
0866 (mode->vdisplay != native_mode->vdisplay))
0867 return MODE_PANEL;
0868 }
0869 }
0870
0871 return MODE_OK;
0872 }
0873
0874 static enum drm_connector_status
0875 radeon_lvds_detect(struct drm_connector *connector, bool force)
0876 {
0877 struct drm_device *dev = connector->dev;
0878 struct radeon_device *rdev = dev->dev_private;
0879 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0880 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0881 enum drm_connector_status ret = connector_status_disconnected;
0882 int r;
0883
0884 if (!drm_kms_helper_is_poll_worker()) {
0885 r = pm_runtime_get_sync(connector->dev->dev);
0886 if (r < 0) {
0887 pm_runtime_put_autosuspend(connector->dev->dev);
0888 return connector_status_disconnected;
0889 }
0890 }
0891
0892 if (encoder) {
0893 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
0894 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
0895
0896
0897 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
0898 ret = connector_status_connected;
0899
0900
0901
0902 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
0903 ret = connector_status_disconnected;
0904 }
0905
0906
0907 radeon_connector_get_edid(connector);
0908 if (radeon_connector->edid)
0909 ret = connector_status_connected;
0910
0911
0912 radeon_connector_update_scratch_regs(connector, ret);
0913
0914 if (!drm_kms_helper_is_poll_worker()) {
0915 pm_runtime_mark_last_busy(connector->dev->dev);
0916 pm_runtime_put_autosuspend(connector->dev->dev);
0917 }
0918
0919 return ret;
0920 }
0921
0922 static void radeon_connector_unregister(struct drm_connector *connector)
0923 {
0924 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0925
0926 if (radeon_connector->ddc_bus && radeon_connector->ddc_bus->has_aux) {
0927 drm_dp_aux_unregister(&radeon_connector->ddc_bus->aux);
0928 radeon_connector->ddc_bus->has_aux = false;
0929 }
0930 }
0931
0932 static void radeon_connector_destroy(struct drm_connector *connector)
0933 {
0934 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
0935
0936 radeon_connector_free_edid(connector);
0937 kfree(radeon_connector->con_priv);
0938 drm_connector_unregister(connector);
0939 drm_connector_cleanup(connector);
0940 kfree(connector);
0941 }
0942
0943 static int radeon_lvds_set_property(struct drm_connector *connector,
0944 struct drm_property *property,
0945 uint64_t value)
0946 {
0947 struct drm_device *dev = connector->dev;
0948 struct radeon_encoder *radeon_encoder;
0949 enum radeon_rmx_type rmx_type;
0950
0951 DRM_DEBUG_KMS("\n");
0952 if (property != dev->mode_config.scaling_mode_property)
0953 return 0;
0954
0955 if (connector->encoder)
0956 radeon_encoder = to_radeon_encoder(connector->encoder);
0957 else {
0958 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
0959 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
0960 }
0961
0962 switch (value) {
0963 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
0964 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
0965 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
0966 default:
0967 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
0968 }
0969 if (radeon_encoder->rmx_type == rmx_type)
0970 return 0;
0971
0972 radeon_encoder->rmx_type = rmx_type;
0973
0974 radeon_property_change_mode(&radeon_encoder->base);
0975 return 0;
0976 }
0977
0978
0979 static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
0980 .get_modes = radeon_lvds_get_modes,
0981 .mode_valid = radeon_lvds_mode_valid,
0982 .best_encoder = radeon_best_single_encoder,
0983 };
0984
0985 static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
0986 .dpms = drm_helper_connector_dpms,
0987 .detect = radeon_lvds_detect,
0988 .fill_modes = drm_helper_probe_single_connector_modes,
0989 .early_unregister = radeon_connector_unregister,
0990 .destroy = radeon_connector_destroy,
0991 .set_property = radeon_lvds_set_property,
0992 };
0993
0994 static int radeon_vga_get_modes(struct drm_connector *connector)
0995 {
0996 int ret;
0997
0998 radeon_connector_get_edid(connector);
0999 ret = radeon_ddc_get_modes(connector);
1000
1001 radeon_get_native_mode(connector);
1002
1003 return ret;
1004 }
1005
1006 static enum drm_mode_status radeon_vga_mode_valid(struct drm_connector *connector,
1007 struct drm_display_mode *mode)
1008 {
1009 struct drm_device *dev = connector->dev;
1010 struct radeon_device *rdev = dev->dev_private;
1011
1012
1013
1014 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1015 return MODE_CLOCK_HIGH;
1016
1017 return MODE_OK;
1018 }
1019
1020 static enum drm_connector_status
1021 radeon_vga_detect(struct drm_connector *connector, bool force)
1022 {
1023 struct drm_device *dev = connector->dev;
1024 struct radeon_device *rdev = dev->dev_private;
1025 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1026 struct drm_encoder *encoder;
1027 const struct drm_encoder_helper_funcs *encoder_funcs;
1028 bool dret = false;
1029 enum drm_connector_status ret = connector_status_disconnected;
1030 int r;
1031
1032 if (!drm_kms_helper_is_poll_worker()) {
1033 r = pm_runtime_get_sync(connector->dev->dev);
1034 if (r < 0) {
1035 pm_runtime_put_autosuspend(connector->dev->dev);
1036 return connector_status_disconnected;
1037 }
1038 }
1039
1040 encoder = radeon_best_single_encoder(connector);
1041 if (!encoder)
1042 ret = connector_status_disconnected;
1043
1044 if (radeon_connector->ddc_bus)
1045 dret = radeon_ddc_probe(radeon_connector, false);
1046 if (dret) {
1047 radeon_connector->detected_by_load = false;
1048 radeon_connector_free_edid(connector);
1049 radeon_connector_get_edid(connector);
1050
1051 if (!radeon_connector->edid) {
1052 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
1053 connector->name);
1054 ret = connector_status_connected;
1055 } else {
1056 radeon_connector->use_digital =
1057 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1058
1059
1060
1061
1062 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
1063 radeon_connector_free_edid(connector);
1064 ret = connector_status_disconnected;
1065 } else {
1066 ret = connector_status_connected;
1067 }
1068 }
1069 } else {
1070
1071
1072 if (!force) {
1073
1074
1075
1076 if (radeon_connector->detected_by_load)
1077 ret = connector->status;
1078 goto out;
1079 }
1080
1081 if (radeon_connector->dac_load_detect && encoder) {
1082 encoder_funcs = encoder->helper_private;
1083 ret = encoder_funcs->detect(encoder, connector);
1084 if (ret != connector_status_disconnected)
1085 radeon_connector->detected_by_load = true;
1086 }
1087 }
1088
1089 if (ret == connector_status_connected)
1090 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1091
1092
1093
1094
1095
1096 if ((!rdev->is_atom_bios) &&
1097 (ret == connector_status_disconnected) &&
1098 rdev->mode_info.bios_hardcoded_edid_size) {
1099 ret = connector_status_connected;
1100 }
1101
1102 radeon_connector_update_scratch_regs(connector, ret);
1103
1104 out:
1105 if (!drm_kms_helper_is_poll_worker()) {
1106 pm_runtime_mark_last_busy(connector->dev->dev);
1107 pm_runtime_put_autosuspend(connector->dev->dev);
1108 }
1109
1110 return ret;
1111 }
1112
1113 static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
1114 .get_modes = radeon_vga_get_modes,
1115 .mode_valid = radeon_vga_mode_valid,
1116 .best_encoder = radeon_best_single_encoder,
1117 };
1118
1119 static const struct drm_connector_funcs radeon_vga_connector_funcs = {
1120 .dpms = drm_helper_connector_dpms,
1121 .detect = radeon_vga_detect,
1122 .fill_modes = drm_helper_probe_single_connector_modes,
1123 .early_unregister = radeon_connector_unregister,
1124 .destroy = radeon_connector_destroy,
1125 .set_property = radeon_connector_set_property,
1126 };
1127
1128 static int radeon_tv_get_modes(struct drm_connector *connector)
1129 {
1130 struct drm_device *dev = connector->dev;
1131 struct radeon_device *rdev = dev->dev_private;
1132 struct drm_display_mode *tv_mode;
1133 struct drm_encoder *encoder;
1134
1135 encoder = radeon_best_single_encoder(connector);
1136 if (!encoder)
1137 return 0;
1138
1139
1140 if (rdev->family >= CHIP_RS600)
1141
1142 radeon_add_common_modes(encoder, connector);
1143 else {
1144
1145 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
1146 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1147 drm_mode_probed_add(connector, tv_mode);
1148 }
1149 return 1;
1150 }
1151
1152 static enum drm_mode_status radeon_tv_mode_valid(struct drm_connector *connector,
1153 struct drm_display_mode *mode)
1154 {
1155 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1156 return MODE_CLOCK_RANGE;
1157 return MODE_OK;
1158 }
1159
1160 static enum drm_connector_status
1161 radeon_tv_detect(struct drm_connector *connector, bool force)
1162 {
1163 struct drm_encoder *encoder;
1164 const struct drm_encoder_helper_funcs *encoder_funcs;
1165 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1166 enum drm_connector_status ret = connector_status_disconnected;
1167 int r;
1168
1169 if (!radeon_connector->dac_load_detect)
1170 return ret;
1171
1172 if (!drm_kms_helper_is_poll_worker()) {
1173 r = pm_runtime_get_sync(connector->dev->dev);
1174 if (r < 0) {
1175 pm_runtime_put_autosuspend(connector->dev->dev);
1176 return connector_status_disconnected;
1177 }
1178 }
1179
1180 encoder = radeon_best_single_encoder(connector);
1181 if (!encoder)
1182 ret = connector_status_disconnected;
1183 else {
1184 encoder_funcs = encoder->helper_private;
1185 ret = encoder_funcs->detect(encoder, connector);
1186 }
1187 if (ret == connector_status_connected)
1188 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1189 radeon_connector_update_scratch_regs(connector, ret);
1190
1191 if (!drm_kms_helper_is_poll_worker()) {
1192 pm_runtime_mark_last_busy(connector->dev->dev);
1193 pm_runtime_put_autosuspend(connector->dev->dev);
1194 }
1195
1196 return ret;
1197 }
1198
1199 static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
1200 .get_modes = radeon_tv_get_modes,
1201 .mode_valid = radeon_tv_mode_valid,
1202 .best_encoder = radeon_best_single_encoder,
1203 };
1204
1205 static const struct drm_connector_funcs radeon_tv_connector_funcs = {
1206 .dpms = drm_helper_connector_dpms,
1207 .detect = radeon_tv_detect,
1208 .fill_modes = drm_helper_probe_single_connector_modes,
1209 .early_unregister = radeon_connector_unregister,
1210 .destroy = radeon_connector_destroy,
1211 .set_property = radeon_connector_set_property,
1212 };
1213
1214 static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1215 {
1216 struct drm_device *dev = connector->dev;
1217 struct radeon_device *rdev = dev->dev_private;
1218 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1219 enum drm_connector_status status;
1220
1221
1222 if (rdev->family >= CHIP_R600
1223 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1224 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1225 status = connector_status_connected;
1226 else
1227 status = connector_status_disconnected;
1228 if (connector->status == status)
1229 return true;
1230 }
1231
1232 return false;
1233 }
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246 static enum drm_connector_status
1247 radeon_dvi_detect(struct drm_connector *connector, bool force)
1248 {
1249 struct drm_device *dev = connector->dev;
1250 struct radeon_device *rdev = dev->dev_private;
1251 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1252 struct drm_encoder *encoder = NULL;
1253 const struct drm_encoder_helper_funcs *encoder_funcs;
1254 int r;
1255 enum drm_connector_status ret = connector_status_disconnected;
1256 bool dret = false, broken_edid = false;
1257
1258 if (!drm_kms_helper_is_poll_worker()) {
1259 r = pm_runtime_get_sync(connector->dev->dev);
1260 if (r < 0) {
1261 pm_runtime_put_autosuspend(connector->dev->dev);
1262 return connector_status_disconnected;
1263 }
1264 }
1265
1266 if (radeon_connector->detected_hpd_without_ddc) {
1267 force = true;
1268 radeon_connector->detected_hpd_without_ddc = false;
1269 }
1270
1271 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1272 ret = connector->status;
1273 goto exit;
1274 }
1275
1276 if (radeon_connector->ddc_bus) {
1277 dret = radeon_ddc_probe(radeon_connector, false);
1278
1279
1280
1281
1282
1283 if (!dret && !force &&
1284 connector->status != connector_status_connected) {
1285 DRM_DEBUG_KMS("hpd detected without ddc, retrying in 1 second\n");
1286 radeon_connector->detected_hpd_without_ddc = true;
1287 schedule_delayed_work(&rdev->hotplug_work,
1288 msecs_to_jiffies(1000));
1289 goto exit;
1290 }
1291 }
1292 if (dret) {
1293 radeon_connector->detected_by_load = false;
1294 radeon_connector_free_edid(connector);
1295 radeon_connector_get_edid(connector);
1296
1297 if (!radeon_connector->edid) {
1298 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
1299 connector->name);
1300
1301
1302 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1303 radeon_connector->base.null_edid_counter) {
1304 ret = connector_status_disconnected;
1305 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1306 connector->name);
1307 radeon_connector->ddc_bus = NULL;
1308 } else {
1309 ret = connector_status_connected;
1310 broken_edid = true;
1311 }
1312 } else {
1313 radeon_connector->use_digital =
1314 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1315
1316
1317
1318
1319 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1320 radeon_connector_free_edid(connector);
1321 ret = connector_status_disconnected;
1322 } else {
1323 ret = connector_status_connected;
1324 }
1325
1326
1327
1328
1329
1330 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
1331 struct drm_connector *list_connector;
1332 struct radeon_connector *list_radeon_connector;
1333 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1334 if (connector == list_connector)
1335 continue;
1336 list_radeon_connector = to_radeon_connector(list_connector);
1337 if (list_radeon_connector->shared_ddc &&
1338 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1339 radeon_connector->ddc_bus->rec.i2c_id)) {
1340
1341 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1342
1343 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1344 radeon_connector_free_edid(connector);
1345 ret = connector_status_disconnected;
1346 }
1347 }
1348 }
1349 }
1350 }
1351 }
1352 }
1353
1354 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1355 goto out;
1356
1357
1358 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1359 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1360 goto out;
1361
1362
1363 if (!force) {
1364
1365
1366
1367 if (radeon_connector->detected_by_load)
1368 ret = connector->status;
1369 goto out;
1370 }
1371
1372
1373 if (radeon_connector->dac_load_detect) {
1374 drm_connector_for_each_possible_encoder(connector, encoder) {
1375 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
1376 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1377 continue;
1378
1379 encoder_funcs = encoder->helper_private;
1380 if (encoder_funcs->detect) {
1381 if (!broken_edid) {
1382 if (ret != connector_status_connected) {
1383
1384 ret = encoder_funcs->detect(encoder, connector);
1385 if (ret == connector_status_connected) {
1386 radeon_connector->use_digital = false;
1387 }
1388 if (ret != connector_status_disconnected)
1389 radeon_connector->detected_by_load = true;
1390 }
1391 } else {
1392 enum drm_connector_status lret;
1393
1394 radeon_connector->use_digital = true;
1395 lret = encoder_funcs->detect(encoder, connector);
1396 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1397 if (lret == connector_status_connected)
1398 radeon_connector->use_digital = false;
1399 }
1400 break;
1401 }
1402 }
1403 }
1404
1405 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1406 encoder) {
1407 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1408 }
1409
1410
1411
1412
1413
1414
1415
1416 out:
1417 if ((!rdev->is_atom_bios) &&
1418 (ret == connector_status_disconnected) &&
1419 rdev->mode_info.bios_hardcoded_edid_size) {
1420 radeon_connector->use_digital = true;
1421 ret = connector_status_connected;
1422 }
1423
1424
1425 radeon_connector_update_scratch_regs(connector, ret);
1426
1427 if ((radeon_audio != 0) && radeon_connector->use_digital) {
1428 const struct drm_connector_helper_funcs *connector_funcs =
1429 connector->helper_private;
1430
1431 encoder = connector_funcs->best_encoder(connector);
1432 if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) {
1433 radeon_connector_get_edid(connector);
1434 radeon_audio_detect(connector, encoder, ret);
1435 }
1436 }
1437
1438 exit:
1439 if (!drm_kms_helper_is_poll_worker()) {
1440 pm_runtime_mark_last_busy(connector->dev->dev);
1441 pm_runtime_put_autosuspend(connector->dev->dev);
1442 }
1443
1444 return ret;
1445 }
1446
1447
1448 static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
1449 {
1450 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1451 struct drm_encoder *encoder;
1452
1453 drm_connector_for_each_possible_encoder(connector, encoder) {
1454 if (radeon_connector->use_digital == true) {
1455 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1456 return encoder;
1457 } else {
1458 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1459 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1460 return encoder;
1461 }
1462 }
1463
1464
1465
1466
1467
1468 drm_connector_for_each_possible_encoder(connector, encoder)
1469 return encoder;
1470
1471 return NULL;
1472 }
1473
1474 static void radeon_dvi_force(struct drm_connector *connector)
1475 {
1476 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1477 if (connector->force == DRM_FORCE_ON)
1478 radeon_connector->use_digital = false;
1479 if (connector->force == DRM_FORCE_ON_DIGITAL)
1480 radeon_connector->use_digital = true;
1481 }
1482
1483 static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connector,
1484 struct drm_display_mode *mode)
1485 {
1486 struct drm_device *dev = connector->dev;
1487 struct radeon_device *rdev = dev->dev_private;
1488 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1489
1490
1491
1492
1493 if (radeon_connector->use_digital &&
1494 (rdev->family == CHIP_RV100) &&
1495 (mode->clock > 135000))
1496 return MODE_CLOCK_HIGH;
1497
1498 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1499 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1500 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1501 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1502 return MODE_OK;
1503 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
1504
1505 if (mode->clock > 340000)
1506 return MODE_CLOCK_HIGH;
1507 else
1508 return MODE_OK;
1509 } else {
1510 return MODE_CLOCK_HIGH;
1511 }
1512 }
1513
1514
1515 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1516 return MODE_CLOCK_HIGH;
1517
1518 return MODE_OK;
1519 }
1520
1521 static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1522 .get_modes = radeon_vga_get_modes,
1523 .mode_valid = radeon_dvi_mode_valid,
1524 .best_encoder = radeon_dvi_encoder,
1525 };
1526
1527 static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
1528 .dpms = drm_helper_connector_dpms,
1529 .detect = radeon_dvi_detect,
1530 .fill_modes = drm_helper_probe_single_connector_modes,
1531 .set_property = radeon_connector_set_property,
1532 .early_unregister = radeon_connector_unregister,
1533 .destroy = radeon_connector_destroy,
1534 .force = radeon_dvi_force,
1535 };
1536
1537 static int radeon_dp_get_modes(struct drm_connector *connector)
1538 {
1539 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1540 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1541 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1542 int ret;
1543
1544 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1545 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1546 struct drm_display_mode *mode;
1547
1548 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1549 if (!radeon_dig_connector->edp_on)
1550 atombios_set_edp_panel_power(connector,
1551 ATOM_TRANSMITTER_ACTION_POWER_ON);
1552 radeon_connector_get_edid(connector);
1553 ret = radeon_ddc_get_modes(connector);
1554 if (!radeon_dig_connector->edp_on)
1555 atombios_set_edp_panel_power(connector,
1556 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1557 } else {
1558
1559 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1560 ENCODER_OBJECT_ID_NONE) {
1561 if (encoder)
1562 radeon_atom_ext_encoder_setup_ddc(encoder);
1563 }
1564 radeon_connector_get_edid(connector);
1565 ret = radeon_ddc_get_modes(connector);
1566 }
1567
1568 if (ret > 0) {
1569 if (encoder) {
1570 radeon_fixup_lvds_native_mode(encoder, connector);
1571
1572 radeon_add_common_modes(encoder, connector);
1573 }
1574 return ret;
1575 }
1576
1577 if (!encoder)
1578 return 0;
1579
1580
1581 mode = radeon_fp_native_mode(encoder);
1582 if (mode) {
1583 ret = 1;
1584 drm_mode_probed_add(connector, mode);
1585
1586 connector->display_info.width_mm = mode->width_mm;
1587 connector->display_info.height_mm = mode->height_mm;
1588
1589 radeon_add_common_modes(encoder, connector);
1590 }
1591 } else {
1592
1593 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1594 ENCODER_OBJECT_ID_NONE) {
1595 if (encoder)
1596 radeon_atom_ext_encoder_setup_ddc(encoder);
1597 }
1598 radeon_connector_get_edid(connector);
1599 ret = radeon_ddc_get_modes(connector);
1600
1601 radeon_get_native_mode(connector);
1602 }
1603
1604 return ret;
1605 }
1606
1607 u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
1608 {
1609 struct drm_encoder *encoder;
1610 struct radeon_encoder *radeon_encoder;
1611
1612 drm_connector_for_each_possible_encoder(connector, encoder) {
1613 radeon_encoder = to_radeon_encoder(encoder);
1614
1615 switch (radeon_encoder->encoder_id) {
1616 case ENCODER_OBJECT_ID_TRAVIS:
1617 case ENCODER_OBJECT_ID_NUTMEG:
1618 return radeon_encoder->encoder_id;
1619 default:
1620 break;
1621 }
1622 }
1623
1624 return ENCODER_OBJECT_ID_NONE;
1625 }
1626
1627 static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1628 {
1629 struct drm_encoder *encoder;
1630 struct radeon_encoder *radeon_encoder;
1631 bool found = false;
1632
1633 drm_connector_for_each_possible_encoder(connector, encoder) {
1634 radeon_encoder = to_radeon_encoder(encoder);
1635 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1636 found = true;
1637 }
1638
1639 return found;
1640 }
1641
1642 bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1643 {
1644 struct drm_device *dev = connector->dev;
1645 struct radeon_device *rdev = dev->dev_private;
1646
1647 if (ASIC_IS_DCE5(rdev) &&
1648 (rdev->clock.default_dispclk >= 53900) &&
1649 radeon_connector_encoder_is_hbr2(connector)) {
1650 return true;
1651 }
1652
1653 return false;
1654 }
1655
1656 static enum drm_connector_status
1657 radeon_dp_detect(struct drm_connector *connector, bool force)
1658 {
1659 struct drm_device *dev = connector->dev;
1660 struct radeon_device *rdev = dev->dev_private;
1661 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1662 enum drm_connector_status ret = connector_status_disconnected;
1663 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1664 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1665 int r;
1666
1667 if (radeon_dig_connector->is_mst)
1668 return connector_status_disconnected;
1669
1670 if (!drm_kms_helper_is_poll_worker()) {
1671 r = pm_runtime_get_sync(connector->dev->dev);
1672 if (r < 0) {
1673 pm_runtime_put_autosuspend(connector->dev->dev);
1674 return connector_status_disconnected;
1675 }
1676 }
1677
1678 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1679 ret = connector->status;
1680 goto out;
1681 }
1682
1683 radeon_connector_free_edid(connector);
1684
1685 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1686 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1687 if (encoder) {
1688 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1689 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1690
1691
1692 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1693 ret = connector_status_connected;
1694
1695
1696
1697 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1698 ret = connector_status_disconnected;
1699 }
1700
1701 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1702 if (!radeon_dig_connector->edp_on)
1703 atombios_set_edp_panel_power(connector,
1704 ATOM_TRANSMITTER_ACTION_POWER_ON);
1705 if (radeon_dp_getdpcd(radeon_connector))
1706 ret = connector_status_connected;
1707 if (!radeon_dig_connector->edp_on)
1708 atombios_set_edp_panel_power(connector,
1709 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1710 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1711 ENCODER_OBJECT_ID_NONE) {
1712
1713 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1714
1715 radeon_dp_getdpcd(radeon_connector);
1716
1717 if (encoder) {
1718
1719 radeon_atom_ext_encoder_setup_ddc(encoder);
1720
1721 if (radeon_ddc_probe(radeon_connector, true))
1722 ret = connector_status_connected;
1723 else if (radeon_connector->dac_load_detect) {
1724 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
1725 ret = encoder_funcs->detect(encoder, connector);
1726 }
1727 }
1728 } else {
1729 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
1730 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1731 ret = connector_status_connected;
1732 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1733 radeon_dp_getdpcd(radeon_connector);
1734 r = radeon_dp_mst_probe(radeon_connector);
1735 if (r == 1)
1736 ret = connector_status_disconnected;
1737 }
1738 } else {
1739 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1740 if (radeon_dp_getdpcd(radeon_connector)) {
1741 r = radeon_dp_mst_probe(radeon_connector);
1742 if (r == 1)
1743 ret = connector_status_disconnected;
1744 else
1745 ret = connector_status_connected;
1746 }
1747 } else {
1748
1749 if (radeon_ddc_probe(radeon_connector, false))
1750 ret = connector_status_connected;
1751 }
1752 }
1753 }
1754
1755 radeon_connector_update_scratch_regs(connector, ret);
1756
1757 if ((radeon_audio != 0) && encoder) {
1758 radeon_connector_get_edid(connector);
1759 radeon_audio_detect(connector, encoder, ret);
1760 }
1761
1762 out:
1763 if (!drm_kms_helper_is_poll_worker()) {
1764 pm_runtime_mark_last_busy(connector->dev->dev);
1765 pm_runtime_put_autosuspend(connector->dev->dev);
1766 }
1767
1768 return ret;
1769 }
1770
1771 static enum drm_mode_status radeon_dp_mode_valid(struct drm_connector *connector,
1772 struct drm_display_mode *mode)
1773 {
1774 struct drm_device *dev = connector->dev;
1775 struct radeon_device *rdev = dev->dev_private;
1776 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1777 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1778
1779
1780
1781 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1782 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1783 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1784
1785 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1786 return MODE_PANEL;
1787
1788 if (encoder) {
1789 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1790 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1791
1792
1793
1794
1795 if ((mode->hdisplay > native_mode->hdisplay) ||
1796 (mode->vdisplay > native_mode->vdisplay))
1797 return MODE_PANEL;
1798
1799
1800 if (radeon_encoder->rmx_type == RMX_OFF) {
1801 if ((mode->hdisplay != native_mode->hdisplay) ||
1802 (mode->vdisplay != native_mode->vdisplay))
1803 return MODE_PANEL;
1804 }
1805 }
1806 } else {
1807 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1808 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
1809 return radeon_dp_mode_valid_helper(connector, mode);
1810 } else {
1811 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
1812
1813 if (mode->clock > 340000)
1814 return MODE_CLOCK_HIGH;
1815 } else {
1816 if (mode->clock > 165000)
1817 return MODE_CLOCK_HIGH;
1818 }
1819 }
1820 }
1821
1822 return MODE_OK;
1823 }
1824
1825 static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1826 .get_modes = radeon_dp_get_modes,
1827 .mode_valid = radeon_dp_mode_valid,
1828 .best_encoder = radeon_dvi_encoder,
1829 };
1830
1831 static const struct drm_connector_funcs radeon_dp_connector_funcs = {
1832 .dpms = drm_helper_connector_dpms,
1833 .detect = radeon_dp_detect,
1834 .fill_modes = drm_helper_probe_single_connector_modes,
1835 .set_property = radeon_connector_set_property,
1836 .early_unregister = radeon_connector_unregister,
1837 .destroy = radeon_connector_destroy,
1838 .force = radeon_dvi_force,
1839 };
1840
1841 static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1842 .dpms = drm_helper_connector_dpms,
1843 .detect = radeon_dp_detect,
1844 .fill_modes = drm_helper_probe_single_connector_modes,
1845 .set_property = radeon_lvds_set_property,
1846 .early_unregister = radeon_connector_unregister,
1847 .destroy = radeon_connector_destroy,
1848 .force = radeon_dvi_force,
1849 };
1850
1851 static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1852 .dpms = drm_helper_connector_dpms,
1853 .detect = radeon_dp_detect,
1854 .fill_modes = drm_helper_probe_single_connector_modes,
1855 .set_property = radeon_lvds_set_property,
1856 .early_unregister = radeon_connector_unregister,
1857 .destroy = radeon_connector_destroy,
1858 .force = radeon_dvi_force,
1859 };
1860
1861 void
1862 radeon_add_atom_connector(struct drm_device *dev,
1863 uint32_t connector_id,
1864 uint32_t supported_device,
1865 int connector_type,
1866 struct radeon_i2c_bus_rec *i2c_bus,
1867 uint32_t igp_lane_info,
1868 uint16_t connector_object_id,
1869 struct radeon_hpd *hpd,
1870 struct radeon_router *router)
1871 {
1872 struct radeon_device *rdev = dev->dev_private;
1873 struct drm_connector *connector;
1874 struct radeon_connector *radeon_connector;
1875 struct radeon_connector_atom_dig *radeon_dig_connector;
1876 struct drm_encoder *encoder;
1877 struct radeon_encoder *radeon_encoder;
1878 struct i2c_adapter *ddc = NULL;
1879 uint32_t subpixel_order = SubPixelNone;
1880 bool shared_ddc = false;
1881 bool is_dp_bridge = false;
1882 bool has_aux = false;
1883
1884 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
1885 return;
1886
1887
1888 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1889 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1890 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1891 (radeon_tv == 0))
1892 return;
1893
1894
1895 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1896 radeon_connector = to_radeon_connector(connector);
1897 if (radeon_connector->connector_id == connector_id) {
1898 radeon_connector->devices |= supported_device;
1899 return;
1900 }
1901 if (radeon_connector->ddc_bus && i2c_bus->valid) {
1902 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
1903 radeon_connector->shared_ddc = true;
1904 shared_ddc = true;
1905 }
1906 if (radeon_connector->router_bus && router->ddc_valid &&
1907 (radeon_connector->router.router_id == router->router_id)) {
1908 radeon_connector->shared_ddc = false;
1909 shared_ddc = false;
1910 }
1911 }
1912 }
1913
1914
1915 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1916 radeon_encoder = to_radeon_encoder(encoder);
1917 if (radeon_encoder->devices & supported_device) {
1918 switch (radeon_encoder->encoder_id) {
1919 case ENCODER_OBJECT_ID_TRAVIS:
1920 case ENCODER_OBJECT_ID_NUTMEG:
1921 is_dp_bridge = true;
1922 break;
1923 default:
1924 break;
1925 }
1926 }
1927 }
1928
1929 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1930 if (!radeon_connector)
1931 return;
1932
1933 connector = &radeon_connector->base;
1934
1935 radeon_connector->connector_id = connector_id;
1936 radeon_connector->devices = supported_device;
1937 radeon_connector->shared_ddc = shared_ddc;
1938 radeon_connector->connector_object_id = connector_object_id;
1939 radeon_connector->hpd = *hpd;
1940
1941 radeon_connector->router = *router;
1942 if (router->ddc_valid || router->cd_valid) {
1943 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1944 if (!radeon_connector->router_bus)
1945 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
1946 }
1947
1948 if (is_dp_bridge) {
1949 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1950 if (!radeon_dig_connector)
1951 goto failed;
1952 radeon_dig_connector->igp_lane_info = igp_lane_info;
1953 radeon_connector->con_priv = radeon_dig_connector;
1954 if (i2c_bus->valid) {
1955 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1956 if (radeon_connector->ddc_bus) {
1957 has_aux = true;
1958 ddc = &radeon_connector->ddc_bus->adapter;
1959 } else {
1960 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1961 }
1962 }
1963 switch (connector_type) {
1964 case DRM_MODE_CONNECTOR_VGA:
1965 case DRM_MODE_CONNECTOR_DVIA:
1966 default:
1967 drm_connector_init_with_ddc(dev, &radeon_connector->base,
1968 &radeon_dp_connector_funcs,
1969 connector_type,
1970 ddc);
1971 drm_connector_helper_add(&radeon_connector->base,
1972 &radeon_dp_connector_helper_funcs);
1973 connector->interlace_allowed = true;
1974 connector->doublescan_allowed = true;
1975 radeon_connector->dac_load_detect = true;
1976 drm_object_attach_property(&radeon_connector->base.base,
1977 rdev->mode_info.load_detect_property,
1978 1);
1979 drm_object_attach_property(&radeon_connector->base.base,
1980 dev->mode_config.scaling_mode_property,
1981 DRM_MODE_SCALE_NONE);
1982 if (ASIC_IS_DCE5(rdev))
1983 drm_object_attach_property(&radeon_connector->base.base,
1984 rdev->mode_info.output_csc_property,
1985 RADEON_OUTPUT_CSC_BYPASS);
1986 break;
1987 case DRM_MODE_CONNECTOR_DVII:
1988 case DRM_MODE_CONNECTOR_DVID:
1989 case DRM_MODE_CONNECTOR_HDMIA:
1990 case DRM_MODE_CONNECTOR_HDMIB:
1991 case DRM_MODE_CONNECTOR_DisplayPort:
1992 drm_connector_init_with_ddc(dev, &radeon_connector->base,
1993 &radeon_dp_connector_funcs,
1994 connector_type,
1995 ddc);
1996 drm_connector_helper_add(&radeon_connector->base,
1997 &radeon_dp_connector_helper_funcs);
1998 drm_object_attach_property(&radeon_connector->base.base,
1999 rdev->mode_info.underscan_property,
2000 UNDERSCAN_OFF);
2001 drm_object_attach_property(&radeon_connector->base.base,
2002 rdev->mode_info.underscan_hborder_property,
2003 0);
2004 drm_object_attach_property(&radeon_connector->base.base,
2005 rdev->mode_info.underscan_vborder_property,
2006 0);
2007
2008 drm_object_attach_property(&radeon_connector->base.base,
2009 dev->mode_config.scaling_mode_property,
2010 DRM_MODE_SCALE_NONE);
2011
2012 drm_object_attach_property(&radeon_connector->base.base,
2013 rdev->mode_info.dither_property,
2014 RADEON_FMT_DITHER_DISABLE);
2015
2016 if (radeon_audio != 0) {
2017 drm_object_attach_property(&radeon_connector->base.base,
2018 rdev->mode_info.audio_property,
2019 RADEON_AUDIO_AUTO);
2020 radeon_connector->audio = RADEON_AUDIO_AUTO;
2021 }
2022 if (ASIC_IS_DCE5(rdev))
2023 drm_object_attach_property(&radeon_connector->base.base,
2024 rdev->mode_info.output_csc_property,
2025 RADEON_OUTPUT_CSC_BYPASS);
2026
2027 subpixel_order = SubPixelHorizontalRGB;
2028 connector->interlace_allowed = true;
2029 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2030 connector->doublescan_allowed = true;
2031 else
2032 connector->doublescan_allowed = false;
2033 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2034 radeon_connector->dac_load_detect = true;
2035 drm_object_attach_property(&radeon_connector->base.base,
2036 rdev->mode_info.load_detect_property,
2037 1);
2038 }
2039 break;
2040 case DRM_MODE_CONNECTOR_LVDS:
2041 case DRM_MODE_CONNECTOR_eDP:
2042 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2043 &radeon_lvds_bridge_connector_funcs,
2044 connector_type,
2045 ddc);
2046 drm_connector_helper_add(&radeon_connector->base,
2047 &radeon_dp_connector_helper_funcs);
2048 drm_object_attach_property(&radeon_connector->base.base,
2049 dev->mode_config.scaling_mode_property,
2050 DRM_MODE_SCALE_FULLSCREEN);
2051 subpixel_order = SubPixelHorizontalRGB;
2052 connector->interlace_allowed = false;
2053 connector->doublescan_allowed = false;
2054 break;
2055 }
2056 } else {
2057 switch (connector_type) {
2058 case DRM_MODE_CONNECTOR_VGA:
2059 if (i2c_bus->valid) {
2060 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2061 if (!radeon_connector->ddc_bus)
2062 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2063 else
2064 ddc = &radeon_connector->ddc_bus->adapter;
2065 }
2066 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2067 &radeon_vga_connector_funcs,
2068 connector_type,
2069 ddc);
2070 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2071 radeon_connector->dac_load_detect = true;
2072 drm_object_attach_property(&radeon_connector->base.base,
2073 rdev->mode_info.load_detect_property,
2074 1);
2075 if (ASIC_IS_AVIVO(rdev))
2076 drm_object_attach_property(&radeon_connector->base.base,
2077 dev->mode_config.scaling_mode_property,
2078 DRM_MODE_SCALE_NONE);
2079 if (ASIC_IS_DCE5(rdev))
2080 drm_object_attach_property(&radeon_connector->base.base,
2081 rdev->mode_info.output_csc_property,
2082 RADEON_OUTPUT_CSC_BYPASS);
2083
2084 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2085 connector->interlace_allowed = true;
2086 connector->doublescan_allowed = true;
2087 break;
2088 case DRM_MODE_CONNECTOR_DVIA:
2089 if (i2c_bus->valid) {
2090 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2091 if (!radeon_connector->ddc_bus)
2092 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2093 else
2094 ddc = &radeon_connector->ddc_bus->adapter;
2095 }
2096 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2097 &radeon_vga_connector_funcs,
2098 connector_type,
2099 ddc);
2100 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2101 radeon_connector->dac_load_detect = true;
2102 drm_object_attach_property(&radeon_connector->base.base,
2103 rdev->mode_info.load_detect_property,
2104 1);
2105 if (ASIC_IS_AVIVO(rdev))
2106 drm_object_attach_property(&radeon_connector->base.base,
2107 dev->mode_config.scaling_mode_property,
2108 DRM_MODE_SCALE_NONE);
2109 if (ASIC_IS_DCE5(rdev))
2110 drm_object_attach_property(&radeon_connector->base.base,
2111 rdev->mode_info.output_csc_property,
2112 RADEON_OUTPUT_CSC_BYPASS);
2113
2114 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2115 connector->interlace_allowed = true;
2116 connector->doublescan_allowed = true;
2117 break;
2118 case DRM_MODE_CONNECTOR_DVII:
2119 case DRM_MODE_CONNECTOR_DVID:
2120 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2121 if (!radeon_dig_connector)
2122 goto failed;
2123 radeon_dig_connector->igp_lane_info = igp_lane_info;
2124 radeon_connector->con_priv = radeon_dig_connector;
2125 if (i2c_bus->valid) {
2126 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2127 if (!radeon_connector->ddc_bus)
2128 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2129 else
2130 ddc = &radeon_connector->ddc_bus->adapter;
2131 }
2132 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2133 &radeon_dvi_connector_funcs,
2134 connector_type,
2135 ddc);
2136 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2137 subpixel_order = SubPixelHorizontalRGB;
2138 drm_object_attach_property(&radeon_connector->base.base,
2139 rdev->mode_info.coherent_mode_property,
2140 1);
2141 if (ASIC_IS_AVIVO(rdev)) {
2142 drm_object_attach_property(&radeon_connector->base.base,
2143 rdev->mode_info.underscan_property,
2144 UNDERSCAN_OFF);
2145 drm_object_attach_property(&radeon_connector->base.base,
2146 rdev->mode_info.underscan_hborder_property,
2147 0);
2148 drm_object_attach_property(&radeon_connector->base.base,
2149 rdev->mode_info.underscan_vborder_property,
2150 0);
2151 drm_object_attach_property(&radeon_connector->base.base,
2152 rdev->mode_info.dither_property,
2153 RADEON_FMT_DITHER_DISABLE);
2154 drm_object_attach_property(&radeon_connector->base.base,
2155 dev->mode_config.scaling_mode_property,
2156 DRM_MODE_SCALE_NONE);
2157 }
2158 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
2159 drm_object_attach_property(&radeon_connector->base.base,
2160 rdev->mode_info.audio_property,
2161 RADEON_AUDIO_AUTO);
2162 radeon_connector->audio = RADEON_AUDIO_AUTO;
2163 }
2164 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2165 radeon_connector->dac_load_detect = true;
2166 drm_object_attach_property(&radeon_connector->base.base,
2167 rdev->mode_info.load_detect_property,
2168 1);
2169 }
2170 if (ASIC_IS_DCE5(rdev))
2171 drm_object_attach_property(&radeon_connector->base.base,
2172 rdev->mode_info.output_csc_property,
2173 RADEON_OUTPUT_CSC_BYPASS);
2174 connector->interlace_allowed = true;
2175 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2176 connector->doublescan_allowed = true;
2177 else
2178 connector->doublescan_allowed = false;
2179 break;
2180 case DRM_MODE_CONNECTOR_HDMIA:
2181 case DRM_MODE_CONNECTOR_HDMIB:
2182 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2183 if (!radeon_dig_connector)
2184 goto failed;
2185 radeon_dig_connector->igp_lane_info = igp_lane_info;
2186 radeon_connector->con_priv = radeon_dig_connector;
2187 if (i2c_bus->valid) {
2188 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2189 if (!radeon_connector->ddc_bus)
2190 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2191 else
2192 ddc = &radeon_connector->ddc_bus->adapter;
2193 }
2194 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2195 &radeon_dvi_connector_funcs,
2196 connector_type,
2197 ddc);
2198 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2199 drm_object_attach_property(&radeon_connector->base.base,
2200 rdev->mode_info.coherent_mode_property,
2201 1);
2202 if (ASIC_IS_AVIVO(rdev)) {
2203 drm_object_attach_property(&radeon_connector->base.base,
2204 rdev->mode_info.underscan_property,
2205 UNDERSCAN_OFF);
2206 drm_object_attach_property(&radeon_connector->base.base,
2207 rdev->mode_info.underscan_hborder_property,
2208 0);
2209 drm_object_attach_property(&radeon_connector->base.base,
2210 rdev->mode_info.underscan_vborder_property,
2211 0);
2212 drm_object_attach_property(&radeon_connector->base.base,
2213 rdev->mode_info.dither_property,
2214 RADEON_FMT_DITHER_DISABLE);
2215 drm_object_attach_property(&radeon_connector->base.base,
2216 dev->mode_config.scaling_mode_property,
2217 DRM_MODE_SCALE_NONE);
2218 }
2219 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
2220 drm_object_attach_property(&radeon_connector->base.base,
2221 rdev->mode_info.audio_property,
2222 RADEON_AUDIO_AUTO);
2223 radeon_connector->audio = RADEON_AUDIO_AUTO;
2224 }
2225 if (ASIC_IS_DCE5(rdev))
2226 drm_object_attach_property(&radeon_connector->base.base,
2227 rdev->mode_info.output_csc_property,
2228 RADEON_OUTPUT_CSC_BYPASS);
2229 subpixel_order = SubPixelHorizontalRGB;
2230 connector->interlace_allowed = true;
2231 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2232 connector->doublescan_allowed = true;
2233 else
2234 connector->doublescan_allowed = false;
2235 break;
2236 case DRM_MODE_CONNECTOR_DisplayPort:
2237 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2238 if (!radeon_dig_connector)
2239 goto failed;
2240 radeon_dig_connector->igp_lane_info = igp_lane_info;
2241 radeon_connector->con_priv = radeon_dig_connector;
2242 if (i2c_bus->valid) {
2243 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2244 if (radeon_connector->ddc_bus) {
2245 has_aux = true;
2246 ddc = &radeon_connector->ddc_bus->adapter;
2247 } else {
2248 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2249 }
2250 }
2251 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2252 &radeon_dp_connector_funcs,
2253 connector_type,
2254 ddc);
2255 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2256 subpixel_order = SubPixelHorizontalRGB;
2257 drm_object_attach_property(&radeon_connector->base.base,
2258 rdev->mode_info.coherent_mode_property,
2259 1);
2260 if (ASIC_IS_AVIVO(rdev)) {
2261 drm_object_attach_property(&radeon_connector->base.base,
2262 rdev->mode_info.underscan_property,
2263 UNDERSCAN_OFF);
2264 drm_object_attach_property(&radeon_connector->base.base,
2265 rdev->mode_info.underscan_hborder_property,
2266 0);
2267 drm_object_attach_property(&radeon_connector->base.base,
2268 rdev->mode_info.underscan_vborder_property,
2269 0);
2270 drm_object_attach_property(&radeon_connector->base.base,
2271 rdev->mode_info.dither_property,
2272 RADEON_FMT_DITHER_DISABLE);
2273 drm_object_attach_property(&radeon_connector->base.base,
2274 dev->mode_config.scaling_mode_property,
2275 DRM_MODE_SCALE_NONE);
2276 }
2277 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
2278 drm_object_attach_property(&radeon_connector->base.base,
2279 rdev->mode_info.audio_property,
2280 RADEON_AUDIO_AUTO);
2281 radeon_connector->audio = RADEON_AUDIO_AUTO;
2282 }
2283 if (ASIC_IS_DCE5(rdev))
2284 drm_object_attach_property(&radeon_connector->base.base,
2285 rdev->mode_info.output_csc_property,
2286 RADEON_OUTPUT_CSC_BYPASS);
2287 connector->interlace_allowed = true;
2288
2289 connector->doublescan_allowed = false;
2290 break;
2291 case DRM_MODE_CONNECTOR_eDP:
2292 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2293 if (!radeon_dig_connector)
2294 goto failed;
2295 radeon_dig_connector->igp_lane_info = igp_lane_info;
2296 radeon_connector->con_priv = radeon_dig_connector;
2297 if (i2c_bus->valid) {
2298 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2299 if (radeon_connector->ddc_bus) {
2300 has_aux = true;
2301 ddc = &radeon_connector->ddc_bus->adapter;
2302 } else {
2303 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2304 }
2305 }
2306 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2307 &radeon_edp_connector_funcs,
2308 connector_type,
2309 ddc);
2310 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2311 drm_object_attach_property(&radeon_connector->base.base,
2312 dev->mode_config.scaling_mode_property,
2313 DRM_MODE_SCALE_FULLSCREEN);
2314 subpixel_order = SubPixelHorizontalRGB;
2315 connector->interlace_allowed = false;
2316 connector->doublescan_allowed = false;
2317 break;
2318 case DRM_MODE_CONNECTOR_SVIDEO:
2319 case DRM_MODE_CONNECTOR_Composite:
2320 case DRM_MODE_CONNECTOR_9PinDIN:
2321 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2322 &radeon_tv_connector_funcs,
2323 connector_type,
2324 ddc);
2325 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2326 radeon_connector->dac_load_detect = true;
2327 drm_object_attach_property(&radeon_connector->base.base,
2328 rdev->mode_info.load_detect_property,
2329 1);
2330 drm_object_attach_property(&radeon_connector->base.base,
2331 rdev->mode_info.tv_std_property,
2332 radeon_atombios_get_tv_info(rdev));
2333
2334 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2335 connector->interlace_allowed = false;
2336 connector->doublescan_allowed = false;
2337 break;
2338 case DRM_MODE_CONNECTOR_LVDS:
2339 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2340 if (!radeon_dig_connector)
2341 goto failed;
2342 radeon_dig_connector->igp_lane_info = igp_lane_info;
2343 radeon_connector->con_priv = radeon_dig_connector;
2344 if (i2c_bus->valid) {
2345 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2346 if (!radeon_connector->ddc_bus)
2347 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2348 else
2349 ddc = &radeon_connector->ddc_bus->adapter;
2350 }
2351 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2352 &radeon_lvds_connector_funcs,
2353 connector_type,
2354 ddc);
2355 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2356 drm_object_attach_property(&radeon_connector->base.base,
2357 dev->mode_config.scaling_mode_property,
2358 DRM_MODE_SCALE_FULLSCREEN);
2359 subpixel_order = SubPixelHorizontalRGB;
2360 connector->interlace_allowed = false;
2361 connector->doublescan_allowed = false;
2362 break;
2363 }
2364 }
2365
2366 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
2367 if (i2c_bus->valid) {
2368 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2369 DRM_CONNECTOR_POLL_DISCONNECT;
2370 }
2371 } else
2372 connector->polled = DRM_CONNECTOR_POLL_HPD;
2373
2374 connector->display_info.subpixel_order = subpixel_order;
2375 drm_connector_register(connector);
2376
2377 if (has_aux)
2378 radeon_dp_aux_init(radeon_connector);
2379
2380 return;
2381
2382 failed:
2383 drm_connector_cleanup(connector);
2384 kfree(connector);
2385 }
2386
2387 void
2388 radeon_add_legacy_connector(struct drm_device *dev,
2389 uint32_t connector_id,
2390 uint32_t supported_device,
2391 int connector_type,
2392 struct radeon_i2c_bus_rec *i2c_bus,
2393 uint16_t connector_object_id,
2394 struct radeon_hpd *hpd)
2395 {
2396 struct radeon_device *rdev = dev->dev_private;
2397 struct drm_connector *connector;
2398 struct radeon_connector *radeon_connector;
2399 struct i2c_adapter *ddc = NULL;
2400 uint32_t subpixel_order = SubPixelNone;
2401
2402 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
2403 return;
2404
2405
2406 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2407 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2408 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2409 (radeon_tv == 0))
2410 return;
2411
2412
2413 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2414 radeon_connector = to_radeon_connector(connector);
2415 if (radeon_connector->connector_id == connector_id) {
2416 radeon_connector->devices |= supported_device;
2417 return;
2418 }
2419 }
2420
2421 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2422 if (!radeon_connector)
2423 return;
2424
2425 connector = &radeon_connector->base;
2426
2427 radeon_connector->connector_id = connector_id;
2428 radeon_connector->devices = supported_device;
2429 radeon_connector->connector_object_id = connector_object_id;
2430 radeon_connector->hpd = *hpd;
2431
2432 switch (connector_type) {
2433 case DRM_MODE_CONNECTOR_VGA:
2434 if (i2c_bus->valid) {
2435 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2436 if (!radeon_connector->ddc_bus)
2437 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2438 else
2439 ddc = &radeon_connector->ddc_bus->adapter;
2440 }
2441 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2442 &radeon_vga_connector_funcs,
2443 connector_type,
2444 ddc);
2445 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2446 radeon_connector->dac_load_detect = true;
2447 drm_object_attach_property(&radeon_connector->base.base,
2448 rdev->mode_info.load_detect_property,
2449 1);
2450
2451 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2452 connector->interlace_allowed = true;
2453 connector->doublescan_allowed = true;
2454 break;
2455 case DRM_MODE_CONNECTOR_DVIA:
2456 if (i2c_bus->valid) {
2457 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2458 if (!radeon_connector->ddc_bus)
2459 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2460 else
2461 ddc = &radeon_connector->ddc_bus->adapter;
2462 }
2463 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2464 &radeon_vga_connector_funcs,
2465 connector_type,
2466 ddc);
2467 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2468 radeon_connector->dac_load_detect = true;
2469 drm_object_attach_property(&radeon_connector->base.base,
2470 rdev->mode_info.load_detect_property,
2471 1);
2472
2473 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2474 connector->interlace_allowed = true;
2475 connector->doublescan_allowed = true;
2476 break;
2477 case DRM_MODE_CONNECTOR_DVII:
2478 case DRM_MODE_CONNECTOR_DVID:
2479 if (i2c_bus->valid) {
2480 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2481 if (!radeon_connector->ddc_bus)
2482 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2483 else
2484 ddc = &radeon_connector->ddc_bus->adapter;
2485 }
2486 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2487 &radeon_dvi_connector_funcs,
2488 connector_type,
2489 ddc);
2490 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2491 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2492 radeon_connector->dac_load_detect = true;
2493 drm_object_attach_property(&radeon_connector->base.base,
2494 rdev->mode_info.load_detect_property,
2495 1);
2496 }
2497 subpixel_order = SubPixelHorizontalRGB;
2498 connector->interlace_allowed = true;
2499 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2500 connector->doublescan_allowed = true;
2501 else
2502 connector->doublescan_allowed = false;
2503 break;
2504 case DRM_MODE_CONNECTOR_SVIDEO:
2505 case DRM_MODE_CONNECTOR_Composite:
2506 case DRM_MODE_CONNECTOR_9PinDIN:
2507 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2508 &radeon_tv_connector_funcs,
2509 connector_type,
2510 ddc);
2511 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2512 radeon_connector->dac_load_detect = true;
2513
2514
2515
2516
2517
2518 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2519 radeon_connector->dac_load_detect = false;
2520 drm_object_attach_property(&radeon_connector->base.base,
2521 rdev->mode_info.load_detect_property,
2522 radeon_connector->dac_load_detect);
2523 drm_object_attach_property(&radeon_connector->base.base,
2524 rdev->mode_info.tv_std_property,
2525 radeon_combios_get_tv_info(rdev));
2526
2527 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2528 connector->interlace_allowed = false;
2529 connector->doublescan_allowed = false;
2530 break;
2531 case DRM_MODE_CONNECTOR_LVDS:
2532 if (i2c_bus->valid) {
2533 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2534 if (!radeon_connector->ddc_bus)
2535 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2536 else
2537 ddc = &radeon_connector->ddc_bus->adapter;
2538 }
2539 drm_connector_init_with_ddc(dev, &radeon_connector->base,
2540 &radeon_lvds_connector_funcs,
2541 connector_type,
2542 ddc);
2543 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2544 drm_object_attach_property(&radeon_connector->base.base,
2545 dev->mode_config.scaling_mode_property,
2546 DRM_MODE_SCALE_FULLSCREEN);
2547 subpixel_order = SubPixelHorizontalRGB;
2548 connector->interlace_allowed = false;
2549 connector->doublescan_allowed = false;
2550 break;
2551 }
2552
2553 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
2554 if (i2c_bus->valid) {
2555 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2556 DRM_CONNECTOR_POLL_DISCONNECT;
2557 }
2558 } else
2559 connector->polled = DRM_CONNECTOR_POLL_HPD;
2560
2561 connector->display_info.subpixel_order = subpixel_order;
2562 drm_connector_register(connector);
2563 }
2564
2565 void radeon_setup_mst_connector(struct drm_device *dev)
2566 {
2567 struct radeon_device *rdev = dev->dev_private;
2568 struct drm_connector *connector;
2569 struct radeon_connector *radeon_connector;
2570
2571 if (!ASIC_IS_DCE5(rdev))
2572 return;
2573
2574 if (radeon_mst == 0)
2575 return;
2576
2577 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2578 radeon_connector = to_radeon_connector(connector);
2579
2580 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
2581 continue;
2582
2583 radeon_dp_mst_init(radeon_connector);
2584 }
2585 }