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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright (c) 2010 Red Hat Inc.
0004  * Author : Dave Airlie <airlied@redhat.com>
0005  *
0006  * ATPX support for both Intel/ATI
0007  */
0008 #include <linux/vga_switcheroo.h>
0009 #include <linux/slab.h>
0010 #include <linux/acpi.h>
0011 #include <linux/pci.h>
0012 #include <linux/delay.h>
0013 
0014 #include "radeon_acpi.h"
0015 
0016 struct radeon_atpx_functions {
0017     bool px_params;
0018     bool power_cntl;
0019     bool disp_mux_cntl;
0020     bool i2c_mux_cntl;
0021     bool switch_start;
0022     bool switch_end;
0023     bool disp_connectors_mapping;
0024     bool disp_detetion_ports;
0025 };
0026 
0027 struct radeon_atpx {
0028     acpi_handle handle;
0029     struct radeon_atpx_functions functions;
0030     bool is_hybrid;
0031     bool dgpu_req_power_for_displays;
0032 };
0033 
0034 static struct radeon_atpx_priv {
0035     bool atpx_detected;
0036     bool bridge_pm_usable;
0037     /* handle for device - and atpx */
0038     acpi_handle dhandle;
0039     struct radeon_atpx atpx;
0040 } radeon_atpx_priv;
0041 
0042 struct atpx_verify_interface {
0043     u16 size;       /* structure size in bytes (includes size field) */
0044     u16 version;        /* version */
0045     u32 function_bits;  /* supported functions bit vector */
0046 } __packed;
0047 
0048 struct atpx_px_params {
0049     u16 size;       /* structure size in bytes (includes size field) */
0050     u32 valid_flags;    /* which flags are valid */
0051     u32 flags;      /* flags */
0052 } __packed;
0053 
0054 struct atpx_power_control {
0055     u16 size;
0056     u8 dgpu_state;
0057 } __packed;
0058 
0059 struct atpx_mux {
0060     u16 size;
0061     u16 mux;
0062 } __packed;
0063 
0064 bool radeon_has_atpx(void) {
0065     return radeon_atpx_priv.atpx_detected;
0066 }
0067 
0068 bool radeon_has_atpx_dgpu_power_cntl(void) {
0069     return radeon_atpx_priv.atpx.functions.power_cntl;
0070 }
0071 
0072 bool radeon_is_atpx_hybrid(void) {
0073     return radeon_atpx_priv.atpx.is_hybrid;
0074 }
0075 
0076 bool radeon_atpx_dgpu_req_power_for_displays(void) {
0077     return radeon_atpx_priv.atpx.dgpu_req_power_for_displays;
0078 }
0079 
0080 /**
0081  * radeon_atpx_call - call an ATPX method
0082  *
0083  * @handle: acpi handle
0084  * @function: the ATPX function to execute
0085  * @params: ATPX function params
0086  *
0087  * Executes the requested ATPX function (all asics).
0088  * Returns a pointer to the acpi output buffer.
0089  */
0090 static union acpi_object *radeon_atpx_call(acpi_handle handle, int function,
0091                        struct acpi_buffer *params)
0092 {
0093     acpi_status status;
0094     union acpi_object atpx_arg_elements[2];
0095     struct acpi_object_list atpx_arg;
0096     struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
0097 
0098     atpx_arg.count = 2;
0099     atpx_arg.pointer = &atpx_arg_elements[0];
0100 
0101     atpx_arg_elements[0].type = ACPI_TYPE_INTEGER;
0102     atpx_arg_elements[0].integer.value = function;
0103 
0104     if (params) {
0105         atpx_arg_elements[1].type = ACPI_TYPE_BUFFER;
0106         atpx_arg_elements[1].buffer.length = params->length;
0107         atpx_arg_elements[1].buffer.pointer = params->pointer;
0108     } else {
0109         /* We need a second fake parameter */
0110         atpx_arg_elements[1].type = ACPI_TYPE_INTEGER;
0111         atpx_arg_elements[1].integer.value = 0;
0112     }
0113 
0114     status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
0115 
0116     /* Fail only if calling the method fails and ATPX is supported */
0117     if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
0118         printk("failed to evaluate ATPX got %s\n",
0119                acpi_format_exception(status));
0120         kfree(buffer.pointer);
0121         return NULL;
0122     }
0123 
0124     return buffer.pointer;
0125 }
0126 
0127 /**
0128  * radeon_atpx_parse_functions - parse supported functions
0129  *
0130  * @f: supported functions struct
0131  * @mask: supported functions mask from ATPX
0132  *
0133  * Use the supported functions mask from ATPX function
0134  * ATPX_FUNCTION_VERIFY_INTERFACE to determine what functions
0135  * are supported (all asics).
0136  */
0137 static void radeon_atpx_parse_functions(struct radeon_atpx_functions *f, u32 mask)
0138 {
0139     f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED;
0140     f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED;
0141     f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED;
0142     f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED;
0143     f->switch_start = mask & ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED;
0144     f->switch_end = mask & ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED;
0145     f->disp_connectors_mapping = mask & ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED;
0146     f->disp_detetion_ports = mask & ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED;
0147 }
0148 
0149 /**
0150  * radeon_atpx_validate_functions - validate ATPX functions
0151  *
0152  * @atpx: radeon atpx struct
0153  *
0154  * Validate that required functions are enabled (all asics).
0155  * returns 0 on success, error on failure.
0156  */
0157 static int radeon_atpx_validate(struct radeon_atpx *atpx)
0158 {
0159     u32 valid_bits = 0;
0160 
0161     if (atpx->functions.px_params) {
0162         union acpi_object *info;
0163         struct atpx_px_params output;
0164         size_t size;
0165 
0166         info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_GET_PX_PARAMETERS, NULL);
0167         if (!info)
0168             return -EIO;
0169 
0170         memset(&output, 0, sizeof(output));
0171 
0172         size = *(u16 *) info->buffer.pointer;
0173         if (size < 10) {
0174             printk("ATPX buffer is too small: %zu\n", size);
0175             kfree(info);
0176             return -EINVAL;
0177         }
0178         size = min(sizeof(output), size);
0179 
0180         memcpy(&output, info->buffer.pointer, size);
0181 
0182         valid_bits = output.flags & output.valid_flags;
0183 
0184         kfree(info);
0185     }
0186 
0187     /* if separate mux flag is set, mux controls are required */
0188     if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) {
0189         atpx->functions.i2c_mux_cntl = true;
0190         atpx->functions.disp_mux_cntl = true;
0191     }
0192     /* if any outputs are muxed, mux controls are required */
0193     if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED |
0194               ATPX_TV_SIGNAL_MUXED |
0195               ATPX_DFP_SIGNAL_MUXED))
0196         atpx->functions.disp_mux_cntl = true;
0197 
0198     /* some bioses set these bits rather than flagging power_cntl as supported */
0199     if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED |
0200               ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED))
0201         atpx->functions.power_cntl = true;
0202 
0203     atpx->is_hybrid = false;
0204     if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
0205         printk("ATPX Hybrid Graphics\n");
0206         /*
0207          * Disable legacy PM methods only when pcie port PM is usable,
0208          * otherwise the device might fail to power off or power on.
0209          */
0210         atpx->functions.power_cntl = !radeon_atpx_priv.bridge_pm_usable;
0211         atpx->is_hybrid = true;
0212     }
0213 
0214     return 0;
0215 }
0216 
0217 /**
0218  * radeon_atpx_verify_interface - verify ATPX
0219  *
0220  * @atpx: radeon atpx struct
0221  *
0222  * Execute the ATPX_FUNCTION_VERIFY_INTERFACE ATPX function
0223  * to initialize ATPX and determine what features are supported
0224  * (all asics).
0225  * returns 0 on success, error on failure.
0226  */
0227 static int radeon_atpx_verify_interface(struct radeon_atpx *atpx)
0228 {
0229     union acpi_object *info;
0230     struct atpx_verify_interface output;
0231     size_t size;
0232     int err = 0;
0233 
0234     info = radeon_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL);
0235     if (!info)
0236         return -EIO;
0237 
0238     memset(&output, 0, sizeof(output));
0239 
0240     size = *(u16 *) info->buffer.pointer;
0241     if (size < 8) {
0242         printk("ATPX buffer is too small: %zu\n", size);
0243         err = -EINVAL;
0244         goto out;
0245     }
0246     size = min(sizeof(output), size);
0247 
0248     memcpy(&output, info->buffer.pointer, size);
0249 
0250     /* TODO: check version? */
0251     printk("ATPX version %u, functions 0x%08x\n",
0252            output.version, output.function_bits);
0253 
0254     radeon_atpx_parse_functions(&atpx->functions, output.function_bits);
0255 
0256 out:
0257     kfree(info);
0258     return err;
0259 }
0260 
0261 /**
0262  * radeon_atpx_set_discrete_state - power up/down discrete GPU
0263  *
0264  * @atpx: atpx info struct
0265  * @state: discrete GPU state (0 = power down, 1 = power up)
0266  *
0267  * Execute the ATPX_FUNCTION_POWER_CONTROL ATPX function to
0268  * power down/up the discrete GPU (all asics).
0269  * Returns 0 on success, error on failure.
0270  */
0271 static int radeon_atpx_set_discrete_state(struct radeon_atpx *atpx, u8 state)
0272 {
0273     struct acpi_buffer params;
0274     union acpi_object *info;
0275     struct atpx_power_control input;
0276 
0277     if (atpx->functions.power_cntl) {
0278         input.size = 3;
0279         input.dgpu_state = state;
0280         params.length = input.size;
0281         params.pointer = &input;
0282         info = radeon_atpx_call(atpx->handle,
0283                     ATPX_FUNCTION_POWER_CONTROL,
0284                     &params);
0285         if (!info)
0286             return -EIO;
0287         kfree(info);
0288 
0289         /* 200ms delay is required after off */
0290         if (state == 0)
0291             msleep(200);
0292     }
0293     return 0;
0294 }
0295 
0296 /**
0297  * radeon_atpx_switch_disp_mux - switch display mux
0298  *
0299  * @atpx: atpx info struct
0300  * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
0301  *
0302  * Execute the ATPX_FUNCTION_DISPLAY_MUX_CONTROL ATPX function to
0303  * switch the display mux between the discrete GPU and integrated GPU
0304  * (all asics).
0305  * Returns 0 on success, error on failure.
0306  */
0307 static int radeon_atpx_switch_disp_mux(struct radeon_atpx *atpx, u16 mux_id)
0308 {
0309     struct acpi_buffer params;
0310     union acpi_object *info;
0311     struct atpx_mux input;
0312 
0313     if (atpx->functions.disp_mux_cntl) {
0314         input.size = 4;
0315         input.mux = mux_id;
0316         params.length = input.size;
0317         params.pointer = &input;
0318         info = radeon_atpx_call(atpx->handle,
0319                     ATPX_FUNCTION_DISPLAY_MUX_CONTROL,
0320                     &params);
0321         if (!info)
0322             return -EIO;
0323         kfree(info);
0324     }
0325     return 0;
0326 }
0327 
0328 /**
0329  * radeon_atpx_switch_i2c_mux - switch i2c/hpd mux
0330  *
0331  * @atpx: atpx info struct
0332  * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
0333  *
0334  * Execute the ATPX_FUNCTION_I2C_MUX_CONTROL ATPX function to
0335  * switch the i2c/hpd mux between the discrete GPU and integrated GPU
0336  * (all asics).
0337  * Returns 0 on success, error on failure.
0338  */
0339 static int radeon_atpx_switch_i2c_mux(struct radeon_atpx *atpx, u16 mux_id)
0340 {
0341     struct acpi_buffer params;
0342     union acpi_object *info;
0343     struct atpx_mux input;
0344 
0345     if (atpx->functions.i2c_mux_cntl) {
0346         input.size = 4;
0347         input.mux = mux_id;
0348         params.length = input.size;
0349         params.pointer = &input;
0350         info = radeon_atpx_call(atpx->handle,
0351                     ATPX_FUNCTION_I2C_MUX_CONTROL,
0352                     &params);
0353         if (!info)
0354             return -EIO;
0355         kfree(info);
0356     }
0357     return 0;
0358 }
0359 
0360 /**
0361  * radeon_atpx_switch_start - notify the sbios of a GPU switch
0362  *
0363  * @atpx: atpx info struct
0364  * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
0365  *
0366  * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION ATPX
0367  * function to notify the sbios that a switch between the discrete GPU and
0368  * integrated GPU has begun (all asics).
0369  * Returns 0 on success, error on failure.
0370  */
0371 static int radeon_atpx_switch_start(struct radeon_atpx *atpx, u16 mux_id)
0372 {
0373     struct acpi_buffer params;
0374     union acpi_object *info;
0375     struct atpx_mux input;
0376 
0377     if (atpx->functions.switch_start) {
0378         input.size = 4;
0379         input.mux = mux_id;
0380         params.length = input.size;
0381         params.pointer = &input;
0382         info = radeon_atpx_call(atpx->handle,
0383                     ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION,
0384                     &params);
0385         if (!info)
0386             return -EIO;
0387         kfree(info);
0388     }
0389     return 0;
0390 }
0391 
0392 /**
0393  * radeon_atpx_switch_end - notify the sbios of a GPU switch
0394  *
0395  * @atpx: atpx info struct
0396  * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
0397  *
0398  * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION ATPX
0399  * function to notify the sbios that a switch between the discrete GPU and
0400  * integrated GPU has ended (all asics).
0401  * Returns 0 on success, error on failure.
0402  */
0403 static int radeon_atpx_switch_end(struct radeon_atpx *atpx, u16 mux_id)
0404 {
0405     struct acpi_buffer params;
0406     union acpi_object *info;
0407     struct atpx_mux input;
0408 
0409     if (atpx->functions.switch_end) {
0410         input.size = 4;
0411         input.mux = mux_id;
0412         params.length = input.size;
0413         params.pointer = &input;
0414         info = radeon_atpx_call(atpx->handle,
0415                     ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION,
0416                     &params);
0417         if (!info)
0418             return -EIO;
0419         kfree(info);
0420     }
0421     return 0;
0422 }
0423 
0424 /**
0425  * radeon_atpx_switchto - switch to the requested GPU
0426  *
0427  * @id: GPU to switch to
0428  *
0429  * Execute the necessary ATPX functions to switch between the discrete GPU and
0430  * integrated GPU (all asics).
0431  * Returns 0 on success, error on failure.
0432  */
0433 static int radeon_atpx_switchto(enum vga_switcheroo_client_id id)
0434 {
0435     u16 gpu_id;
0436 
0437     if (id == VGA_SWITCHEROO_IGD)
0438         gpu_id = ATPX_INTEGRATED_GPU;
0439     else
0440         gpu_id = ATPX_DISCRETE_GPU;
0441 
0442     radeon_atpx_switch_start(&radeon_atpx_priv.atpx, gpu_id);
0443     radeon_atpx_switch_disp_mux(&radeon_atpx_priv.atpx, gpu_id);
0444     radeon_atpx_switch_i2c_mux(&radeon_atpx_priv.atpx, gpu_id);
0445     radeon_atpx_switch_end(&radeon_atpx_priv.atpx, gpu_id);
0446 
0447     return 0;
0448 }
0449 
0450 /**
0451  * radeon_atpx_power_state - power down/up the requested GPU
0452  *
0453  * @id: GPU to power down/up
0454  * @state: requested power state (0 = off, 1 = on)
0455  *
0456  * Execute the necessary ATPX function to power down/up the discrete GPU
0457  * (all asics).
0458  * Returns 0 on success, error on failure.
0459  */
0460 static int radeon_atpx_power_state(enum vga_switcheroo_client_id id,
0461                    enum vga_switcheroo_state state)
0462 {
0463     /* on w500 ACPI can't change intel gpu state */
0464     if (id == VGA_SWITCHEROO_IGD)
0465         return 0;
0466 
0467     radeon_atpx_set_discrete_state(&radeon_atpx_priv.atpx, state);
0468     return 0;
0469 }
0470 
0471 /**
0472  * radeon_atpx_pci_probe_handle - look up the ATPX handle
0473  *
0474  * @pdev: pci device
0475  *
0476  * Look up the ATPX handles (all asics).
0477  * Returns true if the handles are found, false if not.
0478  */
0479 static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
0480 {
0481     acpi_handle dhandle, atpx_handle;
0482     acpi_status status;
0483 
0484     dhandle = ACPI_HANDLE(&pdev->dev);
0485     if (!dhandle)
0486         return false;
0487 
0488     status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
0489     if (ACPI_FAILURE(status))
0490         return false;
0491 
0492     radeon_atpx_priv.dhandle = dhandle;
0493     radeon_atpx_priv.atpx.handle = atpx_handle;
0494     return true;
0495 }
0496 
0497 /**
0498  * radeon_atpx_init - verify the ATPX interface
0499  *
0500  * Verify the ATPX interface (all asics).
0501  * Returns 0 on success, error on failure.
0502  */
0503 static int radeon_atpx_init(void)
0504 {
0505     int r;
0506 
0507     /* set up the ATPX handle */
0508     r = radeon_atpx_verify_interface(&radeon_atpx_priv.atpx);
0509     if (r)
0510         return r;
0511 
0512     /* validate the atpx setup */
0513     r = radeon_atpx_validate(&radeon_atpx_priv.atpx);
0514     if (r)
0515         return r;
0516 
0517     return 0;
0518 }
0519 
0520 /**
0521  * radeon_atpx_get_client_id - get the client id
0522  *
0523  * @pdev: pci device
0524  *
0525  * look up whether we are the integrated or discrete GPU (all asics).
0526  * Returns the client id.
0527  */
0528 static enum vga_switcheroo_client_id radeon_atpx_get_client_id(struct pci_dev *pdev)
0529 {
0530     if (radeon_atpx_priv.dhandle == ACPI_HANDLE(&pdev->dev))
0531         return VGA_SWITCHEROO_IGD;
0532     else
0533         return VGA_SWITCHEROO_DIS;
0534 }
0535 
0536 static const struct vga_switcheroo_handler radeon_atpx_handler = {
0537     .switchto = radeon_atpx_switchto,
0538     .power_state = radeon_atpx_power_state,
0539     .get_client_id = radeon_atpx_get_client_id,
0540 };
0541 
0542 /**
0543  * radeon_atpx_detect - detect whether we have PX
0544  *
0545  * Check if we have a PX system (all asics).
0546  * Returns true if we have a PX system, false if not.
0547  */
0548 static bool radeon_atpx_detect(void)
0549 {
0550     char acpi_method_name[255] = { 0 };
0551     struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};
0552     struct pci_dev *pdev = NULL;
0553     bool has_atpx = false;
0554     int vga_count = 0;
0555     bool d3_supported = false;
0556     struct pci_dev *parent_pdev;
0557 
0558     while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
0559         vga_count++;
0560 
0561         has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
0562 
0563         parent_pdev = pci_upstream_bridge(pdev);
0564         d3_supported |= parent_pdev && parent_pdev->bridge_d3;
0565     }
0566 
0567     /* some newer PX laptops mark the dGPU as a non-VGA display device */
0568     while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
0569         vga_count++;
0570 
0571         has_atpx |= (radeon_atpx_pci_probe_handle(pdev) == true);
0572 
0573         parent_pdev = pci_upstream_bridge(pdev);
0574         d3_supported |= parent_pdev && parent_pdev->bridge_d3;
0575     }
0576 
0577     if (has_atpx && vga_count == 2) {
0578         acpi_get_name(radeon_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer);
0579         pr_info("vga_switcheroo: detected switching method %s handle\n",
0580             acpi_method_name);
0581         radeon_atpx_priv.atpx_detected = true;
0582         radeon_atpx_priv.bridge_pm_usable = d3_supported;
0583         radeon_atpx_init();
0584         return true;
0585     }
0586     return false;
0587 }
0588 
0589 /**
0590  * radeon_register_atpx_handler - register with vga_switcheroo
0591  *
0592  * Register the PX callbacks with vga_switcheroo (all asics).
0593  */
0594 void radeon_register_atpx_handler(void)
0595 {
0596     bool r;
0597     enum vga_switcheroo_handler_flags_t handler_flags = 0;
0598 
0599     /* detect if we have any ATPX + 2 VGA in the system */
0600     r = radeon_atpx_detect();
0601     if (!r)
0602         return;
0603 
0604     vga_switcheroo_register_handler(&radeon_atpx_handler, handler_flags);
0605 }
0606 
0607 /**
0608  * radeon_unregister_atpx_handler - unregister with vga_switcheroo
0609  *
0610  * Unregister the PX callbacks with vga_switcheroo (all asics).
0611  */
0612 void radeon_unregister_atpx_handler(void)
0613 {
0614     vga_switcheroo_unregister_handler();
0615 }
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