drm/radeon/radeon_agp.c

0001 /*
0002  * Copyright 2008 Red Hat Inc.
0003  * Copyright 2009 Jerome Glisse.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining a
0006  * copy of this software and associated documentation files (the "Software"),
0007  * to deal in the Software without restriction, including without limitation
0008  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0009  * and/or sell copies of the Software, and to permit persons to whom the
0010  * Software is furnished to do so, subject to the following conditions:
0011  *
0012  * The above copyright notice and this permission notice shall be included in
0013  * all copies or substantial portions of the Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0019  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0020  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0021  * OTHER DEALINGS IN THE SOFTWARE.
0022  *
0023  * Authors:
0024  *    Dave Airlie
0025  *    Jerome Glisse <glisse@freedesktop.org>
0026  */
0027
0028 #include <linux/pci.h>
0029
0030 #include <drm/drm_device.h>
0031 #include <drm/radeon_drm.h>
0032
0033 #include "radeon.h"
0034
0035 #if IS_ENABLED(CONFIG_AGP)
0036
0037 struct radeon_agpmode_quirk {
0038     u32 hostbridge_vendor;
0039     u32 hostbridge_device;
0040     u32 chip_vendor;
0041     u32 chip_device;
0042     u32 subsys_vendor;
0043     u32 subsys_device;
0044     u32 default_mode;
0045 };
0046
0047 static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
0048     /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
0049     { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
0050     /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
0051     { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
0052     /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV280 [Radeon 9200 SE] Needs AGPMode 4 (lp #300304) */
0053     { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x5964,
0054         0x148c, 0x2073, 4},
0055     /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
0056     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c59,
0057         PCI_VENDOR_ID_IBM, 0x052f, 1},
0058     /* Intel 82855PM host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #195051) */
0059     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e50,
0060         PCI_VENDOR_ID_IBM, 0x0550, 1},
0061     /* Intel 82855PM host bridge / RV250/M9 GL [Mobility FireGL 9000/Radeon 9000] needs AGPMode 1 (Thinkpad T40p) */
0062     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
0063         PCI_VENDOR_ID_IBM, 0x054d, 1},
0064     /* Intel 82855PM host bridge / Mobility M7 needs AGPMode 1 */
0065     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c57,
0066         PCI_VENDOR_ID_IBM, 0x0530, 1},
0067     /* Intel 82855PM host bridge / FireGL Mobility T2 RV350 Needs AGPMode 2 (fdo #20647) */
0068     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4e54,
0069         PCI_VENDOR_ID_IBM, 0x054f, 2},
0070     /* Intel 82855PM host bridge / Mobility M9+ / VaioPCG-V505DX Needs AGPMode 2 (fdo #17928) */
0071     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
0072         PCI_VENDOR_ID_SONY, 0x816b, 2},
0073     /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */
0074     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x5c61,
0075         PCI_VENDOR_ID_SONY, 0x8195, 8},
0076     /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
0077     { PCI_VENDOR_ID_INTEL, 0x3575, PCI_VENDOR_ID_ATI, 0x4c59,
0078         PCI_VENDOR_ID_DELL, 0x00e3, 2},
0079     /* Intel 82852/82855 host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 (lp #296617) */
0080     { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4c66,
0081         PCI_VENDOR_ID_DELL, 0x0149, 1},
0082     /* Intel 82855PM host bridge / Mobility FireGL 9000 RV250 Needs AGPMode 1 for suspend/resume */
0083     { PCI_VENDOR_ID_INTEL, 0x3340, PCI_VENDOR_ID_ATI, 0x4c66,
0084         PCI_VENDOR_ID_IBM, 0x0531, 1},
0085     /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
0086     { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0087         0x1025, 0x0061, 1},
0088     /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #203007) */
0089     { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0090         0x1025, 0x0064, 1},
0091     /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (lp #141551) */
0092     { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0093         PCI_VENDOR_ID_ASUSTEK, 0x1942, 1},
0094     /* Intel 82852/82855 host bridge / Mobility 9600/9700 Needs AGPMode 1 (deb #510208) */
0095     { PCI_VENDOR_ID_INTEL, 0x3580, PCI_VENDOR_ID_ATI, 0x4e50,
0096         0x10cf, 0x127f, 1},
0097     /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (lp #133192) */
0098     { 0x1849, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
0099         0x1787, 0x5960, 4},
0100     /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
0101     { PCI_VENDOR_ID_VIA, 0x0204, PCI_VENDOR_ID_ATI, 0x5960,
0102         0x17af, 0x2020, 4},
0103     /* VIA KT880 Host Bridge / RV350 [Radeon 9550] Needs AGPMode 4 (fdo #19981) */
0104     { PCI_VENDOR_ID_VIA, 0x0269, PCI_VENDOR_ID_ATI, 0x4153,
0105         PCI_VENDOR_ID_ASUSTEK, 0x003c, 4},
0106     /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
0107     { PCI_VENDOR_ID_VIA, 0x0305, PCI_VENDOR_ID_ATI, 0x514c,
0108         PCI_VENDOR_ID_ATI, 0x013a, 2},
0109     /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 (deb #515512) */
0110     { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
0111         PCI_VENDOR_ID_ASUSTEK, 0x004c, 2},
0112     /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
0113     { PCI_VENDOR_ID_VIA, 0x0691, PCI_VENDOR_ID_ATI, 0x5960,
0114         PCI_VENDOR_ID_ASUSTEK, 0x0054, 2},
0115     /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
0116     { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x514d,
0117         0x174b, 0x7149, 4},
0118     /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
0119     { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5960,
0120         0x1462, 0x0380, 4},
0121     /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
0122     { PCI_VENDOR_ID_VIA, 0x3189, PCI_VENDOR_ID_ATI, 0x5964,
0123         0x148c, 0x2073, 4},
0124     /* ATI Host Bridge / RV280 [M9+] Needs AGPMode 1 (phoronix forum) */
0125     { PCI_VENDOR_ID_ATI, 0xcbb2, PCI_VENDOR_ID_ATI, 0x5c61,
0126         PCI_VENDOR_ID_SONY, 0x8175, 1},
0127     { 0, 0, 0, 0, 0, 0, 0 },
0128 };
0129
0130 struct radeon_agp_head *radeon_agp_head_init(struct drm_device *dev)
0131 {
0132     struct pci_dev *pdev = to_pci_dev(dev->dev);
0133     struct radeon_agp_head *head = NULL;
0134
0135     head = kzalloc(sizeof(*head), GFP_KERNEL);
0136     if (!head)
0137         return NULL;
0138     head->bridge = agp_find_bridge(pdev);
0139     if (!head->bridge) {
0140         head->bridge = agp_backend_acquire(pdev);
0141         if (!head->bridge) {
0142             kfree(head);
0143             return NULL;
0144         }
0145         agp_copy_info(head->bridge, &head->agp_info);
0146         agp_backend_release(head->bridge);
0147     } else {
0148         agp_copy_info(head->bridge, &head->agp_info);
0149     }
0150     if (head->agp_info.chipset == NOT_SUPPORTED) {
0151         kfree(head);
0152         return NULL;
0153     }
0154     INIT_LIST_HEAD(&head->memory);
0155     head->cant_use_aperture = head->agp_info.cant_use_aperture;
0156     head->page_mask = head->agp_info.page_mask;
0157     head->base = head->agp_info.aper_base;
0158
0159     return head;
0160 }
0161
0162 static int radeon_agp_head_acquire(struct radeon_device *rdev)
0163 {
0164     struct drm_device *dev = rdev->ddev;
0165     struct pci_dev *pdev = to_pci_dev(dev->dev);
0166
0167     if (!rdev->agp)
0168         return -ENODEV;
0169     if (rdev->agp->acquired)
0170         return -EBUSY;
0171     rdev->agp->bridge = agp_backend_acquire(pdev);
0172     if (!rdev->agp->bridge)
0173         return -ENODEV;
0174     rdev->agp->acquired = 1;
0175     return 0;
0176 }
0177
0178 static int radeon_agp_head_release(struct radeon_device *rdev)
0179 {
0180     if (!rdev->agp || !rdev->agp->acquired)
0181         return -EINVAL;
0182     agp_backend_release(rdev->agp->bridge);
0183     rdev->agp->acquired = 0;
0184     return 0;
0185 }
0186
0187 static int radeon_agp_head_enable(struct radeon_device *rdev, struct radeon_agp_mode mode)
0188 {
0189     if (!rdev->agp || !rdev->agp->acquired)
0190         return -EINVAL;
0191
0192     rdev->agp->mode = mode.mode;
0193     agp_enable(rdev->agp->bridge, mode.mode);
0194     rdev->agp->enabled = 1;
0195     return 0;
0196 }
0197
0198 static int radeon_agp_head_info(struct radeon_device *rdev, struct radeon_agp_info *info)
0199 {
0200     struct agp_kern_info *kern;
0201
0202     if (!rdev->agp || !rdev->agp->acquired)
0203         return -EINVAL;
0204
0205     kern = &rdev->agp->agp_info;
0206     info->agp_version_major = kern->version.major;
0207     info->agp_version_minor = kern->version.minor;
0208     info->mode = kern->mode;
0209     info->aperture_base = kern->aper_base;
0210     info->aperture_size = kern->aper_size * 1024 * 1024;
0211     info->memory_allowed = kern->max_memory << PAGE_SHIFT;
0212     info->memory_used = kern->current_memory << PAGE_SHIFT;
0213     info->id_vendor = kern->device->vendor;
0214     info->id_device = kern->device->device;
0215
0216     return 0;
0217 }
0218 #endif
0219
0220 int radeon_agp_init(struct radeon_device *rdev)
0221 {
0222 #if IS_ENABLED(CONFIG_AGP)
0223     struct radeon_agpmode_quirk *p = radeon_agpmode_quirk_list;
0224     struct radeon_agp_mode mode;
0225     struct radeon_agp_info info;
0226     uint32_t agp_status;
0227     int default_mode;
0228     bool is_v3;
0229     int ret;
0230
0231     /* Acquire AGP. */
0232     ret = radeon_agp_head_acquire(rdev);
0233     if (ret) {
0234         DRM_ERROR("Unable to acquire AGP: %d\n", ret);
0235         return ret;
0236     }
0237
0238     ret = radeon_agp_head_info(rdev, &info);
0239     if (ret) {
0240         radeon_agp_head_release(rdev);
0241         DRM_ERROR("Unable to get AGP info: %d\n", ret);
0242         return ret;
0243     }
0244
0245     if (rdev->agp->agp_info.aper_size < 32) {
0246         radeon_agp_head_release(rdev);
0247         dev_warn(rdev->dev, "AGP aperture too small (%zuM) "
0248             "need at least 32M, disabling AGP\n",
0249             rdev->agp->agp_info.aper_size);
0250         return -EINVAL;
0251     }
0252
0253     mode.mode = info.mode;
0254     /* chips with the agp to pcie bridge don't have the AGP_STATUS register
0255      * Just use the whatever mode the host sets up.
0256      */
0257     if (rdev->family <= CHIP_RV350)
0258         agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
0259     else
0260         agp_status = mode.mode;
0261     is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
0262
0263     if (is_v3) {
0264         default_mode = (agp_status & RADEON_AGPv3_8X_MODE) ? 8 : 4;
0265     } else {
0266         if (agp_status & RADEON_AGP_4X_MODE) {
0267             default_mode = 4;
0268         } else if (agp_status & RADEON_AGP_2X_MODE) {
0269             default_mode = 2;
0270         } else {
0271             default_mode = 1;
0272         }
0273     }
0274
0275     /* Apply AGPMode Quirks */
0276     while (p && p->chip_device != 0) {
0277         if (info.id_vendor == p->hostbridge_vendor &&
0278             info.id_device == p->hostbridge_device &&
0279             rdev->pdev->vendor == p->chip_vendor &&
0280             rdev->pdev->device == p->chip_device &&
0281             rdev->pdev->subsystem_vendor == p->subsys_vendor &&
0282             rdev->pdev->subsystem_device == p->subsys_device) {
0283             default_mode = p->default_mode;
0284         }
0285         ++p;
0286     }
0287
0288     if (radeon_agpmode > 0) {
0289         if ((radeon_agpmode < (is_v3 ? 4 : 1)) ||
0290             (radeon_agpmode > (is_v3 ? 8 : 4)) ||
0291             (radeon_agpmode & (radeon_agpmode - 1))) {
0292             DRM_ERROR("Illegal AGP Mode: %d (valid %s), leaving at %d\n",
0293                   radeon_agpmode, is_v3 ? "4, 8" : "1, 2, 4",
0294                   default_mode);
0295             radeon_agpmode = default_mode;
0296         } else {
0297             DRM_INFO("AGP mode requested: %d\n", radeon_agpmode);
0298         }
0299     } else {
0300         radeon_agpmode = default_mode;
0301     }
0302
0303     mode.mode &= ~RADEON_AGP_MODE_MASK;
0304     if (is_v3) {
0305         switch (radeon_agpmode) {
0306         case 8:
0307             mode.mode |= RADEON_AGPv3_8X_MODE;
0308             break;
0309         case 4:
0310         default:
0311             mode.mode |= RADEON_AGPv3_4X_MODE;
0312             break;
0313         }
0314     } else {
0315         switch (radeon_agpmode) {
0316         case 4:
0317             mode.mode |= RADEON_AGP_4X_MODE;
0318             break;
0319         case 2:
0320             mode.mode |= RADEON_AGP_2X_MODE;
0321             break;
0322         case 1:
0323         default:
0324             mode.mode |= RADEON_AGP_1X_MODE;
0325             break;
0326         }
0327     }
0328
0329     mode.mode &= ~RADEON_AGP_FW_MODE; /* disable fw */
0330     ret = radeon_agp_head_enable(rdev, mode);
0331     if (ret) {
0332         DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
0333         radeon_agp_head_release(rdev);
0334         return ret;
0335     }
0336
0337     rdev->mc.agp_base = rdev->agp->agp_info.aper_base;
0338     rdev->mc.gtt_size = rdev->agp->agp_info.aper_size << 20;
0339     rdev->mc.gtt_start = rdev->mc.agp_base;
0340     rdev->mc.gtt_end = rdev->mc.gtt_start + rdev->mc.gtt_size - 1;
0341     dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
0342         rdev->mc.gtt_size >> 20, rdev->mc.gtt_start, rdev->mc.gtt_end);
0343
0344     /* workaround some hw issues */
0345     if (rdev->family < CHIP_R200) {
0346         WREG32(RADEON_AGP_CNTL, RREG32(RADEON_AGP_CNTL) | 0x000e0000);
0347     }
0348     return 0;
0349 #else
0350     return 0;
0351 #endif
0352 }
0353
0354 void radeon_agp_resume(struct radeon_device *rdev)
0355 {
0356 #if IS_ENABLED(CONFIG_AGP)
0357     int r;
0358     if (rdev->flags & RADEON_IS_AGP) {
0359         r = radeon_agp_init(rdev);
0360         if (r)
0361             dev_warn(rdev->dev, "radeon AGP reinit failed\n");
0362     }
0363 #endif
0364 }
0365
0366 void radeon_agp_fini(struct radeon_device *rdev)
0367 {
0368 #if IS_ENABLED(CONFIG_AGP)
0369     if (rdev->agp && rdev->agp->acquired) {
0370         radeon_agp_head_release(rdev);
0371     }
0372 #endif
0373 }
0374
0375 void radeon_agp_suspend(struct radeon_device *rdev)
0376 {
0377     radeon_agp_fini(rdev);
0378 }