drm/radeon/evergreen_blit_shaders.h

0001 /*
0002  * Copyright 2009 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice (including the next
0012  * paragraph) shall be included in all copies or substantial portions of the
0013  * Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
0019  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0020  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
0021  * DEALINGS IN THE SOFTWARE.
0022  *
0023  * Authors:
0024  *     Alex Deucher <alexander.deucher@amd.com>
0025  */
0026
0027 #ifndef EVERGREEN_BLIT_SHADERS_H
0028 #define EVERGREEN_BLIT_SHADERS_H
0029
0030 /*
0031  * evergreen cards need to use the 3D engine to blit data which requires
0032  * quite a bit of hw state setup.  Rather than pull the whole 3D driver
0033  * (which normally generates the 3D state) into the DRM, we opt to use
0034  * statically generated state tables.  The register state and shaders
0035  * were hand generated to support blitting functionality.  See the 3D
0036  * driver or documentation for descriptions of the registers and
0037  * shader instructions.
0038  */
0039
0040 static const u32 evergreen_default_state[] = {
0041     0xc0016900,
0042     0x0000023b,
0043     0x00000000, /* SQ_LDS_ALLOC_PS */
0044
0045     0xc0066900,
0046     0x00000240,
0047     0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
0048     0x00000000,
0049     0x00000000,
0050     0x00000000,
0051     0x00000000,
0052     0x00000000,
0053
0054     0xc0046900,
0055     0x00000247,
0056     0x00000000, /* SQ_GS_VERT_ITEMSIZE */
0057     0x00000000,
0058     0x00000000,
0059     0x00000000,
0060
0061     0xc0026900,
0062     0x00000010,
0063     0x00000000, /* DB_Z_INFO */
0064     0x00000000, /* DB_STENCIL_INFO */
0065
0066     0xc0016900,
0067     0x00000200,
0068     0x00000000, /* DB_DEPTH_CONTROL */
0069
0070     0xc0066900,
0071     0x00000000,
0072     0x00000060, /* DB_RENDER_CONTROL */
0073     0x00000000, /* DB_COUNT_CONTROL */
0074     0x00000000, /* DB_DEPTH_VIEW */
0075     0x0000002a, /* DB_RENDER_OVERRIDE */
0076     0x00000000, /* DB_RENDER_OVERRIDE2 */
0077     0x00000000, /* DB_HTILE_DATA_BASE */
0078
0079     0xc0026900,
0080     0x0000000a,
0081     0x00000000, /* DB_STENCIL_CLEAR */
0082     0x00000000, /* DB_DEPTH_CLEAR */
0083
0084     0xc0016900,
0085     0x000002dc,
0086     0x0000aa00, /* DB_ALPHA_TO_MASK */
0087
0088     0xc0016900,
0089     0x00000080,
0090     0x00000000, /* PA_SC_WINDOW_OFFSET */
0091
0092     0xc00d6900,
0093     0x00000083,
0094     0x0000ffff, /* PA_SC_CLIPRECT_RULE */
0095     0x00000000, /* PA_SC_CLIPRECT_0_TL */
0096     0x20002000, /* PA_SC_CLIPRECT_0_BR */
0097     0x00000000,
0098     0x20002000,
0099     0x00000000,
0100     0x20002000,
0101     0x00000000,
0102     0x20002000,
0103     0xaaaaaaaa, /* PA_SC_EDGERULE */
0104     0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
0105     0x0000000f, /* CB_TARGET_MASK */
0106     0x0000000f, /* CB_SHADER_MASK */
0107
0108     0xc0226900,
0109     0x00000094,
0110     0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
0111     0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
0112     0x80000000,
0113     0x20002000,
0114     0x80000000,
0115     0x20002000,
0116     0x80000000,
0117     0x20002000,
0118     0x80000000,
0119     0x20002000,
0120     0x80000000,
0121     0x20002000,
0122     0x80000000,
0123     0x20002000,
0124     0x80000000,
0125     0x20002000,
0126     0x80000000,
0127     0x20002000,
0128     0x80000000,
0129     0x20002000,
0130     0x80000000,
0131     0x20002000,
0132     0x80000000,
0133     0x20002000,
0134     0x80000000,
0135     0x20002000,
0136     0x80000000,
0137     0x20002000,
0138     0x80000000,
0139     0x20002000,
0140     0x80000000,
0141     0x20002000,
0142     0x00000000, /* PA_SC_VPORT_ZMIN_0 */
0143     0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
0144
0145     0xc0016900,
0146     0x000000d4,
0147     0x00000000, /* SX_MISC */
0148
0149     0xc0026900,
0150     0x00000292,
0151     0x00000000, /* PA_SC_MODE_CNTL_0 */
0152     0x00000000, /* PA_SC_MODE_CNTL_1 */
0153
0154     0xc0106900,
0155     0x00000300,
0156     0x00000000, /* PA_SC_LINE_CNTL */
0157     0x00000000, /* PA_SC_AA_CONFIG */
0158     0x00000005, /* PA_SU_VTX_CNTL */
0159     0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
0160     0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
0161     0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
0162     0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
0163     0x00000000, /* PA_SC_AA_SAMPLE_LOCS_0 */
0164     0x00000000, /*  */
0165     0x00000000, /*  */
0166     0x00000000, /*  */
0167     0x00000000, /*  */
0168     0x00000000, /*  */
0169     0x00000000, /*  */
0170     0x00000000, /* PA_SC_AA_SAMPLE_LOCS_7 */
0171     0xffffffff, /* PA_SC_AA_MASK */
0172
0173     0xc00d6900,
0174     0x00000202,
0175     0x00cc0010, /* CB_COLOR_CONTROL */
0176     0x00000210, /* DB_SHADER_CONTROL */
0177     0x00010000, /* PA_CL_CLIP_CNTL */
0178     0x00000004, /* PA_SU_SC_MODE_CNTL */
0179     0x00000100, /* PA_CL_VTE_CNTL */
0180     0x00000000, /* PA_CL_VS_OUT_CNTL */
0181     0x00000000, /* PA_CL_NANINF_CNTL */
0182     0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
0183     0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
0184     0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
0185     0x00000000, /*  */
0186     0x00000000, /*  */
0187     0x00000000, /* SQ_DYN_GPR_RESOURCE_LIMIT_1 */
0188
0189     0xc0066900,
0190     0x000002de,
0191     0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
0192     0x00000000, /*  */
0193     0x00000000, /*  */
0194     0x00000000, /*  */
0195     0x00000000, /*  */
0196     0x00000000, /*  */
0197
0198     0xc0016900,
0199     0x00000229,
0200     0x00000000, /* SQ_PGM_START_FS */
0201
0202     0xc0016900,
0203     0x0000022a,
0204     0x00000000, /* SQ_PGM_RESOURCES_FS */
0205
0206     0xc0096900,
0207     0x00000100,
0208     0x00ffffff, /* VGT_MAX_VTX_INDX */
0209     0x00000000, /*  */
0210     0x00000000, /*  */
0211     0x00000000, /*  */
0212     0x00000000, /* SX_ALPHA_TEST_CONTROL */
0213     0x00000000, /* CB_BLEND_RED */
0214     0x00000000, /* CB_BLEND_GREEN */
0215     0x00000000, /* CB_BLEND_BLUE */
0216     0x00000000, /* CB_BLEND_ALPHA */
0217
0218     0xc0026900,
0219     0x000002a8,
0220     0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
0221     0x00000000, /*  */
0222
0223     0xc0026900,
0224     0x000002ad,
0225     0x00000000, /* VGT_REUSE_OFF */
0226     0x00000000, /*  */
0227
0228     0xc0116900,
0229     0x00000280,
0230     0x00000000, /* PA_SU_POINT_SIZE */
0231     0x00000000, /* PA_SU_POINT_MINMAX */
0232     0x00000008, /* PA_SU_LINE_CNTL */
0233     0x00000000, /* PA_SC_LINE_STIPPLE */
0234     0x00000000, /* VGT_OUTPUT_PATH_CNTL */
0235     0x00000000, /* VGT_HOS_CNTL */
0236     0x00000000, /*  */
0237     0x00000000, /*  */
0238     0x00000000, /*  */
0239     0x00000000, /*  */
0240     0x00000000, /*  */
0241     0x00000000, /*  */
0242     0x00000000, /*  */
0243     0x00000000, /*  */
0244     0x00000000, /*  */
0245     0x00000000, /*  */
0246     0x00000000, /* VGT_GS_MODE */
0247
0248     0xc0016900,
0249     0x000002a1,
0250     0x00000000, /* VGT_PRIMITIVEID_EN */
0251
0252     0xc0016900,
0253     0x000002a5,
0254     0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
0255
0256     0xc0016900,
0257     0x000002d5,
0258     0x00000000, /* VGT_SHADER_STAGES_EN */
0259
0260     0xc0026900,
0261     0x000002e5,
0262     0x00000000, /* VGT_STRMOUT_CONFIG */
0263     0x00000000, /*  */
0264
0265     0xc0016900,
0266     0x000001e0,
0267     0x00000000, /* CB_BLEND0_CONTROL */
0268
0269     0xc0016900,
0270     0x000001b1,
0271     0x00000000, /* SPI_VS_OUT_CONFIG */
0272
0273     0xc0016900,
0274     0x00000187,
0275     0x00000000, /* SPI_VS_OUT_ID_0 */
0276
0277     0xc0016900,
0278     0x00000191,
0279     0x00000100, /* SPI_PS_INPUT_CNTL_0 */
0280
0281     0xc00b6900,
0282     0x000001b3,
0283     0x20000001, /* SPI_PS_IN_CONTROL_0 */
0284     0x00000000, /* SPI_PS_IN_CONTROL_1 */
0285     0x00000000, /* SPI_INTERP_CONTROL_0 */
0286     0x00000000, /* SPI_INPUT_Z */
0287     0x00000000, /* SPI_FOG_CNTL */
0288     0x00100000, /* SPI_BARYC_CNTL */
0289     0x00000000, /* SPI_PS_IN_CONTROL_2 */
0290     0x00000000, /*  */
0291     0x00000000, /*  */
0292     0x00000000, /*  */
0293     0x00000000, /*  */
0294
0295     0xc0026900,
0296     0x00000316,
0297     0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
0298     0x00000010, /*  */
0299 };
0300
0301 static const u32 evergreen_default_size = ARRAY_SIZE(evergreen_default_state);
0302
0303 #endif