drm/radeon/btc_dpm.h

0001 /*
0002  * Copyright 2011 Advanced Micro Devices, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  */
0023 #ifndef __BTC_DPM_H__
0024 #define __BTC_DPM_H__
0025
0026 #include "radeon.h"
0027 #include "rv770_dpm.h"
0028
0029 #define BTC_RLP_UVD_DFLT                              20
0030 #define BTC_RMP_UVD_DFLT                              50
0031 #define BTC_LHP_UVD_DFLT                              50
0032 #define BTC_LMP_UVD_DFLT                              20
0033 #define BARTS_MGCGCGTSSMCTRL_DFLT                     0x81944000
0034 #define TURKS_MGCGCGTSSMCTRL_DFLT                     0x6e944000
0035 #define CAICOS_MGCGCGTSSMCTRL_DFLT                    0x46944040
0036 #define BTC_CGULVPARAMETER_DFLT                       0x00040035
0037 #define BTC_CGULVCONTROL_DFLT                         0x00001450
0038
0039 extern u32 btc_valid_sclk[40];
0040
0041 void btc_read_arb_registers(struct radeon_device *rdev);
0042 void btc_program_mgcg_hw_sequence(struct radeon_device *rdev,
0043                   const u32 *sequence, u32 count);
0044 void btc_skip_blacklist_clocks(struct radeon_device *rdev,
0045                    const u32 max_sclk, const u32 max_mclk,
0046                    u32 *sclk, u32 *mclk);
0047 void btc_adjust_clock_combinations(struct radeon_device *rdev,
0048                    const struct radeon_clock_and_voltage_limits *max_limits,
0049                    struct rv7xx_pl *pl);
0050 void btc_apply_voltage_dependency_rules(struct radeon_clock_voltage_dependency_table *table,
0051                     u32 clock, u16 max_voltage, u16 *voltage);
0052 void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
0053                              u32 *max_clock);
0054 void btc_apply_voltage_delta_rules(struct radeon_device *rdev,
0055                    u16 max_vddc, u16 max_vddci,
0056                    u16 *vddc, u16 *vddci);
0057 bool btc_dpm_enabled(struct radeon_device *rdev);
0058 int btc_reset_to_default(struct radeon_device *rdev);
0059 void btc_notify_uvd_to_smc(struct radeon_device *rdev,
0060                struct radeon_ps *radeon_new_state);
0061
0062 #endif