drm/qxl/qxl_release.c

0001 /*
0002  * Copyright 2011 Red Hat, Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * on the rights to use, copy, modify, merge, publish, distribute, sub
0008  * license, and/or sell copies of the Software, and to permit persons to whom
0009  * the Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice (including the next
0012  * paragraph) shall be included in all copies or substantial portions of the
0013  * Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.  IN NO EVENT SHALL
0018  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
0019  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0020  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0021  */
0022
0023 #include <linux/delay.h>
0024
0025 #include <trace/events/dma_fence.h>
0026
0027 #include "qxl_drv.h"
0028 #include "qxl_object.h"
0029
0030 /*
0031  * drawable cmd cache - allocate a bunch of VRAM pages, suballocate
0032  * into 256 byte chunks for now - gives 16 cmds per page.
0033  *
0034  * use an ida to index into the chunks?
0035  */
0036 /* manage releaseables */
0037 /* stack them 16 high for now -drawable object is 191 */
0038 #define RELEASE_SIZE 256
0039 #define RELEASES_PER_BO (PAGE_SIZE / RELEASE_SIZE)
0040 /* put an alloc/dealloc surface cmd into one bo and round up to 128 */
0041 #define SURFACE_RELEASE_SIZE 128
0042 #define SURFACE_RELEASES_PER_BO (PAGE_SIZE / SURFACE_RELEASE_SIZE)
0043
0044 static const int release_size_per_bo[] = { RELEASE_SIZE, SURFACE_RELEASE_SIZE, RELEASE_SIZE };
0045 static const int releases_per_bo[] = { RELEASES_PER_BO, SURFACE_RELEASES_PER_BO, RELEASES_PER_BO };
0046
0047 static const char *qxl_get_driver_name(struct dma_fence *fence)
0048 {
0049     return "qxl";
0050 }
0051
0052 static const char *qxl_get_timeline_name(struct dma_fence *fence)
0053 {
0054     return "release";
0055 }
0056
0057 static long qxl_fence_wait(struct dma_fence *fence, bool intr,
0058                signed long timeout)
0059 {
0060     struct qxl_device *qdev;
0061     unsigned long cur, end = jiffies + timeout;
0062
0063     qdev = container_of(fence->lock, struct qxl_device, release_lock);
0064
0065     if (!wait_event_timeout(qdev->release_event,
0066                 (dma_fence_is_signaled(fence) ||
0067                  (qxl_io_notify_oom(qdev), 0)),
0068                 timeout))
0069         return 0;
0070
0071     cur = jiffies;
0072     if (time_after(cur, end))
0073         return 0;
0074     return end - cur;
0075 }
0076
0077 static const struct dma_fence_ops qxl_fence_ops = {
0078     .get_driver_name = qxl_get_driver_name,
0079     .get_timeline_name = qxl_get_timeline_name,
0080     .wait = qxl_fence_wait,
0081 };
0082
0083 static int
0084 qxl_release_alloc(struct qxl_device *qdev, int type,
0085           struct qxl_release **ret)
0086 {
0087     struct qxl_release *release;
0088     int handle;
0089     size_t size = sizeof(*release);
0090
0091     release = kmalloc(size, GFP_KERNEL);
0092     if (!release) {
0093         DRM_ERROR("Out of memory\n");
0094         return -ENOMEM;
0095     }
0096     release->base.ops = NULL;
0097     release->type = type;
0098     release->release_offset = 0;
0099     release->surface_release_id = 0;
0100     INIT_LIST_HEAD(&release->bos);
0101
0102     idr_preload(GFP_KERNEL);
0103     spin_lock(&qdev->release_idr_lock);
0104     handle = idr_alloc(&qdev->release_idr, release, 1, 0, GFP_NOWAIT);
0105     release->base.seqno = ++qdev->release_seqno;
0106     spin_unlock(&qdev->release_idr_lock);
0107     idr_preload_end();
0108     if (handle < 0) {
0109         kfree(release);
0110         *ret = NULL;
0111         return handle;
0112     }
0113     *ret = release;
0114     DRM_DEBUG_DRIVER("allocated release %d\n", handle);
0115     release->id = handle;
0116     return handle;
0117 }
0118
0119 static void
0120 qxl_release_free_list(struct qxl_release *release)
0121 {
0122     while (!list_empty(&release->bos)) {
0123         struct qxl_bo_list *entry;
0124         struct qxl_bo *bo;
0125
0126         entry = container_of(release->bos.next,
0127                      struct qxl_bo_list, tv.head);
0128         bo = to_qxl_bo(entry->tv.bo);
0129         qxl_bo_unref(&bo);
0130         list_del(&entry->tv.head);
0131         kfree(entry);
0132     }
0133     release->release_bo = NULL;
0134 }
0135
0136 void
0137 qxl_release_free(struct qxl_device *qdev,
0138          struct qxl_release *release)
0139 {
0140     DRM_DEBUG_DRIVER("release %d, type %d\n", release->id, release->type);
0141
0142     if (release->surface_release_id)
0143         qxl_surface_id_dealloc(qdev, release->surface_release_id);
0144
0145     spin_lock(&qdev->release_idr_lock);
0146     idr_remove(&qdev->release_idr, release->id);
0147     spin_unlock(&qdev->release_idr_lock);
0148
0149     if (release->base.ops) {
0150         WARN_ON(list_empty(&release->bos));
0151         qxl_release_free_list(release);
0152
0153         dma_fence_signal(&release->base);
0154         dma_fence_put(&release->base);
0155     } else {
0156         qxl_release_free_list(release);
0157         kfree(release);
0158     }
0159     atomic_dec(&qdev->release_count);
0160 }
0161
0162 static int qxl_release_bo_alloc(struct qxl_device *qdev,
0163                 struct qxl_bo **bo,
0164                 u32 priority)
0165 {
0166     /* pin releases bo's they are too messy to evict */
0167     return qxl_bo_create(qdev, PAGE_SIZE, false, true,
0168                  QXL_GEM_DOMAIN_VRAM, priority, NULL, bo);
0169 }
0170
0171 int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)
0172 {
0173     struct qxl_bo_list *entry;
0174
0175     list_for_each_entry(entry, &release->bos, tv.head) {
0176         if (entry->tv.bo == &bo->tbo)
0177             return 0;
0178     }
0179
0180     entry = kmalloc(sizeof(struct qxl_bo_list), GFP_KERNEL);
0181     if (!entry)
0182         return -ENOMEM;
0183
0184     qxl_bo_ref(bo);
0185     entry->tv.bo = &bo->tbo;
0186     entry->tv.num_shared = 0;
0187     list_add_tail(&entry->tv.head, &release->bos);
0188     return 0;
0189 }
0190
0191 static int qxl_release_validate_bo(struct qxl_bo *bo)
0192 {
0193     struct ttm_operation_ctx ctx = { true, false };
0194     int ret;
0195
0196     if (!bo->tbo.pin_count) {
0197         qxl_ttm_placement_from_domain(bo, bo->type);
0198         ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
0199         if (ret)
0200             return ret;
0201     }
0202
0203     ret = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
0204     if (ret)
0205         return ret;
0206
0207     /* allocate a surface for reserved + validated buffers */
0208     ret = qxl_bo_check_id(to_qxl(bo->tbo.base.dev), bo);
0209     if (ret)
0210         return ret;
0211     return 0;
0212 }
0213
0214 int qxl_release_reserve_list(struct qxl_release *release, bool no_intr)
0215 {
0216     int ret;
0217     struct qxl_bo_list *entry;
0218
0219     /* if only one object on the release its the release itself
0220        since these objects are pinned no need to reserve */
0221     if (list_is_singular(&release->bos))
0222         return 0;
0223
0224     ret = ttm_eu_reserve_buffers(&release->ticket, &release->bos,
0225                      !no_intr, NULL);
0226     if (ret)
0227         return ret;
0228
0229     list_for_each_entry(entry, &release->bos, tv.head) {
0230         struct qxl_bo *bo = to_qxl_bo(entry->tv.bo);
0231
0232         ret = qxl_release_validate_bo(bo);
0233         if (ret) {
0234             ttm_eu_backoff_reservation(&release->ticket, &release->bos);
0235             return ret;
0236         }
0237     }
0238     return 0;
0239 }
0240
0241 void qxl_release_backoff_reserve_list(struct qxl_release *release)
0242 {
0243     /* if only one object on the release its the release itself
0244        since these objects are pinned no need to reserve */
0245     if (list_is_singular(&release->bos))
0246         return;
0247
0248     ttm_eu_backoff_reservation(&release->ticket, &release->bos);
0249 }
0250
0251 int qxl_alloc_surface_release_reserved(struct qxl_device *qdev,
0252                        enum qxl_surface_cmd_type surface_cmd_type,
0253                        struct qxl_release *create_rel,
0254                        struct qxl_release **release)
0255 {
0256     if (surface_cmd_type == QXL_SURFACE_CMD_DESTROY && create_rel) {
0257         int idr_ret;
0258         struct qxl_bo *bo;
0259         union qxl_release_info *info;
0260
0261         /* stash the release after the create command */
0262         idr_ret = qxl_release_alloc(qdev, QXL_RELEASE_SURFACE_CMD, release);
0263         if (idr_ret < 0)
0264             return idr_ret;
0265         bo = create_rel->release_bo;
0266
0267         (*release)->release_bo = bo;
0268         (*release)->release_offset = create_rel->release_offset + 64;
0269
0270         qxl_release_list_add(*release, bo);
0271
0272         info = qxl_release_map(qdev, *release);
0273         info->id = idr_ret;
0274         qxl_release_unmap(qdev, *release, info);
0275         return 0;
0276     }
0277
0278     return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_surface_cmd),
0279                      QXL_RELEASE_SURFACE_CMD, release, NULL);
0280 }
0281
0282 int qxl_alloc_release_reserved(struct qxl_device *qdev, unsigned long size,
0283                        int type, struct qxl_release **release,
0284                        struct qxl_bo **rbo)
0285 {
0286     struct qxl_bo *bo, *free_bo = NULL;
0287     int idr_ret;
0288     int ret = 0;
0289     union qxl_release_info *info;
0290     int cur_idx;
0291     u32 priority;
0292
0293     if (type == QXL_RELEASE_DRAWABLE) {
0294         cur_idx = 0;
0295         priority = 0;
0296     } else if (type == QXL_RELEASE_SURFACE_CMD) {
0297         cur_idx = 1;
0298         priority = 1;
0299     } else if (type == QXL_RELEASE_CURSOR_CMD) {
0300         cur_idx = 2;
0301         priority = 1;
0302     }
0303     else {
0304         DRM_ERROR("got illegal type: %d\n", type);
0305         return -EINVAL;
0306     }
0307
0308     idr_ret = qxl_release_alloc(qdev, type, release);
0309     if (idr_ret < 0) {
0310         if (rbo)
0311             *rbo = NULL;
0312         return idr_ret;
0313     }
0314     atomic_inc(&qdev->release_count);
0315
0316     mutex_lock(&qdev->release_mutex);
0317     if (qdev->current_release_bo_offset[cur_idx] + 1 >= releases_per_bo[cur_idx]) {
0318         free_bo = qdev->current_release_bo[cur_idx];
0319         qdev->current_release_bo_offset[cur_idx] = 0;
0320         qdev->current_release_bo[cur_idx] = NULL;
0321     }
0322     if (!qdev->current_release_bo[cur_idx]) {
0323         ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx], priority);
0324         if (ret) {
0325             mutex_unlock(&qdev->release_mutex);
0326             if (free_bo) {
0327                 qxl_bo_unpin(free_bo);
0328                 qxl_bo_unref(&free_bo);
0329             }
0330             qxl_release_free(qdev, *release);
0331             return ret;
0332         }
0333     }
0334
0335     bo = qxl_bo_ref(qdev->current_release_bo[cur_idx]);
0336
0337     (*release)->release_bo = bo;
0338     (*release)->release_offset = qdev->current_release_bo_offset[cur_idx] * release_size_per_bo[cur_idx];
0339     qdev->current_release_bo_offset[cur_idx]++;
0340
0341     if (rbo)
0342         *rbo = bo;
0343
0344     mutex_unlock(&qdev->release_mutex);
0345     if (free_bo) {
0346         qxl_bo_unpin(free_bo);
0347         qxl_bo_unref(&free_bo);
0348     }
0349
0350     ret = qxl_release_list_add(*release, bo);
0351     qxl_bo_unref(&bo);
0352     if (ret) {
0353         qxl_release_free(qdev, *release);
0354         return ret;
0355     }
0356
0357     info = qxl_release_map(qdev, *release);
0358     info->id = idr_ret;
0359     qxl_release_unmap(qdev, *release, info);
0360
0361     return ret;
0362 }
0363
0364 struct qxl_release *qxl_release_from_id_locked(struct qxl_device *qdev,
0365                            uint64_t id)
0366 {
0367     struct qxl_release *release;
0368
0369     spin_lock(&qdev->release_idr_lock);
0370     release = idr_find(&qdev->release_idr, id);
0371     spin_unlock(&qdev->release_idr_lock);
0372     if (!release) {
0373         DRM_ERROR("failed to find id in release_idr\n");
0374         return NULL;
0375     }
0376
0377     return release;
0378 }
0379
0380 union qxl_release_info *qxl_release_map(struct qxl_device *qdev,
0381                     struct qxl_release *release)
0382 {
0383     void *ptr;
0384     union qxl_release_info *info;
0385     struct qxl_bo *bo = release->release_bo;
0386
0387     ptr = qxl_bo_kmap_atomic_page(qdev, bo, release->release_offset & PAGE_MASK);
0388     if (!ptr)
0389         return NULL;
0390     info = ptr + (release->release_offset & ~PAGE_MASK);
0391     return info;
0392 }
0393
0394 void qxl_release_unmap(struct qxl_device *qdev,
0395                struct qxl_release *release,
0396                union qxl_release_info *info)
0397 {
0398     struct qxl_bo *bo = release->release_bo;
0399     void *ptr;
0400
0401     ptr = ((void *)info) - (release->release_offset & ~PAGE_MASK);
0402     qxl_bo_kunmap_atomic_page(qdev, bo, ptr);
0403 }
0404
0405 void qxl_release_fence_buffer_objects(struct qxl_release *release)
0406 {
0407     struct ttm_buffer_object *bo;
0408     struct ttm_device *bdev;
0409     struct ttm_validate_buffer *entry;
0410     struct qxl_device *qdev;
0411
0412     /* if only one object on the release its the release itself
0413        since these objects are pinned no need to reserve */
0414     if (list_is_singular(&release->bos) || list_empty(&release->bos))
0415         return;
0416
0417     bo = list_first_entry(&release->bos, struct ttm_validate_buffer, head)->bo;
0418     bdev = bo->bdev;
0419     qdev = container_of(bdev, struct qxl_device, mman.bdev);
0420
0421     /*
0422      * Since we never really allocated a context and we don't want to conflict,
0423      * set the highest bits. This will break if we really allow exporting of dma-bufs.
0424      */
0425     dma_fence_init(&release->base, &qxl_fence_ops, &qdev->release_lock,
0426                release->id | 0xf0000000, release->base.seqno);
0427     trace_dma_fence_emit(&release->base);
0428
0429     list_for_each_entry(entry, &release->bos, head) {
0430         bo = entry->bo;
0431
0432         dma_resv_add_fence(bo->base.resv, &release->base,
0433                    DMA_RESV_USAGE_READ);
0434         ttm_bo_move_to_lru_tail_unlocked(bo);
0435         dma_resv_unlock(bo->base.resv);
0436     }
0437     ww_acquire_fini(&release->ticket);
0438 }
0439