drm/qxl/qxl_kms.c

0001 /*
0002  * Copyright 2013 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Dave Airlie
0023  *          Alon Levy
0024  */
0025
0026 #include <linux/io-mapping.h>
0027 #include <linux/pci.h>
0028
0029 #include <drm/drm_drv.h>
0030 #include <drm/drm_managed.h>
0031 #include <drm/drm_probe_helper.h>
0032
0033 #include "qxl_drv.h"
0034 #include "qxl_object.h"
0035
0036 static bool qxl_check_device(struct qxl_device *qdev)
0037 {
0038     struct qxl_rom *rom = qdev->rom;
0039
0040     if (rom->magic != 0x4f525851) {
0041         DRM_ERROR("bad rom signature %x\n", rom->magic);
0042         return false;
0043     }
0044
0045     DRM_INFO("Device Version %d.%d\n", rom->id, rom->update_id);
0046     DRM_INFO("Compression level %d log level %d\n", rom->compression_level,
0047          rom->log_level);
0048     DRM_INFO("%d io pages at offset 0x%x\n",
0049          rom->num_io_pages, rom->pages_offset);
0050     DRM_INFO("%d byte draw area at offset 0x%x\n",
0051          rom->surface0_area_size, rom->draw_area_offset);
0052
0053     qdev->vram_size = rom->surface0_area_size;
0054     DRM_INFO("RAM header offset: 0x%x\n", rom->ram_header_offset);
0055     return true;
0056 }
0057
0058 static void setup_hw_slot(struct qxl_device *qdev, struct qxl_memslot *slot)
0059 {
0060     qdev->ram_header->mem_slot.mem_start = slot->start_phys_addr;
0061     qdev->ram_header->mem_slot.mem_end = slot->start_phys_addr + slot->size;
0062     qxl_io_memslot_add(qdev, qdev->rom->slots_start + slot->index);
0063 }
0064
0065 static void setup_slot(struct qxl_device *qdev,
0066                struct qxl_memslot *slot,
0067                unsigned int slot_index,
0068                const char *slot_name,
0069                unsigned long start_phys_addr,
0070                unsigned long size)
0071 {
0072     uint64_t high_bits;
0073
0074     slot->index = slot_index;
0075     slot->name = slot_name;
0076     slot->start_phys_addr = start_phys_addr;
0077     slot->size = size;
0078
0079     setup_hw_slot(qdev, slot);
0080
0081     slot->generation = qdev->rom->slot_generation;
0082     high_bits = (qdev->rom->slots_start + slot->index)
0083         << qdev->rom->slot_gen_bits;
0084     high_bits |= slot->generation;
0085     high_bits <<= (64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits));
0086     slot->high_bits = high_bits;
0087
0088     DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx\n",
0089          slot->index, slot->name,
0090          (unsigned long)slot->start_phys_addr,
0091          (unsigned long)slot->size);
0092 }
0093
0094 void qxl_reinit_memslots(struct qxl_device *qdev)
0095 {
0096     setup_hw_slot(qdev, &qdev->main_slot);
0097     setup_hw_slot(qdev, &qdev->surfaces_slot);
0098 }
0099
0100 static void qxl_gc_work(struct work_struct *work)
0101 {
0102     struct qxl_device *qdev = container_of(work, struct qxl_device, gc_work);
0103
0104     qxl_garbage_collect(qdev);
0105 }
0106
0107 int qxl_device_init(struct qxl_device *qdev,
0108             struct pci_dev *pdev)
0109 {
0110     int r, sb;
0111
0112     pci_set_drvdata(pdev, &qdev->ddev);
0113
0114     mutex_init(&qdev->gem.mutex);
0115     mutex_init(&qdev->update_area_mutex);
0116     mutex_init(&qdev->release_mutex);
0117     mutex_init(&qdev->surf_evict_mutex);
0118     qxl_gem_init(qdev);
0119
0120     qdev->rom_base = pci_resource_start(pdev, 2);
0121     qdev->rom_size = pci_resource_len(pdev, 2);
0122     qdev->vram_base = pci_resource_start(pdev, 0);
0123     qdev->io_base = pci_resource_start(pdev, 3);
0124
0125     qdev->vram_mapping = io_mapping_create_wc(qdev->vram_base, pci_resource_len(pdev, 0));
0126     if (!qdev->vram_mapping) {
0127         pr_err("Unable to create vram_mapping");
0128         return -ENOMEM;
0129     }
0130
0131     if (pci_resource_len(pdev, 4) > 0) {
0132         /* 64bit surface bar present */
0133         sb = 4;
0134         qdev->surfaceram_base = pci_resource_start(pdev, sb);
0135         qdev->surfaceram_size = pci_resource_len(pdev, sb);
0136         qdev->surface_mapping =
0137             io_mapping_create_wc(qdev->surfaceram_base,
0138                          qdev->surfaceram_size);
0139     }
0140     if (qdev->surface_mapping == NULL) {
0141         /* 64bit surface bar not present (or mapping failed) */
0142         sb = 1;
0143         qdev->surfaceram_base = pci_resource_start(pdev, sb);
0144         qdev->surfaceram_size = pci_resource_len(pdev, sb);
0145         qdev->surface_mapping =
0146             io_mapping_create_wc(qdev->surfaceram_base,
0147                          qdev->surfaceram_size);
0148         if (!qdev->surface_mapping) {
0149             pr_err("Unable to create surface_mapping");
0150             r = -ENOMEM;
0151             goto vram_mapping_free;
0152         }
0153     }
0154
0155     DRM_DEBUG_KMS("qxl: vram %llx-%llx(%dM %dk), surface %llx-%llx(%dM %dk, %s)\n",
0156          (unsigned long long)qdev->vram_base,
0157          (unsigned long long)pci_resource_end(pdev, 0),
0158          (int)pci_resource_len(pdev, 0) / 1024 / 1024,
0159          (int)pci_resource_len(pdev, 0) / 1024,
0160          (unsigned long long)qdev->surfaceram_base,
0161          (unsigned long long)pci_resource_end(pdev, sb),
0162          (int)qdev->surfaceram_size / 1024 / 1024,
0163          (int)qdev->surfaceram_size / 1024,
0164          (sb == 4) ? "64bit" : "32bit");
0165
0166     qdev->rom = ioremap_wc(qdev->rom_base, qdev->rom_size);
0167     if (!qdev->rom) {
0168         pr_err("Unable to ioremap ROM\n");
0169         r = -ENOMEM;
0170         goto surface_mapping_free;
0171     }
0172
0173     if (!qxl_check_device(qdev)) {
0174         r = -ENODEV;
0175         goto rom_unmap;
0176     }
0177
0178     r = qxl_bo_init(qdev);
0179     if (r) {
0180         DRM_ERROR("bo init failed %d\n", r);
0181         goto rom_unmap;
0182     }
0183
0184     qdev->ram_header = ioremap_wc(qdev->vram_base +
0185                    qdev->rom->ram_header_offset,
0186                    sizeof(*qdev->ram_header));
0187     if (!qdev->ram_header) {
0188         DRM_ERROR("Unable to ioremap RAM header\n");
0189         r = -ENOMEM;
0190         goto bo_fini;
0191     }
0192
0193     qdev->command_ring = qxl_ring_create(&(qdev->ram_header->cmd_ring_hdr),
0194                          sizeof(struct qxl_command),
0195                          QXL_COMMAND_RING_SIZE,
0196                          qdev->io_base + QXL_IO_NOTIFY_CMD,
0197                          false,
0198                          &qdev->display_event);
0199     if (!qdev->command_ring) {
0200         DRM_ERROR("Unable to create command ring\n");
0201         r = -ENOMEM;
0202         goto ram_header_unmap;
0203     }
0204
0205     qdev->cursor_ring = qxl_ring_create(
0206                 &(qdev->ram_header->cursor_ring_hdr),
0207                 sizeof(struct qxl_command),
0208                 QXL_CURSOR_RING_SIZE,
0209                 qdev->io_base + QXL_IO_NOTIFY_CURSOR,
0210                 false,
0211                 &qdev->cursor_event);
0212
0213     if (!qdev->cursor_ring) {
0214         DRM_ERROR("Unable to create cursor ring\n");
0215         r = -ENOMEM;
0216         goto command_ring_free;
0217     }
0218
0219     qdev->release_ring = qxl_ring_create(
0220                 &(qdev->ram_header->release_ring_hdr),
0221                 sizeof(uint64_t),
0222                 QXL_RELEASE_RING_SIZE, 0, true,
0223                 NULL);
0224
0225     if (!qdev->release_ring) {
0226         DRM_ERROR("Unable to create release ring\n");
0227         r = -ENOMEM;
0228         goto cursor_ring_free;
0229     }
0230
0231     idr_init_base(&qdev->release_idr, 1);
0232     spin_lock_init(&qdev->release_idr_lock);
0233     spin_lock_init(&qdev->release_lock);
0234
0235     idr_init_base(&qdev->surf_id_idr, 1);
0236     spin_lock_init(&qdev->surf_id_idr_lock);
0237
0238     mutex_init(&qdev->async_io_mutex);
0239
0240     /* reset the device into a known state - no memslots, no primary
0241      * created, no surfaces. */
0242     qxl_io_reset(qdev);
0243
0244     /* must initialize irq before first async io - slot creation */
0245     r = qxl_irq_init(qdev);
0246     if (r) {
0247         DRM_ERROR("Unable to init qxl irq\n");
0248         goto release_ring_free;
0249     }
0250
0251     /*
0252      * Note that virtual is surface0. We rely on the single ioremap done
0253      * before.
0254      */
0255     setup_slot(qdev, &qdev->main_slot, 0, "main",
0256            (unsigned long)qdev->vram_base,
0257            (unsigned long)qdev->rom->ram_header_offset);
0258     setup_slot(qdev, &qdev->surfaces_slot, 1, "surfaces",
0259            (unsigned long)qdev->surfaceram_base,
0260            (unsigned long)qdev->surfaceram_size);
0261
0262     INIT_WORK(&qdev->gc_work, qxl_gc_work);
0263
0264     return 0;
0265
0266 release_ring_free:
0267     qxl_ring_free(qdev->release_ring);
0268 cursor_ring_free:
0269     qxl_ring_free(qdev->cursor_ring);
0270 command_ring_free:
0271     qxl_ring_free(qdev->command_ring);
0272 ram_header_unmap:
0273     iounmap(qdev->ram_header);
0274 bo_fini:
0275     qxl_bo_fini(qdev);
0276 rom_unmap:
0277     iounmap(qdev->rom);
0278 surface_mapping_free:
0279     io_mapping_free(qdev->surface_mapping);
0280 vram_mapping_free:
0281     io_mapping_free(qdev->vram_mapping);
0282     return r;
0283 }
0284
0285 void qxl_device_fini(struct qxl_device *qdev)
0286 {
0287     int cur_idx;
0288
0289     /* check if qxl_device_init() was successful (gc_work is initialized last) */
0290     if (!qdev->gc_work.func)
0291         return;
0292
0293     for (cur_idx = 0; cur_idx < 3; cur_idx++) {
0294         if (!qdev->current_release_bo[cur_idx])
0295             continue;
0296         qxl_bo_unpin(qdev->current_release_bo[cur_idx]);
0297         qxl_bo_unref(&qdev->current_release_bo[cur_idx]);
0298         qdev->current_release_bo_offset[cur_idx] = 0;
0299         qdev->current_release_bo[cur_idx] = NULL;
0300     }
0301
0302     /*
0303      * Ask host to release resources (+fill release ring),
0304      * then wait for the release actually happening.
0305      */
0306     qxl_io_notify_oom(qdev);
0307     wait_event_timeout(qdev->release_event,
0308                atomic_read(&qdev->release_count) == 0,
0309                HZ);
0310     flush_work(&qdev->gc_work);
0311     qxl_surf_evict(qdev);
0312     qxl_vram_evict(qdev);
0313
0314     qxl_gem_fini(qdev);
0315     qxl_bo_fini(qdev);
0316     qxl_ring_free(qdev->command_ring);
0317     qxl_ring_free(qdev->cursor_ring);
0318     qxl_ring_free(qdev->release_ring);
0319     io_mapping_free(qdev->surface_mapping);
0320     io_mapping_free(qdev->vram_mapping);
0321     iounmap(qdev->ram_header);
0322     iounmap(qdev->rom);
0323     qdev->rom = NULL;
0324 }