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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 
0003 /*
0004  * Versatile family (ARM reference designs) handling for the PL11x.
0005  * This is based on code and know-how in the previous frame buffer
0006  * driver in drivers/video/fbdev/amba-clcd.c:
0007  * Copyright (C) 2001 ARM Limited, by David A Rusling
0008  * Updated to 2.5 by Deep Blue Solutions Ltd.
0009  * Major contributions and discoveries by Russell King.
0010  */
0011 
0012 #include <linux/bitops.h>
0013 #include <linux/device.h>
0014 #include <linux/mfd/syscon.h>
0015 #include <linux/module.h>
0016 #include <linux/of.h>
0017 #include <linux/of_platform.h>
0018 #include <linux/regmap.h>
0019 #include <linux/vexpress.h>
0020 
0021 #include <drm/drm_fourcc.h>
0022 
0023 #include "pl111_versatile.h"
0024 #include "pl111_drm.h"
0025 
0026 static struct regmap *versatile_syscon_map;
0027 
0028 /*
0029  * We detect the different syscon types from the compatible strings.
0030  */
0031 enum versatile_clcd {
0032     INTEGRATOR_IMPD1,
0033     INTEGRATOR_CLCD_CM,
0034     VERSATILE_CLCD,
0035     REALVIEW_CLCD_EB,
0036     REALVIEW_CLCD_PB1176,
0037     REALVIEW_CLCD_PB11MP,
0038     REALVIEW_CLCD_PBA8,
0039     REALVIEW_CLCD_PBX,
0040     VEXPRESS_CLCD_V2M,
0041 };
0042 
0043 static const struct of_device_id versatile_clcd_of_match[] = {
0044     {
0045         .compatible = "arm,core-module-integrator",
0046         .data = (void *)INTEGRATOR_CLCD_CM,
0047     },
0048     {
0049         .compatible = "arm,versatile-sysreg",
0050         .data = (void *)VERSATILE_CLCD,
0051     },
0052     {
0053         .compatible = "arm,realview-eb-syscon",
0054         .data = (void *)REALVIEW_CLCD_EB,
0055     },
0056     {
0057         .compatible = "arm,realview-pb1176-syscon",
0058         .data = (void *)REALVIEW_CLCD_PB1176,
0059     },
0060     {
0061         .compatible = "arm,realview-pb11mp-syscon",
0062         .data = (void *)REALVIEW_CLCD_PB11MP,
0063     },
0064     {
0065         .compatible = "arm,realview-pba8-syscon",
0066         .data = (void *)REALVIEW_CLCD_PBA8,
0067     },
0068     {
0069         .compatible = "arm,realview-pbx-syscon",
0070         .data = (void *)REALVIEW_CLCD_PBX,
0071     },
0072     {
0073         .compatible = "arm,vexpress-muxfpga",
0074         .data = (void *)VEXPRESS_CLCD_V2M,
0075     },
0076     {},
0077 };
0078 
0079 static const struct of_device_id impd1_clcd_of_match[] = {
0080     {
0081         .compatible = "arm,im-pd1-syscon",
0082         .data = (void *)INTEGRATOR_IMPD1,
0083     },
0084     {},
0085 };
0086 
0087 /*
0088  * Core module CLCD control on the Integrator/CP, bits
0089  * 8 thru 19 of the CM_CONTROL register controls a bunch
0090  * of CLCD settings.
0091  */
0092 #define INTEGRATOR_HDR_CTRL_OFFSET  0x0C
0093 #define INTEGRATOR_CLCD_LCDBIASEN   BIT(8)
0094 #define INTEGRATOR_CLCD_LCDBIASUP   BIT(9)
0095 #define INTEGRATOR_CLCD_LCDBIASDN   BIT(10)
0096 /* Bits 11,12,13 controls the LCD or VGA bridge type */
0097 #define INTEGRATOR_CLCD_LCDMUX_LCD24    BIT(11)
0098 #define INTEGRATOR_CLCD_LCDMUX_SHARP    (BIT(11)|BIT(12))
0099 #define INTEGRATOR_CLCD_LCDMUX_VGA555   BIT(13)
0100 #define INTEGRATOR_CLCD_LCDMUX_VGA24    (BIT(11)|BIT(12)|BIT(13))
0101 #define INTEGRATOR_CLCD_LCD0_EN     BIT(14)
0102 #define INTEGRATOR_CLCD_LCD1_EN     BIT(15)
0103 /* R/L flip on Sharp */
0104 #define INTEGRATOR_CLCD_LCD_STATIC1 BIT(16)
0105 /* U/D flip on Sharp */
0106 #define INTEGRATOR_CLCD_LCD_STATIC2 BIT(17)
0107 /* No connection on Sharp */
0108 #define INTEGRATOR_CLCD_LCD_STATIC  BIT(18)
0109 /* 0 = 24bit VGA, 1 = 18bit VGA */
0110 #define INTEGRATOR_CLCD_LCD_N24BITEN    BIT(19)
0111 
0112 #define INTEGRATOR_CLCD_MASK        GENMASK(19, 8)
0113 
0114 static void pl111_integrator_enable(struct drm_device *drm, u32 format)
0115 {
0116     u32 val;
0117 
0118     dev_info(drm->dev, "enable Integrator CLCD connectors\n");
0119 
0120     /* FIXME: really needed? */
0121     val = INTEGRATOR_CLCD_LCD_STATIC1 | INTEGRATOR_CLCD_LCD_STATIC2 |
0122         INTEGRATOR_CLCD_LCD0_EN | INTEGRATOR_CLCD_LCD1_EN;
0123 
0124     switch (format) {
0125     case DRM_FORMAT_XBGR8888:
0126     case DRM_FORMAT_XRGB8888:
0127         /* 24bit formats */
0128         val |= INTEGRATOR_CLCD_LCDMUX_VGA24;
0129         break;
0130     case DRM_FORMAT_XBGR1555:
0131     case DRM_FORMAT_XRGB1555:
0132         /* Pseudocolor, RGB555, BGR555 */
0133         val |= INTEGRATOR_CLCD_LCDMUX_VGA555;
0134         break;
0135     default:
0136         dev_err(drm->dev, "unhandled format on Integrator 0x%08x\n",
0137             format);
0138         break;
0139     }
0140 
0141     regmap_update_bits(versatile_syscon_map,
0142                INTEGRATOR_HDR_CTRL_OFFSET,
0143                INTEGRATOR_CLCD_MASK,
0144                val);
0145 }
0146 
0147 #define IMPD1_CTRL_OFFSET   0x18
0148 #define IMPD1_CTRL_DISP_LCD (0 << 0)
0149 #define IMPD1_CTRL_DISP_VGA (1 << 0)
0150 #define IMPD1_CTRL_DISP_LCD1    (2 << 0)
0151 #define IMPD1_CTRL_DISP_ENABLE  (1 << 2)
0152 #define IMPD1_CTRL_DISP_MASK    (7 << 0)
0153 
0154 static void pl111_impd1_enable(struct drm_device *drm, u32 format)
0155 {
0156     u32 val;
0157 
0158     dev_info(drm->dev, "enable IM-PD1 CLCD connectors\n");
0159     val = IMPD1_CTRL_DISP_VGA | IMPD1_CTRL_DISP_ENABLE;
0160 
0161     regmap_update_bits(versatile_syscon_map,
0162                IMPD1_CTRL_OFFSET,
0163                IMPD1_CTRL_DISP_MASK,
0164                val);
0165 }
0166 
0167 static void pl111_impd1_disable(struct drm_device *drm)
0168 {
0169     dev_info(drm->dev, "disable IM-PD1 CLCD connectors\n");
0170 
0171     regmap_update_bits(versatile_syscon_map,
0172                IMPD1_CTRL_OFFSET,
0173                IMPD1_CTRL_DISP_MASK,
0174                0);
0175 }
0176 
0177 /*
0178  * This configuration register in the Versatile and RealView
0179  * family is uniformly present but appears more and more
0180  * unutilized starting with the RealView series.
0181  */
0182 #define SYS_CLCD            0x50
0183 #define SYS_CLCD_MODE_MASK      (BIT(0)|BIT(1))
0184 #define SYS_CLCD_MODE_888       0
0185 #define SYS_CLCD_MODE_5551      BIT(0)
0186 #define SYS_CLCD_MODE_565_R_LSB     BIT(1)
0187 #define SYS_CLCD_MODE_565_B_LSB     (BIT(0)|BIT(1))
0188 #define SYS_CLCD_CONNECTOR_MASK     (BIT(2)|BIT(3)|BIT(4)|BIT(5))
0189 #define SYS_CLCD_NLCDIOON       BIT(2)
0190 #define SYS_CLCD_VDDPOSSWITCH       BIT(3)
0191 #define SYS_CLCD_PWR3V5SWITCH       BIT(4)
0192 #define SYS_CLCD_VDDNEGSWITCH       BIT(5)
0193 
0194 static void pl111_versatile_disable(struct drm_device *drm)
0195 {
0196     dev_info(drm->dev, "disable Versatile CLCD connectors\n");
0197     regmap_update_bits(versatile_syscon_map,
0198                SYS_CLCD,
0199                SYS_CLCD_CONNECTOR_MASK,
0200                0);
0201 }
0202 
0203 static void pl111_versatile_enable(struct drm_device *drm, u32 format)
0204 {
0205     u32 val = 0;
0206 
0207     dev_info(drm->dev, "enable Versatile CLCD connectors\n");
0208 
0209     switch (format) {
0210     case DRM_FORMAT_ABGR8888:
0211     case DRM_FORMAT_XBGR8888:
0212     case DRM_FORMAT_ARGB8888:
0213     case DRM_FORMAT_XRGB8888:
0214         val |= SYS_CLCD_MODE_888;
0215         break;
0216     case DRM_FORMAT_BGR565:
0217         val |= SYS_CLCD_MODE_565_R_LSB;
0218         break;
0219     case DRM_FORMAT_RGB565:
0220         val |= SYS_CLCD_MODE_565_B_LSB;
0221         break;
0222     case DRM_FORMAT_ABGR1555:
0223     case DRM_FORMAT_XBGR1555:
0224     case DRM_FORMAT_ARGB1555:
0225     case DRM_FORMAT_XRGB1555:
0226         val |= SYS_CLCD_MODE_5551;
0227         break;
0228     default:
0229         dev_err(drm->dev, "unhandled format on Versatile 0x%08x\n",
0230             format);
0231         break;
0232     }
0233 
0234     /* Set up the MUX */
0235     regmap_update_bits(versatile_syscon_map,
0236                SYS_CLCD,
0237                SYS_CLCD_MODE_MASK,
0238                val);
0239 
0240     /* Then enable the display */
0241     regmap_update_bits(versatile_syscon_map,
0242                SYS_CLCD,
0243                SYS_CLCD_CONNECTOR_MASK,
0244                SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH);
0245 }
0246 
0247 static void pl111_realview_clcd_disable(struct drm_device *drm)
0248 {
0249     dev_info(drm->dev, "disable RealView CLCD connectors\n");
0250     regmap_update_bits(versatile_syscon_map,
0251                SYS_CLCD,
0252                SYS_CLCD_CONNECTOR_MASK,
0253                0);
0254 }
0255 
0256 static void pl111_realview_clcd_enable(struct drm_device *drm, u32 format)
0257 {
0258     dev_info(drm->dev, "enable RealView CLCD connectors\n");
0259     regmap_update_bits(versatile_syscon_map,
0260                SYS_CLCD,
0261                SYS_CLCD_CONNECTOR_MASK,
0262                SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH);
0263 }
0264 
0265 /* PL110 pixel formats for Integrator, vanilla PL110 */
0266 static const u32 pl110_integrator_pixel_formats[] = {
0267     DRM_FORMAT_ABGR8888,
0268     DRM_FORMAT_XBGR8888,
0269     DRM_FORMAT_ARGB8888,
0270     DRM_FORMAT_XRGB8888,
0271     DRM_FORMAT_ABGR1555,
0272     DRM_FORMAT_XBGR1555,
0273     DRM_FORMAT_ARGB1555,
0274     DRM_FORMAT_XRGB1555,
0275 };
0276 
0277 /* Extended PL110 pixel formats for Integrator and Versatile */
0278 static const u32 pl110_versatile_pixel_formats[] = {
0279     DRM_FORMAT_ABGR8888,
0280     DRM_FORMAT_XBGR8888,
0281     DRM_FORMAT_ARGB8888,
0282     DRM_FORMAT_XRGB8888,
0283     DRM_FORMAT_BGR565, /* Uses external PLD */
0284     DRM_FORMAT_RGB565, /* Uses external PLD */
0285     DRM_FORMAT_ABGR1555,
0286     DRM_FORMAT_XBGR1555,
0287     DRM_FORMAT_ARGB1555,
0288     DRM_FORMAT_XRGB1555,
0289 };
0290 
0291 static const u32 pl111_realview_pixel_formats[] = {
0292     DRM_FORMAT_ABGR8888,
0293     DRM_FORMAT_XBGR8888,
0294     DRM_FORMAT_ARGB8888,
0295     DRM_FORMAT_XRGB8888,
0296     DRM_FORMAT_BGR565,
0297     DRM_FORMAT_RGB565,
0298     DRM_FORMAT_ABGR1555,
0299     DRM_FORMAT_XBGR1555,
0300     DRM_FORMAT_ARGB1555,
0301     DRM_FORMAT_XRGB1555,
0302     DRM_FORMAT_ABGR4444,
0303     DRM_FORMAT_XBGR4444,
0304     DRM_FORMAT_ARGB4444,
0305     DRM_FORMAT_XRGB4444,
0306 };
0307 
0308 /*
0309  * The Integrator variant is a PL110 with a bunch of broken, or not
0310  * yet implemented features
0311  */
0312 static const struct pl111_variant_data pl110_integrator = {
0313     .name = "PL110 Integrator",
0314     .is_pl110 = true,
0315     .broken_clockdivider = true,
0316     .broken_vblank = true,
0317     .formats = pl110_integrator_pixel_formats,
0318     .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats),
0319     .fb_bpp = 16,
0320 };
0321 
0322 /*
0323  * The IM-PD1 variant is a PL110 with a bunch of broken, or not
0324  * yet implemented features
0325  */
0326 static const struct pl111_variant_data pl110_impd1 = {
0327     .name = "PL110 IM-PD1",
0328     .is_pl110 = true,
0329     .broken_clockdivider = true,
0330     .broken_vblank = true,
0331     .formats = pl110_integrator_pixel_formats,
0332     .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats),
0333     .fb_bpp = 16,
0334 };
0335 
0336 /*
0337  * This is the in-between PL110 variant found in the ARM Versatile,
0338  * supporting RGB565/BGR565
0339  */
0340 static const struct pl111_variant_data pl110_versatile = {
0341     .name = "PL110 Versatile",
0342     .is_pl110 = true,
0343     .external_bgr = true,
0344     .formats = pl110_versatile_pixel_formats,
0345     .nformats = ARRAY_SIZE(pl110_versatile_pixel_formats),
0346     .fb_bpp = 16,
0347 };
0348 
0349 /*
0350  * RealView PL111 variant, the only real difference from the vanilla
0351  * PL111 is that we select 16bpp framebuffer by default to be able
0352  * to get 1024x768 without saturating the memory bus.
0353  */
0354 static const struct pl111_variant_data pl111_realview = {
0355     .name = "PL111 RealView",
0356     .formats = pl111_realview_pixel_formats,
0357     .nformats = ARRAY_SIZE(pl111_realview_pixel_formats),
0358     .fb_bpp = 16,
0359 };
0360 
0361 /*
0362  * Versatile Express PL111 variant, again we just push the maximum
0363  * BPP to 16 to be able to get 1024x768 without saturating the memory
0364  * bus. The clockdivider also seems broken on the Versatile Express.
0365  */
0366 static const struct pl111_variant_data pl111_vexpress = {
0367     .name = "PL111 Versatile Express",
0368     .formats = pl111_realview_pixel_formats,
0369     .nformats = ARRAY_SIZE(pl111_realview_pixel_formats),
0370     .fb_bpp = 16,
0371     .broken_clockdivider = true,
0372 };
0373 
0374 #define VEXPRESS_FPGAMUX_MOTHERBOARD        0x00
0375 #define VEXPRESS_FPGAMUX_DAUGHTERBOARD_1    0x01
0376 #define VEXPRESS_FPGAMUX_DAUGHTERBOARD_2    0x02
0377 
0378 static int pl111_vexpress_clcd_init(struct device *dev, struct device_node *np,
0379                     struct pl111_drm_dev_private *priv)
0380 {
0381     struct platform_device *pdev;
0382     struct device_node *root;
0383     struct device_node *child;
0384     struct device_node *ct_clcd = NULL;
0385     struct regmap *map;
0386     bool has_coretile_clcd = false;
0387     bool has_coretile_hdlcd = false;
0388     bool mux_motherboard = true;
0389     u32 val;
0390     int ret;
0391 
0392     if (!IS_ENABLED(CONFIG_VEXPRESS_CONFIG))
0393         return -ENODEV;
0394 
0395     /*
0396      * Check if we have a CLCD or HDLCD on the core tile by checking if a
0397      * CLCD or HDLCD is available in the root of the device tree.
0398      */
0399     root = of_find_node_by_path("/");
0400     if (!root)
0401         return -EINVAL;
0402 
0403     for_each_available_child_of_node(root, child) {
0404         if (of_device_is_compatible(child, "arm,pl111")) {
0405             has_coretile_clcd = true;
0406             ct_clcd = child;
0407             break;
0408         }
0409         if (of_device_is_compatible(child, "arm,hdlcd")) {
0410             has_coretile_hdlcd = true;
0411             of_node_put(child);
0412             break;
0413         }
0414     }
0415 
0416     of_node_put(root);
0417 
0418     /*
0419      * If there is a coretile HDLCD and it has a driver,
0420      * do not mux the CLCD on the motherboard to the DVI.
0421      */
0422     if (has_coretile_hdlcd && IS_ENABLED(CONFIG_DRM_HDLCD))
0423         mux_motherboard = false;
0424 
0425     /*
0426      * On the Vexpress CA9 we let the CLCD on the coretile
0427      * take precedence, so also in this case do not mux the
0428      * motherboard to the DVI.
0429      */
0430     if (has_coretile_clcd)
0431         mux_motherboard = false;
0432 
0433     if (mux_motherboard) {
0434         dev_info(dev, "DVI muxed to motherboard CLCD\n");
0435         val = VEXPRESS_FPGAMUX_MOTHERBOARD;
0436     } else if (ct_clcd == dev->of_node) {
0437         dev_info(dev,
0438              "DVI muxed to daughterboard 1 (core tile) CLCD\n");
0439         val = VEXPRESS_FPGAMUX_DAUGHTERBOARD_1;
0440     } else {
0441         dev_info(dev, "core tile graphics present\n");
0442         dev_info(dev, "this device will be deactivated\n");
0443         return -ENODEV;
0444     }
0445 
0446     /* Call into deep Vexpress configuration API */
0447     pdev = of_find_device_by_node(np);
0448     if (!pdev) {
0449         dev_err(dev, "can't find the sysreg device, deferring\n");
0450         return -EPROBE_DEFER;
0451     }
0452 
0453     map = devm_regmap_init_vexpress_config(&pdev->dev);
0454     if (IS_ERR(map)) {
0455         platform_device_put(pdev);
0456         return PTR_ERR(map);
0457     }
0458 
0459     ret = regmap_write(map, 0, val);
0460     platform_device_put(pdev);
0461     if (ret) {
0462         dev_err(dev, "error setting DVI muxmode\n");
0463         return -ENODEV;
0464     }
0465 
0466     priv->variant = &pl111_vexpress;
0467     dev_info(dev, "initializing Versatile Express PL111\n");
0468 
0469     return 0;
0470 }
0471 
0472 int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv)
0473 {
0474     const struct of_device_id *clcd_id;
0475     enum versatile_clcd versatile_clcd_type;
0476     struct device_node *np;
0477     struct regmap *map;
0478 
0479     np = of_find_matching_node_and_match(NULL, versatile_clcd_of_match,
0480                          &clcd_id);
0481     if (!np) {
0482         /* Non-ARM reference designs, just bail out */
0483         return 0;
0484     }
0485 
0486     versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
0487 
0488     /* Versatile Express special handling */
0489     if (versatile_clcd_type == VEXPRESS_CLCD_V2M) {
0490         int ret = pl111_vexpress_clcd_init(dev, np, priv);
0491         of_node_put(np);
0492         if (ret)
0493             dev_err(dev, "Versatile Express init failed - %d", ret);
0494         return ret;
0495     }
0496 
0497     /*
0498      * On the Integrator, check if we should use the IM-PD1 instead,
0499      * if we find it, it will take precedence. This is on the Integrator/AP
0500      * which only has this option for PL110 graphics.
0501      */
0502      if (versatile_clcd_type == INTEGRATOR_CLCD_CM) {
0503         np = of_find_matching_node_and_match(NULL, impd1_clcd_of_match,
0504                              &clcd_id);
0505         if (np)
0506             versatile_clcd_type = (enum versatile_clcd)clcd_id->data;
0507     }
0508 
0509     map = syscon_node_to_regmap(np);
0510     of_node_put(np);
0511     if (IS_ERR(map)) {
0512         dev_err(dev, "no Versatile syscon regmap\n");
0513         return PTR_ERR(map);
0514     }
0515 
0516     switch (versatile_clcd_type) {
0517     case INTEGRATOR_CLCD_CM:
0518         versatile_syscon_map = map;
0519         priv->variant = &pl110_integrator;
0520         priv->variant_display_enable = pl111_integrator_enable;
0521         dev_info(dev, "set up callbacks for Integrator PL110\n");
0522         break;
0523     case INTEGRATOR_IMPD1:
0524         versatile_syscon_map = map;
0525         priv->variant = &pl110_impd1;
0526         priv->variant_display_enable = pl111_impd1_enable;
0527         priv->variant_display_disable = pl111_impd1_disable;
0528         dev_info(dev, "set up callbacks for IM-PD1 PL110\n");
0529         break;
0530     case VERSATILE_CLCD:
0531         versatile_syscon_map = map;
0532         /* This can do RGB565 with external PLD */
0533         priv->variant = &pl110_versatile;
0534         priv->variant_display_enable = pl111_versatile_enable;
0535         priv->variant_display_disable = pl111_versatile_disable;
0536         /*
0537          * The Versatile has a variant halfway between PL110
0538          * and PL111 where these two registers have already been
0539          * swapped.
0540          */
0541         priv->ienb = CLCD_PL111_IENB;
0542         priv->ctrl = CLCD_PL111_CNTL;
0543         dev_info(dev, "set up callbacks for Versatile PL110\n");
0544         break;
0545     case REALVIEW_CLCD_EB:
0546     case REALVIEW_CLCD_PB1176:
0547     case REALVIEW_CLCD_PB11MP:
0548     case REALVIEW_CLCD_PBA8:
0549     case REALVIEW_CLCD_PBX:
0550         versatile_syscon_map = map;
0551         priv->variant = &pl111_realview;
0552         priv->variant_display_enable = pl111_realview_clcd_enable;
0553         priv->variant_display_disable = pl111_realview_clcd_disable;
0554         dev_info(dev, "set up callbacks for RealView PL111\n");
0555         break;
0556     default:
0557         dev_info(dev, "unknown Versatile system controller\n");
0558         break;
0559     }
0560 
0561     return 0;
0562 }
0563 EXPORT_SYMBOL_GPL(pl111_versatile_init);
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