drm/panfrost/panfrost_device.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
0003 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
0004
0005 #ifndef __PANFROST_DEVICE_H__
0006 #define __PANFROST_DEVICE_H__
0007
0008 #include <linux/atomic.h>
0009 #include <linux/io-pgtable.h>
0010 #include <linux/regulator/consumer.h>
0011 #include <linux/spinlock.h>
0012 #include <drm/drm_device.h>
0013 #include <drm/drm_mm.h>
0014 #include <drm/gpu_scheduler.h>
0015
0016 #include "panfrost_devfreq.h"
0017
0018 struct panfrost_device;
0019 struct panfrost_mmu;
0020 struct panfrost_job_slot;
0021 struct panfrost_job;
0022 struct panfrost_perfcnt;
0023
0024 #define NUM_JOB_SLOTS 3
0025 #define MAX_PM_DOMAINS 3
0026
0027 struct panfrost_features {
0028     u16 id;
0029     u16 revision;
0030
0031     u64 shader_present;
0032     u64 tiler_present;
0033     u64 l2_present;
0034     u64 stack_present;
0035     u32 as_present;
0036     u32 js_present;
0037
0038     u32 l2_features;
0039     u32 core_features;
0040     u32 tiler_features;
0041     u32 mem_features;
0042     u32 mmu_features;
0043     u32 thread_features;
0044     u32 max_threads;
0045     u32 thread_max_workgroup_sz;
0046     u32 thread_max_barrier_sz;
0047     u32 coherency_features;
0048     u32 afbc_features;
0049     u32 texture_features[4];
0050     u32 js_features[16];
0051
0052     u32 nr_core_groups;
0053     u32 thread_tls_alloc;
0054
0055     unsigned long hw_features[64 / BITS_PER_LONG];
0056     unsigned long hw_issues[64 / BITS_PER_LONG];
0057 };
0058
0059 /*
0060  * Features that cannot be automatically detected and need matching using the
0061  * compatible string, typically SoC-specific.
0062  */
0063 struct panfrost_compatible {
0064     /* Supplies count and names. */
0065     int num_supplies;
0066     const char * const *supply_names;
0067     /*
0068      * Number of power domains required, note that values 0 and 1 are
0069      * handled identically, as only values > 1 need special handling.
0070      */
0071     int num_pm_domains;
0072     /* Only required if num_pm_domains > 1. */
0073     const char * const *pm_domain_names;
0074
0075     /* Vendor implementation quirks callback */
0076     void (*vendor_quirk)(struct panfrost_device *pfdev);
0077 };
0078
0079 struct panfrost_device {
0080     struct device *dev;
0081     struct drm_device *ddev;
0082     struct platform_device *pdev;
0083
0084     void __iomem *iomem;
0085     struct clk *clock;
0086     struct clk *bus_clock;
0087     struct regulator_bulk_data *regulators;
0088     struct reset_control *rstc;
0089     /* pm_domains for devices with more than one. */
0090     struct device *pm_domain_devs[MAX_PM_DOMAINS];
0091     struct device_link *pm_domain_links[MAX_PM_DOMAINS];
0092     bool coherent;
0093
0094     struct panfrost_features features;
0095     const struct panfrost_compatible *comp;
0096
0097     spinlock_t as_lock;
0098     unsigned long as_in_use_mask;
0099     unsigned long as_alloc_mask;
0100     unsigned long as_faulty_mask;
0101     struct list_head as_lru_list;
0102
0103     struct panfrost_job_slot *js;
0104
0105     struct panfrost_job *jobs[NUM_JOB_SLOTS][2];
0106     struct list_head scheduled_jobs;
0107
0108     struct panfrost_perfcnt *perfcnt;
0109
0110     struct mutex sched_lock;
0111
0112     struct {
0113         struct workqueue_struct *wq;
0114         struct work_struct work;
0115         atomic_t pending;
0116     } reset;
0117
0118     struct mutex shrinker_lock;
0119     struct list_head shrinker_list;
0120     struct shrinker shrinker;
0121
0122     struct panfrost_devfreq pfdevfreq;
0123 };
0124
0125 struct panfrost_mmu {
0126     struct panfrost_device *pfdev;
0127     struct kref refcount;
0128     struct io_pgtable_cfg pgtbl_cfg;
0129     struct io_pgtable_ops *pgtbl_ops;
0130     struct drm_mm mm;
0131     spinlock_t mm_lock;
0132     int as;
0133     atomic_t as_count;
0134     struct list_head list;
0135 };
0136
0137 struct panfrost_file_priv {
0138     struct panfrost_device *pfdev;
0139
0140     struct drm_sched_entity sched_entity[NUM_JOB_SLOTS];
0141
0142     struct panfrost_mmu *mmu;
0143 };
0144
0145 static inline struct panfrost_device *to_panfrost_device(struct drm_device *ddev)
0146 {
0147     return ddev->dev_private;
0148 }
0149
0150 static inline int panfrost_model_cmp(struct panfrost_device *pfdev, s32 id)
0151 {
0152     s32 match_id = pfdev->features.id;
0153
0154     if (match_id & 0xf000)
0155         match_id &= 0xf00f;
0156     return match_id - id;
0157 }
0158
0159 static inline bool panfrost_model_is_bifrost(struct panfrost_device *pfdev)
0160 {
0161     return panfrost_model_cmp(pfdev, 0x1000) >= 0;
0162 }
0163
0164 static inline bool panfrost_model_eq(struct panfrost_device *pfdev, s32 id)
0165 {
0166     return !panfrost_model_cmp(pfdev, id);
0167 }
0168
0169 int panfrost_unstable_ioctl_check(void);
0170
0171 int panfrost_device_init(struct panfrost_device *pfdev);
0172 void panfrost_device_fini(struct panfrost_device *pfdev);
0173 void panfrost_device_reset(struct panfrost_device *pfdev);
0174
0175 int panfrost_device_resume(struct device *dev);
0176 int panfrost_device_suspend(struct device *dev);
0177
0178 enum drm_panfrost_exception_type {
0179     DRM_PANFROST_EXCEPTION_OK = 0x00,
0180     DRM_PANFROST_EXCEPTION_DONE = 0x01,
0181     DRM_PANFROST_EXCEPTION_INTERRUPTED = 0x02,
0182     DRM_PANFROST_EXCEPTION_STOPPED = 0x03,
0183     DRM_PANFROST_EXCEPTION_TERMINATED = 0x04,
0184     DRM_PANFROST_EXCEPTION_KABOOM = 0x05,
0185     DRM_PANFROST_EXCEPTION_EUREKA = 0x06,
0186     DRM_PANFROST_EXCEPTION_ACTIVE = 0x08,
0187     DRM_PANFROST_EXCEPTION_MAX_NON_FAULT = 0x3f,
0188     DRM_PANFROST_EXCEPTION_JOB_CONFIG_FAULT = 0x40,
0189     DRM_PANFROST_EXCEPTION_JOB_POWER_FAULT = 0x41,
0190     DRM_PANFROST_EXCEPTION_JOB_READ_FAULT = 0x42,
0191     DRM_PANFROST_EXCEPTION_JOB_WRITE_FAULT = 0x43,
0192     DRM_PANFROST_EXCEPTION_JOB_AFFINITY_FAULT = 0x44,
0193     DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT = 0x48,
0194     DRM_PANFROST_EXCEPTION_INSTR_INVALID_PC = 0x50,
0195     DRM_PANFROST_EXCEPTION_INSTR_INVALID_ENC = 0x51,
0196     DRM_PANFROST_EXCEPTION_INSTR_TYPE_MISMATCH = 0x52,
0197     DRM_PANFROST_EXCEPTION_INSTR_OPERAND_FAULT = 0x53,
0198     DRM_PANFROST_EXCEPTION_INSTR_TLS_FAULT = 0x54,
0199     DRM_PANFROST_EXCEPTION_INSTR_BARRIER_FAULT = 0x55,
0200     DRM_PANFROST_EXCEPTION_INSTR_ALIGN_FAULT = 0x56,
0201     DRM_PANFROST_EXCEPTION_DATA_INVALID_FAULT = 0x58,
0202     DRM_PANFROST_EXCEPTION_TILE_RANGE_FAULT = 0x59,
0203     DRM_PANFROST_EXCEPTION_ADDR_RANGE_FAULT = 0x5a,
0204     DRM_PANFROST_EXCEPTION_IMPRECISE_FAULT = 0x5b,
0205     DRM_PANFROST_EXCEPTION_OOM = 0x60,
0206     DRM_PANFROST_EXCEPTION_OOM_AFBC = 0x61,
0207     DRM_PANFROST_EXCEPTION_UNKNOWN = 0x7f,
0208     DRM_PANFROST_EXCEPTION_DELAYED_BUS_FAULT = 0x80,
0209     DRM_PANFROST_EXCEPTION_GPU_SHAREABILITY_FAULT = 0x88,
0210     DRM_PANFROST_EXCEPTION_SYS_SHAREABILITY_FAULT = 0x89,
0211     DRM_PANFROST_EXCEPTION_GPU_CACHEABILITY_FAULT = 0x8a,
0212     DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_0 = 0xc0,
0213     DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_1 = 0xc1,
0214     DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_2 = 0xc2,
0215     DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_3 = 0xc3,
0216     DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_4 = 0xc4,
0217     DRM_PANFROST_EXCEPTION_TRANSLATION_FAULT_IDENTITY = 0xc7,
0218     DRM_PANFROST_EXCEPTION_PERM_FAULT_0 = 0xc8,
0219     DRM_PANFROST_EXCEPTION_PERM_FAULT_1 = 0xc9,
0220     DRM_PANFROST_EXCEPTION_PERM_FAULT_2 = 0xca,
0221     DRM_PANFROST_EXCEPTION_PERM_FAULT_3 = 0xcb,
0222     DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_0 = 0xd0,
0223     DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_1 = 0xd1,
0224     DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_2 = 0xd2,
0225     DRM_PANFROST_EXCEPTION_TRANSTAB_BUS_FAULT_3 = 0xd3,
0226     DRM_PANFROST_EXCEPTION_ACCESS_FLAG_0 = 0xd8,
0227     DRM_PANFROST_EXCEPTION_ACCESS_FLAG_1 = 0xd9,
0228     DRM_PANFROST_EXCEPTION_ACCESS_FLAG_2 = 0xda,
0229     DRM_PANFROST_EXCEPTION_ACCESS_FLAG_3 = 0xdb,
0230     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN0 = 0xe0,
0231     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN1 = 0xe1,
0232     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN2 = 0xe2,
0233     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_IN3 = 0xe3,
0234     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT0 = 0xe4,
0235     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT1 = 0xe5,
0236     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT2 = 0xe6,
0237     DRM_PANFROST_EXCEPTION_ADDR_SIZE_FAULT_OUT3 = 0xe7,
0238     DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_0 = 0xe8,
0239     DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_1 = 0xe9,
0240     DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_2 = 0xea,
0241     DRM_PANFROST_EXCEPTION_MEM_ATTR_FAULT_3 = 0xeb,
0242     DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_0 = 0xec,
0243     DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_1 = 0xed,
0244     DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_2 = 0xee,
0245     DRM_PANFROST_EXCEPTION_MEM_ATTR_NONCACHE_3 = 0xef,
0246 };
0247
0248 static inline bool
0249 panfrost_exception_is_fault(u32 exception_code)
0250 {
0251     return exception_code > DRM_PANFROST_EXCEPTION_MAX_NON_FAULT;
0252 }
0253
0254 const char *panfrost_exception_name(u32 exception_code);
0255 bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
0256                     u32 exception_code);
0257
0258 static inline void
0259 panfrost_device_schedule_reset(struct panfrost_device *pfdev)
0260 {
0261     atomic_set(&pfdev->reset.pending, 1);
0262     queue_work(pfdev->reset.wq, &pfdev->reset.work);
0263 }
0264
0265 #endif