drm/panfrost/panfrost_device.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */
0003 /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */
0004
0005 #include <linux/clk.h>
0006 #include <linux/reset.h>
0007 #include <linux/platform_device.h>
0008 #include <linux/pm_domain.h>
0009 #include <linux/regulator/consumer.h>
0010
0011 #include "panfrost_device.h"
0012 #include "panfrost_devfreq.h"
0013 #include "panfrost_features.h"
0014 #include "panfrost_issues.h"
0015 #include "panfrost_gpu.h"
0016 #include "panfrost_job.h"
0017 #include "panfrost_mmu.h"
0018 #include "panfrost_perfcnt.h"
0019
0020 static int panfrost_reset_init(struct panfrost_device *pfdev)
0021 {
0022     pfdev->rstc = devm_reset_control_array_get_optional_exclusive(pfdev->dev);
0023     if (IS_ERR(pfdev->rstc)) {
0024         dev_err(pfdev->dev, "get reset failed %ld\n", PTR_ERR(pfdev->rstc));
0025         return PTR_ERR(pfdev->rstc);
0026     }
0027
0028     return reset_control_deassert(pfdev->rstc);
0029 }
0030
0031 static void panfrost_reset_fini(struct panfrost_device *pfdev)
0032 {
0033     reset_control_assert(pfdev->rstc);
0034 }
0035
0036 static int panfrost_clk_init(struct panfrost_device *pfdev)
0037 {
0038     int err;
0039     unsigned long rate;
0040
0041     pfdev->clock = devm_clk_get(pfdev->dev, NULL);
0042     if (IS_ERR(pfdev->clock)) {
0043         dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
0044         return PTR_ERR(pfdev->clock);
0045     }
0046
0047     rate = clk_get_rate(pfdev->clock);
0048     dev_info(pfdev->dev, "clock rate = %lu\n", rate);
0049
0050     err = clk_prepare_enable(pfdev->clock);
0051     if (err)
0052         return err;
0053
0054     pfdev->bus_clock = devm_clk_get_optional(pfdev->dev, "bus");
0055     if (IS_ERR(pfdev->bus_clock)) {
0056         dev_err(pfdev->dev, "get bus_clock failed %ld\n",
0057             PTR_ERR(pfdev->bus_clock));
0058         err = PTR_ERR(pfdev->bus_clock);
0059         goto disable_clock;
0060     }
0061
0062     if (pfdev->bus_clock) {
0063         rate = clk_get_rate(pfdev->bus_clock);
0064         dev_info(pfdev->dev, "bus_clock rate = %lu\n", rate);
0065
0066         err = clk_prepare_enable(pfdev->bus_clock);
0067         if (err)
0068             goto disable_clock;
0069     }
0070
0071     return 0;
0072
0073 disable_clock:
0074     clk_disable_unprepare(pfdev->clock);
0075
0076     return err;
0077 }
0078
0079 static void panfrost_clk_fini(struct panfrost_device *pfdev)
0080 {
0081     clk_disable_unprepare(pfdev->bus_clock);
0082     clk_disable_unprepare(pfdev->clock);
0083 }
0084
0085 static int panfrost_regulator_init(struct panfrost_device *pfdev)
0086 {
0087     int ret, i;
0088
0089     pfdev->regulators = devm_kcalloc(pfdev->dev, pfdev->comp->num_supplies,
0090                      sizeof(*pfdev->regulators),
0091                      GFP_KERNEL);
0092     if (!pfdev->regulators)
0093         return -ENOMEM;
0094
0095     for (i = 0; i < pfdev->comp->num_supplies; i++)
0096         pfdev->regulators[i].supply = pfdev->comp->supply_names[i];
0097
0098     ret = devm_regulator_bulk_get(pfdev->dev,
0099                       pfdev->comp->num_supplies,
0100                       pfdev->regulators);
0101     if (ret < 0) {
0102         if (ret != -EPROBE_DEFER)
0103             dev_err(pfdev->dev, "failed to get regulators: %d\n",
0104                 ret);
0105         return ret;
0106     }
0107
0108     ret = regulator_bulk_enable(pfdev->comp->num_supplies,
0109                     pfdev->regulators);
0110     if (ret < 0) {
0111         dev_err(pfdev->dev, "failed to enable regulators: %d\n", ret);
0112         return ret;
0113     }
0114
0115     return 0;
0116 }
0117
0118 static void panfrost_regulator_fini(struct panfrost_device *pfdev)
0119 {
0120     if (!pfdev->regulators)
0121         return;
0122
0123     regulator_bulk_disable(pfdev->comp->num_supplies, pfdev->regulators);
0124 }
0125
0126 static void panfrost_pm_domain_fini(struct panfrost_device *pfdev)
0127 {
0128     int i;
0129
0130     for (i = 0; i < ARRAY_SIZE(pfdev->pm_domain_devs); i++) {
0131         if (!pfdev->pm_domain_devs[i])
0132             break;
0133
0134         if (pfdev->pm_domain_links[i])
0135             device_link_del(pfdev->pm_domain_links[i]);
0136
0137         dev_pm_domain_detach(pfdev->pm_domain_devs[i], true);
0138     }
0139 }
0140
0141 static int panfrost_pm_domain_init(struct panfrost_device *pfdev)
0142 {
0143     int err;
0144     int i, num_domains;
0145
0146     num_domains = of_count_phandle_with_args(pfdev->dev->of_node,
0147                          "power-domains",
0148                          "#power-domain-cells");
0149
0150     /*
0151      * Single domain is handled by the core, and, if only a single power
0152      * the power domain is requested, the property is optional.
0153      */
0154     if (num_domains < 2 && pfdev->comp->num_pm_domains < 2)
0155         return 0;
0156
0157     if (num_domains != pfdev->comp->num_pm_domains) {
0158         dev_err(pfdev->dev,
0159             "Incorrect number of power domains: %d provided, %d needed\n",
0160             num_domains, pfdev->comp->num_pm_domains);
0161         return -EINVAL;
0162     }
0163
0164     if (WARN(num_domains > ARRAY_SIZE(pfdev->pm_domain_devs),
0165             "Too many supplies in compatible structure.\n"))
0166         return -EINVAL;
0167
0168     for (i = 0; i < num_domains; i++) {
0169         pfdev->pm_domain_devs[i] =
0170             dev_pm_domain_attach_by_name(pfdev->dev,
0171                     pfdev->comp->pm_domain_names[i]);
0172         if (IS_ERR_OR_NULL(pfdev->pm_domain_devs[i])) {
0173             err = PTR_ERR(pfdev->pm_domain_devs[i]) ? : -ENODATA;
0174             pfdev->pm_domain_devs[i] = NULL;
0175             dev_err(pfdev->dev,
0176                 "failed to get pm-domain %s(%d): %d\n",
0177                 pfdev->comp->pm_domain_names[i], i, err);
0178             goto err;
0179         }
0180
0181         pfdev->pm_domain_links[i] = device_link_add(pfdev->dev,
0182                 pfdev->pm_domain_devs[i], DL_FLAG_PM_RUNTIME |
0183                 DL_FLAG_STATELESS | DL_FLAG_RPM_ACTIVE);
0184         if (!pfdev->pm_domain_links[i]) {
0185             dev_err(pfdev->pm_domain_devs[i],
0186                 "adding device link failed!\n");
0187             err = -ENODEV;
0188             goto err;
0189         }
0190     }
0191
0192     return 0;
0193
0194 err:
0195     panfrost_pm_domain_fini(pfdev);
0196     return err;
0197 }
0198
0199 int panfrost_device_init(struct panfrost_device *pfdev)
0200 {
0201     int err;
0202
0203     mutex_init(&pfdev->sched_lock);
0204     INIT_LIST_HEAD(&pfdev->scheduled_jobs);
0205     INIT_LIST_HEAD(&pfdev->as_lru_list);
0206
0207     spin_lock_init(&pfdev->as_lock);
0208
0209     err = panfrost_clk_init(pfdev);
0210     if (err) {
0211         dev_err(pfdev->dev, "clk init failed %d\n", err);
0212         return err;
0213     }
0214
0215     err = panfrost_devfreq_init(pfdev);
0216     if (err) {
0217         if (err != -EPROBE_DEFER)
0218             dev_err(pfdev->dev, "devfreq init failed %d\n", err);
0219         goto out_clk;
0220     }
0221
0222     /* OPP will handle regulators */
0223     if (!pfdev->pfdevfreq.opp_of_table_added) {
0224         err = panfrost_regulator_init(pfdev);
0225         if (err)
0226             goto out_devfreq;
0227     }
0228
0229     err = panfrost_reset_init(pfdev);
0230     if (err) {
0231         dev_err(pfdev->dev, "reset init failed %d\n", err);
0232         goto out_regulator;
0233     }
0234
0235     err = panfrost_pm_domain_init(pfdev);
0236     if (err)
0237         goto out_reset;
0238
0239     pfdev->iomem = devm_platform_ioremap_resource(pfdev->pdev, 0);
0240     if (IS_ERR(pfdev->iomem)) {
0241         err = PTR_ERR(pfdev->iomem);
0242         goto out_pm_domain;
0243     }
0244
0245     err = panfrost_gpu_init(pfdev);
0246     if (err)
0247         goto out_pm_domain;
0248
0249     err = panfrost_mmu_init(pfdev);
0250     if (err)
0251         goto out_gpu;
0252
0253     err = panfrost_job_init(pfdev);
0254     if (err)
0255         goto out_mmu;
0256
0257     err = panfrost_perfcnt_init(pfdev);
0258     if (err)
0259         goto out_job;
0260
0261     return 0;
0262 out_job:
0263     panfrost_job_fini(pfdev);
0264 out_mmu:
0265     panfrost_mmu_fini(pfdev);
0266 out_gpu:
0267     panfrost_gpu_fini(pfdev);
0268 out_pm_domain:
0269     panfrost_pm_domain_fini(pfdev);
0270 out_reset:
0271     panfrost_reset_fini(pfdev);
0272 out_regulator:
0273     panfrost_regulator_fini(pfdev);
0274 out_devfreq:
0275     panfrost_devfreq_fini(pfdev);
0276 out_clk:
0277     panfrost_clk_fini(pfdev);
0278     return err;
0279 }
0280
0281 void panfrost_device_fini(struct panfrost_device *pfdev)
0282 {
0283     panfrost_perfcnt_fini(pfdev);
0284     panfrost_job_fini(pfdev);
0285     panfrost_mmu_fini(pfdev);
0286     panfrost_gpu_fini(pfdev);
0287     panfrost_pm_domain_fini(pfdev);
0288     panfrost_reset_fini(pfdev);
0289     panfrost_devfreq_fini(pfdev);
0290     panfrost_regulator_fini(pfdev);
0291     panfrost_clk_fini(pfdev);
0292 }
0293
0294 #define PANFROST_EXCEPTION(id) \
0295     [DRM_PANFROST_EXCEPTION_ ## id] = { \
0296         .name = #id, \
0297     }
0298
0299 struct panfrost_exception_info {
0300     const char *name;
0301 };
0302
0303 static const struct panfrost_exception_info panfrost_exception_infos[] = {
0304     PANFROST_EXCEPTION(OK),
0305     PANFROST_EXCEPTION(DONE),
0306     PANFROST_EXCEPTION(INTERRUPTED),
0307     PANFROST_EXCEPTION(STOPPED),
0308     PANFROST_EXCEPTION(TERMINATED),
0309     PANFROST_EXCEPTION(KABOOM),
0310     PANFROST_EXCEPTION(EUREKA),
0311     PANFROST_EXCEPTION(ACTIVE),
0312     PANFROST_EXCEPTION(JOB_CONFIG_FAULT),
0313     PANFROST_EXCEPTION(JOB_POWER_FAULT),
0314     PANFROST_EXCEPTION(JOB_READ_FAULT),
0315     PANFROST_EXCEPTION(JOB_WRITE_FAULT),
0316     PANFROST_EXCEPTION(JOB_AFFINITY_FAULT),
0317     PANFROST_EXCEPTION(JOB_BUS_FAULT),
0318     PANFROST_EXCEPTION(INSTR_INVALID_PC),
0319     PANFROST_EXCEPTION(INSTR_INVALID_ENC),
0320     PANFROST_EXCEPTION(INSTR_TYPE_MISMATCH),
0321     PANFROST_EXCEPTION(INSTR_OPERAND_FAULT),
0322     PANFROST_EXCEPTION(INSTR_TLS_FAULT),
0323     PANFROST_EXCEPTION(INSTR_BARRIER_FAULT),
0324     PANFROST_EXCEPTION(INSTR_ALIGN_FAULT),
0325     PANFROST_EXCEPTION(DATA_INVALID_FAULT),
0326     PANFROST_EXCEPTION(TILE_RANGE_FAULT),
0327     PANFROST_EXCEPTION(ADDR_RANGE_FAULT),
0328     PANFROST_EXCEPTION(IMPRECISE_FAULT),
0329     PANFROST_EXCEPTION(OOM),
0330     PANFROST_EXCEPTION(OOM_AFBC),
0331     PANFROST_EXCEPTION(UNKNOWN),
0332     PANFROST_EXCEPTION(DELAYED_BUS_FAULT),
0333     PANFROST_EXCEPTION(GPU_SHAREABILITY_FAULT),
0334     PANFROST_EXCEPTION(SYS_SHAREABILITY_FAULT),
0335     PANFROST_EXCEPTION(GPU_CACHEABILITY_FAULT),
0336     PANFROST_EXCEPTION(TRANSLATION_FAULT_0),
0337     PANFROST_EXCEPTION(TRANSLATION_FAULT_1),
0338     PANFROST_EXCEPTION(TRANSLATION_FAULT_2),
0339     PANFROST_EXCEPTION(TRANSLATION_FAULT_3),
0340     PANFROST_EXCEPTION(TRANSLATION_FAULT_4),
0341     PANFROST_EXCEPTION(TRANSLATION_FAULT_IDENTITY),
0342     PANFROST_EXCEPTION(PERM_FAULT_0),
0343     PANFROST_EXCEPTION(PERM_FAULT_1),
0344     PANFROST_EXCEPTION(PERM_FAULT_2),
0345     PANFROST_EXCEPTION(PERM_FAULT_3),
0346     PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_0),
0347     PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_1),
0348     PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_2),
0349     PANFROST_EXCEPTION(TRANSTAB_BUS_FAULT_3),
0350     PANFROST_EXCEPTION(ACCESS_FLAG_0),
0351     PANFROST_EXCEPTION(ACCESS_FLAG_1),
0352     PANFROST_EXCEPTION(ACCESS_FLAG_2),
0353     PANFROST_EXCEPTION(ACCESS_FLAG_3),
0354     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN0),
0355     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN1),
0356     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN2),
0357     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_IN3),
0358     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT0),
0359     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT1),
0360     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT2),
0361     PANFROST_EXCEPTION(ADDR_SIZE_FAULT_OUT3),
0362     PANFROST_EXCEPTION(MEM_ATTR_FAULT_0),
0363     PANFROST_EXCEPTION(MEM_ATTR_FAULT_1),
0364     PANFROST_EXCEPTION(MEM_ATTR_FAULT_2),
0365     PANFROST_EXCEPTION(MEM_ATTR_FAULT_3),
0366     PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_0),
0367     PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_1),
0368     PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_2),
0369     PANFROST_EXCEPTION(MEM_ATTR_NONCACHE_3),
0370 };
0371
0372 const char *panfrost_exception_name(u32 exception_code)
0373 {
0374     if (WARN_ON(exception_code >= ARRAY_SIZE(panfrost_exception_infos) ||
0375             !panfrost_exception_infos[exception_code].name))
0376         return "Unknown exception type";
0377
0378     return panfrost_exception_infos[exception_code].name;
0379 }
0380
0381 bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev,
0382                     u32 exception_code)
0383 {
0384     /* If an occlusion query write causes a bus fault on affected GPUs,
0385      * future fragment jobs may hang. Reset to workaround.
0386      */
0387     if (exception_code == DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT)
0388         return panfrost_has_hw_issue(pfdev, HW_ISSUE_TTRX_3076);
0389
0390     /* No other GPUs we support need a reset */
0391     return false;
0392 }
0393
0394 void panfrost_device_reset(struct panfrost_device *pfdev)
0395 {
0396     panfrost_gpu_soft_reset(pfdev);
0397
0398     panfrost_gpu_power_on(pfdev);
0399     panfrost_mmu_reset(pfdev);
0400     panfrost_job_enable_interrupts(pfdev);
0401 }
0402
0403 #ifdef CONFIG_PM
0404 int panfrost_device_resume(struct device *dev)
0405 {
0406     struct panfrost_device *pfdev = dev_get_drvdata(dev);
0407
0408     panfrost_device_reset(pfdev);
0409     panfrost_devfreq_resume(pfdev);
0410
0411     return 0;
0412 }
0413
0414 int panfrost_device_suspend(struct device *dev)
0415 {
0416     struct panfrost_device *pfdev = dev_get_drvdata(dev);
0417
0418     if (!panfrost_job_is_idle(pfdev))
0419         return -EBUSY;
0420
0421     panfrost_devfreq_suspend(pfdev);
0422     panfrost_gpu_power_off(pfdev);
0423
0424     return 0;
0425 }
0426 #endif