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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (C) 2020 Linaro Ltd
0004  * Author: Sumit Semwal <sumit.semwal@linaro.org>
0005  *
0006  * This driver is for the DSI interface to panels using the NT36672A display driver IC
0007  * from Novatek.
0008  * Currently supported are the Tianma FHD+ panels found in some Xiaomi phones, including
0009  * some variants of the Poco F1 phone.
0010  *
0011  * Panels using the Novatek NT37762A IC should add appropriate configuration per-panel and
0012  * use this driver.
0013  */
0014 
0015 #include <linux/delay.h>
0016 #include <linux/kernel.h>
0017 #include <linux/module.h>
0018 #include <linux/of.h>
0019 #include <linux/of_device.h>
0020 
0021 #include <linux/gpio/consumer.h>
0022 #include <linux/pinctrl/consumer.h>
0023 #include <linux/regulator/consumer.h>
0024 
0025 #include <drm/drm_device.h>
0026 #include <drm/drm_mipi_dsi.h>
0027 #include <drm/drm_modes.h>
0028 #include <drm/drm_panel.h>
0029 
0030 #include <video/mipi_display.h>
0031 
0032 struct nt36672a_panel_cmd {
0033     const char data[2];
0034 };
0035 
0036 static const char * const nt36672a_regulator_names[] = {
0037     "vddio",
0038     "vddpos",
0039     "vddneg",
0040 };
0041 
0042 static unsigned long const nt36672a_regulator_enable_loads[] = {
0043     62000,
0044     100000,
0045     100000
0046 };
0047 
0048 struct nt36672a_panel_desc {
0049     const struct drm_display_mode *display_mode;
0050     const char *panel_name;
0051 
0052     unsigned int width_mm;
0053     unsigned int height_mm;
0054 
0055     unsigned long mode_flags;
0056     enum mipi_dsi_pixel_format format;
0057     unsigned int lanes;
0058 
0059     unsigned int num_on_cmds_1;
0060     const struct nt36672a_panel_cmd *on_cmds_1;
0061     unsigned int num_on_cmds_2;
0062     const struct nt36672a_panel_cmd *on_cmds_2;
0063 
0064     unsigned int num_off_cmds;
0065     const struct nt36672a_panel_cmd *off_cmds;
0066 };
0067 
0068 struct nt36672a_panel {
0069     struct drm_panel base;
0070     struct mipi_dsi_device *link;
0071     const struct nt36672a_panel_desc *desc;
0072 
0073     struct regulator_bulk_data supplies[ARRAY_SIZE(nt36672a_regulator_names)];
0074 
0075     struct gpio_desc *reset_gpio;
0076 
0077     bool prepared;
0078 };
0079 
0080 static inline struct nt36672a_panel *to_nt36672a_panel(struct drm_panel *panel)
0081 {
0082     return container_of(panel, struct nt36672a_panel, base);
0083 }
0084 
0085 static int nt36672a_send_cmds(struct drm_panel *panel, const struct nt36672a_panel_cmd *cmds,
0086                   int num)
0087 {
0088     struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
0089     unsigned int i;
0090     int err;
0091 
0092     for (i = 0; i < num; i++) {
0093         const struct nt36672a_panel_cmd *cmd = &cmds[i];
0094 
0095         err = mipi_dsi_dcs_write(pinfo->link, cmd->data[0], cmd->data + 1, 1);
0096 
0097         if (err < 0)
0098             return err;
0099     }
0100 
0101     return 0;
0102 }
0103 
0104 static int nt36672a_panel_power_off(struct drm_panel *panel)
0105 {
0106     struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
0107     int ret = 0;
0108 
0109     gpiod_set_value(pinfo->reset_gpio, 1);
0110 
0111     ret = regulator_bulk_disable(ARRAY_SIZE(pinfo->supplies), pinfo->supplies);
0112     if (ret)
0113         dev_err(panel->dev, "regulator_bulk_disable failed %d\n", ret);
0114 
0115     return ret;
0116 }
0117 
0118 static int nt36672a_panel_unprepare(struct drm_panel *panel)
0119 {
0120     struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
0121     int ret;
0122 
0123     if (!pinfo->prepared)
0124         return 0;
0125 
0126     /* send off cmds */
0127     ret = nt36672a_send_cmds(panel, pinfo->desc->off_cmds,
0128                  pinfo->desc->num_off_cmds);
0129 
0130     if (ret < 0)
0131         dev_err(panel->dev, "failed to send DCS off cmds: %d\n", ret);
0132 
0133     ret = mipi_dsi_dcs_set_display_off(pinfo->link);
0134     if (ret < 0)
0135         dev_err(panel->dev, "set_display_off cmd failed ret = %d\n", ret);
0136 
0137     /* 120ms delay required here as per DCS spec */
0138     msleep(120);
0139 
0140     ret = mipi_dsi_dcs_enter_sleep_mode(pinfo->link);
0141     if (ret < 0)
0142         dev_err(panel->dev, "enter_sleep cmd failed ret = %d\n", ret);
0143 
0144     /* 0x3C = 60ms delay */
0145     msleep(60);
0146 
0147     ret = nt36672a_panel_power_off(panel);
0148     if (ret < 0)
0149         dev_err(panel->dev, "power_off failed ret = %d\n", ret);
0150 
0151     pinfo->prepared = false;
0152 
0153     return ret;
0154 }
0155 
0156 static int nt36672a_panel_power_on(struct nt36672a_panel *pinfo)
0157 {
0158     int ret;
0159 
0160     ret = regulator_bulk_enable(ARRAY_SIZE(pinfo->supplies), pinfo->supplies);
0161     if (ret < 0)
0162         return ret;
0163 
0164     /*
0165      * As per downstream kernel, Reset sequence of Tianma FHD panel requires the panel to
0166      * be out of reset for 10ms, followed by being held in reset for 10ms. But for Android
0167      * AOSP, we needed to bump it upto 200ms otherwise we get white screen sometimes.
0168      * FIXME: Try to reduce this 200ms to a lesser value.
0169      */
0170     gpiod_set_value(pinfo->reset_gpio, 1);
0171     msleep(200);
0172     gpiod_set_value(pinfo->reset_gpio, 0);
0173     msleep(200);
0174 
0175     return 0;
0176 }
0177 
0178 static int nt36672a_panel_prepare(struct drm_panel *panel)
0179 {
0180     struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
0181     int err;
0182 
0183     if (pinfo->prepared)
0184         return 0;
0185 
0186     err = nt36672a_panel_power_on(pinfo);
0187     if (err < 0)
0188         goto poweroff;
0189 
0190     /* send first part of init cmds */
0191     err = nt36672a_send_cmds(panel, pinfo->desc->on_cmds_1,
0192                  pinfo->desc->num_on_cmds_1);
0193 
0194     if (err < 0) {
0195         dev_err(panel->dev, "failed to send DCS Init 1st Code: %d\n", err);
0196         goto poweroff;
0197     }
0198 
0199     err = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
0200     if (err < 0) {
0201         dev_err(panel->dev, "failed to exit sleep mode: %d\n", err);
0202         goto poweroff;
0203     }
0204 
0205     /* 0x46 = 70 ms delay */
0206     msleep(70);
0207 
0208     err = mipi_dsi_dcs_set_display_on(pinfo->link);
0209     if (err < 0) {
0210         dev_err(panel->dev, "failed to Set Display ON: %d\n", err);
0211         goto poweroff;
0212     }
0213 
0214     /* Send rest of the init cmds */
0215     err = nt36672a_send_cmds(panel, pinfo->desc->on_cmds_2,
0216                  pinfo->desc->num_on_cmds_2);
0217 
0218     if (err < 0) {
0219         dev_err(panel->dev, "failed to send DCS Init 2nd Code: %d\n", err);
0220         goto poweroff;
0221     }
0222 
0223     msleep(120);
0224 
0225     pinfo->prepared = true;
0226 
0227     return 0;
0228 
0229 poweroff:
0230     gpiod_set_value(pinfo->reset_gpio, 0);
0231     return err;
0232 }
0233 
0234 static int nt36672a_panel_get_modes(struct drm_panel *panel,
0235                     struct drm_connector *connector)
0236 {
0237     struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
0238     const struct drm_display_mode *m = pinfo->desc->display_mode;
0239     struct drm_display_mode *mode;
0240 
0241     mode = drm_mode_duplicate(connector->dev, m);
0242     if (!mode) {
0243         dev_err(panel->dev, "failed to add mode %ux%u@%u\n", m->hdisplay,
0244             m->vdisplay, drm_mode_vrefresh(m));
0245         return -ENOMEM;
0246     }
0247 
0248     connector->display_info.width_mm = pinfo->desc->width_mm;
0249     connector->display_info.height_mm = pinfo->desc->height_mm;
0250 
0251     drm_mode_set_name(mode);
0252     drm_mode_probed_add(connector, mode);
0253 
0254     return 1;
0255 }
0256 
0257 static const struct drm_panel_funcs panel_funcs = {
0258     .unprepare = nt36672a_panel_unprepare,
0259     .prepare = nt36672a_panel_prepare,
0260     .get_modes = nt36672a_panel_get_modes,
0261 };
0262 
0263 static const struct nt36672a_panel_cmd tianma_fhd_video_on_cmds_1[] = {
0264     /* skin enhancement mode */
0265     { .data = {0xFF, 0x22} },
0266     { .data = {0x00, 0x40} },
0267     { .data = {0x01, 0xC0} },
0268     { .data = {0x02, 0x40} },
0269     { .data = {0x03, 0x40} },
0270     { .data = {0x04, 0x40} },
0271     { .data = {0x05, 0x40} },
0272     { .data = {0x06, 0x40} },
0273     { .data = {0x07, 0x40} },
0274     { .data = {0x08, 0x40} },
0275     { .data = {0x09, 0x40} },
0276     { .data = {0x0A, 0x40} },
0277     { .data = {0x0B, 0x40} },
0278     { .data = {0x0C, 0x40} },
0279     { .data = {0x0D, 0x40} },
0280     { .data = {0x0E, 0x40} },
0281     { .data = {0x0F, 0x40} },
0282     { .data = {0x10, 0x40} },
0283     { .data = {0x11, 0x50} },
0284     { .data = {0x12, 0x60} },
0285     { .data = {0x13, 0x70} },
0286     { .data = {0x14, 0x58} },
0287     { .data = {0x15, 0x68} },
0288     { .data = {0x16, 0x78} },
0289     { .data = {0x17, 0x77} },
0290     { .data = {0x18, 0x39} },
0291     { .data = {0x19, 0x2D} },
0292     { .data = {0x1A, 0x2E} },
0293     { .data = {0x1B, 0x32} },
0294     { .data = {0x1C, 0x37} },
0295     { .data = {0x1D, 0x3A} },
0296     { .data = {0x1E, 0x40} },
0297     { .data = {0x1F, 0x40} },
0298     { .data = {0x20, 0x40} },
0299     { .data = {0x21, 0x40} },
0300     { .data = {0x22, 0x40} },
0301     { .data = {0x23, 0x40} },
0302     { .data = {0x24, 0x40} },
0303     { .data = {0x25, 0x40} },
0304     { .data = {0x26, 0x40} },
0305     { .data = {0x27, 0x40} },
0306     { .data = {0x28, 0x40} },
0307     { .data = {0x2D, 0x00} },
0308     { .data = {0x2F, 0x40} },
0309     { .data = {0x30, 0x40} },
0310     { .data = {0x31, 0x40} },
0311     { .data = {0x32, 0x40} },
0312     { .data = {0x33, 0x40} },
0313     { .data = {0x34, 0x40} },
0314     { .data = {0x35, 0x40} },
0315     { .data = {0x36, 0x40} },
0316     { .data = {0x37, 0x40} },
0317     { .data = {0x38, 0x40} },
0318     { .data = {0x39, 0x40} },
0319     { .data = {0x3A, 0x40} },
0320     { .data = {0x3B, 0x40} },
0321     { .data = {0x3D, 0x40} },
0322     { .data = {0x3F, 0x40} },
0323     { .data = {0x40, 0x40} },
0324     { .data = {0x41, 0x40} },
0325     { .data = {0x42, 0x40} },
0326     { .data = {0x43, 0x40} },
0327     { .data = {0x44, 0x40} },
0328     { .data = {0x45, 0x40} },
0329     { .data = {0x46, 0x40} },
0330     { .data = {0x47, 0x40} },
0331     { .data = {0x48, 0x40} },
0332     { .data = {0x49, 0x40} },
0333     { .data = {0x4A, 0x40} },
0334     { .data = {0x4B, 0x40} },
0335     { .data = {0x4C, 0x40} },
0336     { .data = {0x4D, 0x40} },
0337     { .data = {0x4E, 0x40} },
0338     { .data = {0x4F, 0x40} },
0339     { .data = {0x50, 0x40} },
0340     { .data = {0x51, 0x40} },
0341     { .data = {0x52, 0x40} },
0342     { .data = {0x53, 0x01} },
0343     { .data = {0x54, 0x01} },
0344     { .data = {0x55, 0xFE} },
0345     { .data = {0x56, 0x77} },
0346     { .data = {0x58, 0xCD} },
0347     { .data = {0x59, 0xD0} },
0348     { .data = {0x5A, 0xD0} },
0349     { .data = {0x5B, 0x50} },
0350     { .data = {0x5C, 0x50} },
0351     { .data = {0x5D, 0x50} },
0352     { .data = {0x5E, 0x50} },
0353     { .data = {0x5F, 0x50} },
0354     { .data = {0x60, 0x50} },
0355     { .data = {0x61, 0x50} },
0356     { .data = {0x62, 0x50} },
0357     { .data = {0x63, 0x50} },
0358     { .data = {0x64, 0x50} },
0359     { .data = {0x65, 0x50} },
0360     { .data = {0x66, 0x50} },
0361     { .data = {0x67, 0x50} },
0362     { .data = {0x68, 0x50} },
0363     { .data = {0x69, 0x50} },
0364     { .data = {0x6A, 0x50} },
0365     { .data = {0x6B, 0x50} },
0366     { .data = {0x6C, 0x50} },
0367     { .data = {0x6D, 0x50} },
0368     { .data = {0x6E, 0x50} },
0369     { .data = {0x6F, 0x50} },
0370     { .data = {0x70, 0x07} },
0371     { .data = {0x71, 0x00} },
0372     { .data = {0x72, 0x00} },
0373     { .data = {0x73, 0x00} },
0374     { .data = {0x74, 0x06} },
0375     { .data = {0x75, 0x0C} },
0376     { .data = {0x76, 0x03} },
0377     { .data = {0x77, 0x09} },
0378     { .data = {0x78, 0x0F} },
0379     { .data = {0x79, 0x68} },
0380     { .data = {0x7A, 0x88} },
0381     { .data = {0x7C, 0x80} },
0382     { .data = {0x7D, 0x80} },
0383     { .data = {0x7E, 0x80} },
0384     { .data = {0x7F, 0x00} },
0385     { .data = {0x80, 0x00} },
0386     { .data = {0x81, 0x00} },
0387     { .data = {0x83, 0x01} },
0388     { .data = {0x84, 0x00} },
0389     { .data = {0x85, 0x80} },
0390     { .data = {0x86, 0x80} },
0391     { .data = {0x87, 0x80} },
0392     { .data = {0x88, 0x40} },
0393     { .data = {0x89, 0x91} },
0394     { .data = {0x8A, 0x98} },
0395     { .data = {0x8B, 0x80} },
0396     { .data = {0x8C, 0x80} },
0397     { .data = {0x8D, 0x80} },
0398     { .data = {0x8E, 0x80} },
0399     { .data = {0x8F, 0x80} },
0400     { .data = {0x90, 0x80} },
0401     { .data = {0x91, 0x80} },
0402     { .data = {0x92, 0x80} },
0403     { .data = {0x93, 0x80} },
0404     { .data = {0x94, 0x80} },
0405     { .data = {0x95, 0x80} },
0406     { .data = {0x96, 0x80} },
0407     { .data = {0x97, 0x80} },
0408     { .data = {0x98, 0x80} },
0409     { .data = {0x99, 0x80} },
0410     { .data = {0x9A, 0x80} },
0411     { .data = {0x9B, 0x80} },
0412     { .data = {0x9C, 0x80} },
0413     { .data = {0x9D, 0x80} },
0414     { .data = {0x9E, 0x80} },
0415     { .data = {0x9F, 0x80} },
0416     { .data = {0xA0, 0x8A} },
0417     { .data = {0xA2, 0x80} },
0418     { .data = {0xA6, 0x80} },
0419     { .data = {0xA7, 0x80} },
0420     { .data = {0xA9, 0x80} },
0421     { .data = {0xAA, 0x80} },
0422     { .data = {0xAB, 0x80} },
0423     { .data = {0xAC, 0x80} },
0424     { .data = {0xAD, 0x80} },
0425     { .data = {0xAE, 0x80} },
0426     { .data = {0xAF, 0x80} },
0427     { .data = {0xB7, 0x76} },
0428     { .data = {0xB8, 0x76} },
0429     { .data = {0xB9, 0x05} },
0430     { .data = {0xBA, 0x0D} },
0431     { .data = {0xBB, 0x14} },
0432     { .data = {0xBC, 0x0F} },
0433     { .data = {0xBD, 0x18} },
0434     { .data = {0xBE, 0x1F} },
0435     { .data = {0xBF, 0x05} },
0436     { .data = {0xC0, 0x0D} },
0437     { .data = {0xC1, 0x14} },
0438     { .data = {0xC2, 0x03} },
0439     { .data = {0xC3, 0x07} },
0440     { .data = {0xC4, 0x0A} },
0441     { .data = {0xC5, 0xA0} },
0442     { .data = {0xC6, 0x55} },
0443     { .data = {0xC7, 0xFF} },
0444     { .data = {0xC8, 0x39} },
0445     { .data = {0xC9, 0x44} },
0446     { .data = {0xCA, 0x12} },
0447     { .data = {0xCD, 0x80} },
0448     { .data = {0xDB, 0x80} },
0449     { .data = {0xDC, 0x80} },
0450     { .data = {0xDD, 0x80} },
0451     { .data = {0xE0, 0x80} },
0452     { .data = {0xE1, 0x80} },
0453     { .data = {0xE2, 0x80} },
0454     { .data = {0xE3, 0x80} },
0455     { .data = {0xE4, 0x80} },
0456     { .data = {0xE5, 0x40} },
0457     { .data = {0xE6, 0x40} },
0458     { .data = {0xE7, 0x40} },
0459     { .data = {0xE8, 0x40} },
0460     { .data = {0xE9, 0x40} },
0461     { .data = {0xEA, 0x40} },
0462     { .data = {0xEB, 0x40} },
0463     { .data = {0xEC, 0x40} },
0464     { .data = {0xED, 0x40} },
0465     { .data = {0xEE, 0x40} },
0466     { .data = {0xEF, 0x40} },
0467     { .data = {0xF0, 0x40} },
0468     { .data = {0xF1, 0x40} },
0469     { .data = {0xF2, 0x40} },
0470     { .data = {0xF3, 0x40} },
0471     { .data = {0xF4, 0x40} },
0472     { .data = {0xF5, 0x40} },
0473     { .data = {0xF6, 0x40} },
0474     { .data = {0xFB, 0x1} },
0475     { .data = {0xFF, 0x23} },
0476     { .data = {0xFB, 0x01} },
0477     /* dimming enable */
0478     { .data = {0x01, 0x84} },
0479     { .data = {0x05, 0x2D} },
0480     { .data = {0x06, 0x00} },
0481      /* resolution 1080*2246 */
0482     { .data = {0x11, 0x01} },
0483     { .data = {0x12, 0x7B} },
0484     { .data = {0x15, 0x6F} },
0485     { .data = {0x16, 0x0B} },
0486      /* UI mode */
0487     { .data = {0x29, 0x0A} },
0488     { .data = {0x30, 0xFF} },
0489     { .data = {0x31, 0xFF} },
0490     { .data = {0x32, 0xFF} },
0491     { .data = {0x33, 0xFF} },
0492     { .data = {0x34, 0xFF} },
0493     { .data = {0x35, 0xFF} },
0494     { .data = {0x36, 0xFF} },
0495     { .data = {0x37, 0xFF} },
0496     { .data = {0x38, 0xFC} },
0497     { .data = {0x39, 0xF8} },
0498     { .data = {0x3A, 0xF4} },
0499     { .data = {0x3B, 0xF1} },
0500     { .data = {0x3D, 0xEE} },
0501     { .data = {0x3F, 0xEB} },
0502     { .data = {0x40, 0xE8} },
0503     { .data = {0x41, 0xE5} },
0504      /* STILL mode */
0505     { .data = {0x2A, 0x13} },
0506     { .data = {0x45, 0xFF} },
0507     { .data = {0x46, 0xFF} },
0508     { .data = {0x47, 0xFF} },
0509     { .data = {0x48, 0xFF} },
0510     { .data = {0x49, 0xFF} },
0511     { .data = {0x4A, 0xFF} },
0512     { .data = {0x4B, 0xFF} },
0513     { .data = {0x4C, 0xFF} },
0514     { .data = {0x4D, 0xED} },
0515     { .data = {0x4E, 0xD5} },
0516     { .data = {0x4F, 0xBF} },
0517     { .data = {0x50, 0xA6} },
0518     { .data = {0x51, 0x96} },
0519     { .data = {0x52, 0x86} },
0520     { .data = {0x53, 0x76} },
0521     { .data = {0x54, 0x66} },
0522      /* MOVING mode */
0523     { .data = {0x2B, 0x0E} },
0524     { .data = {0x58, 0xFF} },
0525     { .data = {0x59, 0xFF} },
0526     { .data = {0x5A, 0xFF} },
0527     { .data = {0x5B, 0xFF} },
0528     { .data = {0x5C, 0xFF} },
0529     { .data = {0x5D, 0xFF} },
0530     { .data = {0x5E, 0xFF} },
0531     { .data = {0x5F, 0xFF} },
0532     { .data = {0x60, 0xF6} },
0533     { .data = {0x61, 0xEA} },
0534     { .data = {0x62, 0xE1} },
0535     { .data = {0x63, 0xD8} },
0536     { .data = {0x64, 0xCE} },
0537     { .data = {0x65, 0xC3} },
0538     { .data = {0x66, 0xBA} },
0539     { .data = {0x67, 0xB3} },
0540     { .data = {0xFF, 0x25} },
0541     { .data = {0xFB, 0x01} },
0542     { .data = {0x05, 0x04} },
0543     { .data = {0xFF, 0x26} },
0544     { .data = {0xFB, 0x01} },
0545     { .data = {0x1C, 0xAF} },
0546     { .data = {0xFF, 0x10} },
0547     { .data = {0xFB, 0x01} },
0548     { .data = {0x51, 0xFF} },
0549     { .data = {0x53, 0x24} },
0550     { .data = {0x55, 0x00} },
0551 };
0552 
0553 static const struct nt36672a_panel_cmd tianma_fhd_video_on_cmds_2[] = {
0554     { .data = {0xFF, 0x24} },
0555     { .data = {0xFB, 0x01} },
0556     { .data = {0xC3, 0x01} },
0557     { .data = {0xC4, 0x54} },
0558     { .data = {0xFF, 0x10} },
0559 };
0560 
0561 static const struct nt36672a_panel_cmd tianma_fhd_video_off_cmds[] = {
0562     { .data = {0xFF, 0x24} },
0563     { .data = {0xFB, 0x01} },
0564     { .data = {0xC3, 0x01} },
0565     { .data = {0xFF, 0x10} },
0566 };
0567 
0568 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
0569     .clock      = 161331,
0570 
0571     .hdisplay   = 1080,
0572     .hsync_start    = 1080 + 40,
0573     .hsync_end  = 1080 + 40 + 20,
0574     .htotal     = 1080 + 40 + 20 + 44,
0575 
0576     .vdisplay   = 2246,
0577     .vsync_start    = 2246 + 15,
0578     .vsync_end  = 2246 + 15 + 2,
0579     .vtotal     = 2246 + 15 + 2 + 8,
0580 
0581     .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
0582 };
0583 
0584 static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
0585     .display_mode = &tianma_fhd_video_panel_default_mode,
0586 
0587     .width_mm = 68,
0588     .height_mm = 136,
0589 
0590     .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
0591             | MIPI_DSI_MODE_VIDEO_HSE
0592             | MIPI_DSI_CLOCK_NON_CONTINUOUS
0593             | MIPI_DSI_MODE_VIDEO_BURST,
0594     .format = MIPI_DSI_FMT_RGB888,
0595     .lanes = 4,
0596     .on_cmds_1 = tianma_fhd_video_on_cmds_1,
0597     .num_on_cmds_1 = ARRAY_SIZE(tianma_fhd_video_on_cmds_1),
0598     .on_cmds_2 = tianma_fhd_video_on_cmds_2,
0599     .num_on_cmds_2 = ARRAY_SIZE(tianma_fhd_video_on_cmds_2),
0600     .off_cmds = tianma_fhd_video_off_cmds,
0601     .num_off_cmds = ARRAY_SIZE(tianma_fhd_video_off_cmds),
0602 };
0603 
0604 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
0605 {
0606     struct device *dev = &pinfo->link->dev;
0607     int i, ret;
0608 
0609     for (i = 0; i < ARRAY_SIZE(pinfo->supplies); i++)
0610         pinfo->supplies[i].supply = nt36672a_regulator_names[i];
0611 
0612     ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pinfo->supplies),
0613                       pinfo->supplies);
0614     if (ret < 0)
0615         return dev_err_probe(dev, ret, "failed to get regulators\n");
0616 
0617     for (i = 0; i < ARRAY_SIZE(pinfo->supplies); i++) {
0618         ret = regulator_set_load(pinfo->supplies[i].consumer,
0619                      nt36672a_regulator_enable_loads[i]);
0620         if (ret)
0621             return dev_err_probe(dev, ret, "failed to set regulator enable loads\n");
0622     }
0623 
0624     pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
0625     if (IS_ERR(pinfo->reset_gpio))
0626         return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio),
0627                      "failed to get reset gpio from DT\n");
0628 
0629     drm_panel_init(&pinfo->base, dev, &panel_funcs, DRM_MODE_CONNECTOR_DSI);
0630 
0631     ret = drm_panel_of_backlight(&pinfo->base);
0632     if (ret)
0633         return dev_err_probe(dev, ret, "Failed to get backlight\n");
0634 
0635     drm_panel_add(&pinfo->base);
0636 
0637     return 0;
0638 }
0639 
0640 static int nt36672a_panel_probe(struct mipi_dsi_device *dsi)
0641 {
0642     struct nt36672a_panel *pinfo;
0643     const struct nt36672a_panel_desc *desc;
0644     int err;
0645 
0646     pinfo = devm_kzalloc(&dsi->dev, sizeof(*pinfo), GFP_KERNEL);
0647     if (!pinfo)
0648         return -ENOMEM;
0649 
0650     desc = of_device_get_match_data(&dsi->dev);
0651     dsi->mode_flags = desc->mode_flags;
0652     dsi->format = desc->format;
0653     dsi->lanes = desc->lanes;
0654     pinfo->desc = desc;
0655     pinfo->link = dsi;
0656 
0657     mipi_dsi_set_drvdata(dsi, pinfo);
0658 
0659     err = nt36672a_panel_add(pinfo);
0660     if (err < 0)
0661         return err;
0662 
0663     err = mipi_dsi_attach(dsi);
0664     if (err < 0) {
0665         drm_panel_remove(&pinfo->base);
0666         return err;
0667     }
0668 
0669     return 0;
0670 }
0671 
0672 static int nt36672a_panel_remove(struct mipi_dsi_device *dsi)
0673 {
0674     struct nt36672a_panel *pinfo = mipi_dsi_get_drvdata(dsi);
0675     int err;
0676 
0677     err = drm_panel_unprepare(&pinfo->base);
0678     if (err < 0)
0679         dev_err(&dsi->dev, "failed to unprepare panel: %d\n", err);
0680 
0681     err = drm_panel_disable(&pinfo->base);
0682     if (err < 0)
0683         dev_err(&dsi->dev, "failed to disable panel: %d\n", err);
0684 
0685     err = mipi_dsi_detach(dsi);
0686     if (err < 0)
0687         dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
0688 
0689     drm_panel_remove(&pinfo->base);
0690 
0691     return 0;
0692 }
0693 
0694 static void nt36672a_panel_shutdown(struct mipi_dsi_device *dsi)
0695 {
0696     struct nt36672a_panel *pinfo = mipi_dsi_get_drvdata(dsi);
0697 
0698     drm_panel_disable(&pinfo->base);
0699     drm_panel_unprepare(&pinfo->base);
0700 }
0701 
0702 static const struct of_device_id tianma_fhd_video_of_match[] = {
0703     { .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
0704     { },
0705 };
0706 MODULE_DEVICE_TABLE(of, tianma_fhd_video_of_match);
0707 
0708 static struct mipi_dsi_driver nt36672a_panel_driver = {
0709     .driver = {
0710         .name = "panel-tianma-nt36672a",
0711         .of_match_table = tianma_fhd_video_of_match,
0712     },
0713     .probe = nt36672a_panel_probe,
0714     .remove = nt36672a_panel_remove,
0715     .shutdown = nt36672a_panel_shutdown,
0716 };
0717 module_mipi_dsi_driver(nt36672a_panel_driver);
0718 
0719 MODULE_AUTHOR("Sumit Semwal <sumit.semwal@linaro.org>");
0720 MODULE_DESCRIPTION("NOVATEK NT36672A based MIPI-DSI LCD panel driver");
0721 MODULE_LICENSE("GPL");
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