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0024 #include <linux/debugfs.h>
0025 #include <linux/delay.h>
0026 #include <linux/gpio/consumer.h>
0027 #include <linux/iopoll.h>
0028 #include <linux/module.h>
0029 #include <linux/of_platform.h>
0030 #include <linux/platform_device.h>
0031 #include <linux/pm_runtime.h>
0032 #include <linux/regulator/consumer.h>
0033
0034 #include <video/display_timing.h>
0035 #include <video/of_display_timing.h>
0036 #include <video/videomode.h>
0037
0038 #include <drm/display/drm_dp_aux_bus.h>
0039 #include <drm/display/drm_dp_helper.h>
0040 #include <drm/drm_crtc.h>
0041 #include <drm/drm_device.h>
0042 #include <drm/drm_edid.h>
0043 #include <drm/drm_panel.h>
0044
0045
0046
0047
0048 struct panel_delay {
0049
0050
0051
0052
0053
0054
0055
0056
0057
0058
0059
0060
0061 unsigned int hpd_reliable;
0062
0063
0064
0065
0066
0067
0068
0069
0070
0071 unsigned int hpd_absent;
0072
0073
0074
0075
0076
0077
0078
0079
0080
0081
0082
0083
0084
0085
0086
0087
0088
0089
0090
0091
0092
0093
0094
0095
0096
0097
0098
0099
0100
0101
0102
0103
0104
0105 unsigned int prepare_to_enable;
0106
0107
0108
0109
0110
0111
0112
0113
0114
0115
0116
0117
0118 unsigned int enable;
0119
0120
0121
0122
0123
0124
0125
0126
0127
0128
0129 unsigned int disable;
0130
0131
0132
0133
0134
0135
0136
0137
0138
0139
0140
0141
0142
0143
0144 unsigned int unprepare;
0145 };
0146
0147
0148
0149
0150 struct panel_desc {
0151
0152
0153
0154
0155
0156
0157
0158 const struct drm_display_mode *modes;
0159
0160
0161 unsigned int num_modes;
0162
0163
0164
0165
0166
0167
0168
0169 const struct display_timing *timings;
0170
0171
0172 unsigned int num_timings;
0173
0174
0175 unsigned int bpc;
0176
0177
0178 struct {
0179
0180
0181
0182 unsigned int width;
0183
0184
0185
0186
0187 unsigned int height;
0188 } size;
0189
0190
0191 struct panel_delay delay;
0192 };
0193
0194
0195
0196
0197 struct edp_panel_entry {
0198
0199 u32 panel_id;
0200
0201
0202 const struct panel_delay *delay;
0203
0204
0205 const char *name;
0206 };
0207
0208 struct panel_edp {
0209 struct drm_panel base;
0210 bool enabled;
0211 bool no_hpd;
0212
0213 bool prepared;
0214
0215 ktime_t prepared_time;
0216 ktime_t unprepared_time;
0217
0218 const struct panel_desc *desc;
0219
0220 struct regulator *supply;
0221 struct i2c_adapter *ddc;
0222 struct drm_dp_aux *aux;
0223
0224 struct gpio_desc *enable_gpio;
0225 struct gpio_desc *hpd_gpio;
0226
0227 const struct edp_panel_entry *detected_panel;
0228
0229 struct edid *edid;
0230
0231 struct drm_display_mode override_mode;
0232
0233 enum drm_panel_orientation orientation;
0234 };
0235
0236 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)
0237 {
0238 return container_of(panel, struct panel_edp, base);
0239 }
0240
0241 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,
0242 struct drm_connector *connector)
0243 {
0244 struct drm_display_mode *mode;
0245 unsigned int i, num = 0;
0246
0247 for (i = 0; i < panel->desc->num_timings; i++) {
0248 const struct display_timing *dt = &panel->desc->timings[i];
0249 struct videomode vm;
0250
0251 videomode_from_timing(dt, &vm);
0252 mode = drm_mode_create(connector->dev);
0253 if (!mode) {
0254 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
0255 dt->hactive.typ, dt->vactive.typ);
0256 continue;
0257 }
0258
0259 drm_display_mode_from_videomode(&vm, mode);
0260
0261 mode->type |= DRM_MODE_TYPE_DRIVER;
0262
0263 if (panel->desc->num_timings == 1)
0264 mode->type |= DRM_MODE_TYPE_PREFERRED;
0265
0266 drm_mode_probed_add(connector, mode);
0267 num++;
0268 }
0269
0270 return num;
0271 }
0272
0273 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,
0274 struct drm_connector *connector)
0275 {
0276 struct drm_display_mode *mode;
0277 unsigned int i, num = 0;
0278
0279 for (i = 0; i < panel->desc->num_modes; i++) {
0280 const struct drm_display_mode *m = &panel->desc->modes[i];
0281
0282 mode = drm_mode_duplicate(connector->dev, m);
0283 if (!mode) {
0284 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
0285 m->hdisplay, m->vdisplay,
0286 drm_mode_vrefresh(m));
0287 continue;
0288 }
0289
0290 mode->type |= DRM_MODE_TYPE_DRIVER;
0291
0292 if (panel->desc->num_modes == 1)
0293 mode->type |= DRM_MODE_TYPE_PREFERRED;
0294
0295 drm_mode_set_name(mode);
0296
0297 drm_mode_probed_add(connector, mode);
0298 num++;
0299 }
0300
0301 return num;
0302 }
0303
0304 static int panel_edp_get_non_edid_modes(struct panel_edp *panel,
0305 struct drm_connector *connector)
0306 {
0307 struct drm_display_mode *mode;
0308 bool has_override = panel->override_mode.type;
0309 unsigned int num = 0;
0310
0311 if (!panel->desc)
0312 return 0;
0313
0314 if (has_override) {
0315 mode = drm_mode_duplicate(connector->dev,
0316 &panel->override_mode);
0317 if (mode) {
0318 drm_mode_probed_add(connector, mode);
0319 num = 1;
0320 } else {
0321 dev_err(panel->base.dev, "failed to add override mode\n");
0322 }
0323 }
0324
0325
0326 if (num == 0 && panel->desc->num_timings)
0327 num = panel_edp_get_timings_modes(panel, connector);
0328
0329
0330
0331
0332
0333
0334
0335 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
0336 if (num == 0)
0337 num = panel_edp_get_display_modes(panel, connector);
0338
0339 connector->display_info.bpc = panel->desc->bpc;
0340 connector->display_info.width_mm = panel->desc->size.width;
0341 connector->display_info.height_mm = panel->desc->size.height;
0342
0343 return num;
0344 }
0345
0346 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)
0347 {
0348 ktime_t now_ktime, min_ktime;
0349
0350 if (!min_ms)
0351 return;
0352
0353 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));
0354 now_ktime = ktime_get();
0355
0356 if (ktime_before(now_ktime, min_ktime))
0357 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);
0358 }
0359
0360 static int panel_edp_disable(struct drm_panel *panel)
0361 {
0362 struct panel_edp *p = to_panel_edp(panel);
0363
0364 if (!p->enabled)
0365 return 0;
0366
0367 if (p->desc->delay.disable)
0368 msleep(p->desc->delay.disable);
0369
0370 p->enabled = false;
0371
0372 return 0;
0373 }
0374
0375 static int panel_edp_suspend(struct device *dev)
0376 {
0377 struct panel_edp *p = dev_get_drvdata(dev);
0378
0379 gpiod_set_value_cansleep(p->enable_gpio, 0);
0380 regulator_disable(p->supply);
0381 p->unprepared_time = ktime_get();
0382
0383 return 0;
0384 }
0385
0386 static int panel_edp_unprepare(struct drm_panel *panel)
0387 {
0388 struct panel_edp *p = to_panel_edp(panel);
0389 int ret;
0390
0391
0392 if (!p->prepared)
0393 return 0;
0394
0395 pm_runtime_mark_last_busy(panel->dev);
0396 ret = pm_runtime_put_autosuspend(panel->dev);
0397 if (ret < 0)
0398 return ret;
0399 p->prepared = false;
0400
0401 return 0;
0402 }
0403
0404 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)
0405 {
0406 int err;
0407
0408 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
0409 if (IS_ERR(p->hpd_gpio)) {
0410 err = PTR_ERR(p->hpd_gpio);
0411
0412 if (err != -EPROBE_DEFER)
0413 dev_err(dev, "failed to get 'hpd' GPIO: %d\n", err);
0414
0415 return err;
0416 }
0417
0418 return 0;
0419 }
0420
0421 static bool panel_edp_can_read_hpd(struct panel_edp *p)
0422 {
0423 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted));
0424 }
0425
0426 static int panel_edp_prepare_once(struct panel_edp *p)
0427 {
0428 struct device *dev = p->base.dev;
0429 unsigned int delay;
0430 int err;
0431 int hpd_asserted;
0432 unsigned long hpd_wait_us;
0433
0434 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);
0435
0436 err = regulator_enable(p->supply);
0437 if (err < 0) {
0438 dev_err(dev, "failed to enable supply: %d\n", err);
0439 return err;
0440 }
0441
0442 gpiod_set_value_cansleep(p->enable_gpio, 1);
0443
0444 delay = p->desc->delay.hpd_reliable;
0445 if (p->no_hpd)
0446 delay = max(delay, p->desc->delay.hpd_absent);
0447 if (delay)
0448 msleep(delay);
0449
0450 if (panel_edp_can_read_hpd(p)) {
0451 if (p->desc->delay.hpd_absent)
0452 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;
0453 else
0454 hpd_wait_us = 2000000;
0455
0456 if (p->hpd_gpio) {
0457 err = readx_poll_timeout(gpiod_get_value_cansleep,
0458 p->hpd_gpio, hpd_asserted,
0459 hpd_asserted, 1000, hpd_wait_us);
0460 if (hpd_asserted < 0)
0461 err = hpd_asserted;
0462 } else {
0463 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us);
0464 }
0465
0466 if (err) {
0467 if (err != -ETIMEDOUT)
0468 dev_err(dev,
0469 "error waiting for hpd GPIO: %d\n", err);
0470 goto error;
0471 }
0472 }
0473
0474 p->prepared_time = ktime_get();
0475
0476 return 0;
0477
0478 error:
0479 gpiod_set_value_cansleep(p->enable_gpio, 0);
0480 regulator_disable(p->supply);
0481 p->unprepared_time = ktime_get();
0482
0483 return err;
0484 }
0485
0486
0487
0488
0489
0490 #define MAX_PANEL_PREPARE_TRIES 5
0491
0492 static int panel_edp_resume(struct device *dev)
0493 {
0494 struct panel_edp *p = dev_get_drvdata(dev);
0495 int ret;
0496 int try;
0497
0498 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {
0499 ret = panel_edp_prepare_once(p);
0500 if (ret != -ETIMEDOUT)
0501 break;
0502 }
0503
0504 if (ret == -ETIMEDOUT)
0505 dev_err(dev, "Prepare timeout after %d tries\n", try);
0506 else if (try)
0507 dev_warn(dev, "Prepare needed %d retries\n", try);
0508
0509 return ret;
0510 }
0511
0512 static int panel_edp_prepare(struct drm_panel *panel)
0513 {
0514 struct panel_edp *p = to_panel_edp(panel);
0515 int ret;
0516
0517
0518 if (p->prepared)
0519 return 0;
0520
0521 ret = pm_runtime_get_sync(panel->dev);
0522 if (ret < 0) {
0523 pm_runtime_put_autosuspend(panel->dev);
0524 return ret;
0525 }
0526
0527 p->prepared = true;
0528
0529 return 0;
0530 }
0531
0532 static int panel_edp_enable(struct drm_panel *panel)
0533 {
0534 struct panel_edp *p = to_panel_edp(panel);
0535 unsigned int delay;
0536
0537 if (p->enabled)
0538 return 0;
0539
0540 delay = p->desc->delay.enable;
0541
0542
0543
0544
0545
0546
0547
0548
0549
0550
0551
0552
0553
0554
0555
0556
0557
0558
0559 if (p->desc->delay.prepare_to_enable &&
0560 !panel_edp_can_read_hpd(p) && !p->no_hpd)
0561 delay = max(delay, p->desc->delay.prepare_to_enable);
0562
0563 if (delay)
0564 msleep(delay);
0565
0566 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);
0567
0568 p->enabled = true;
0569
0570 return 0;
0571 }
0572
0573 static int panel_edp_get_modes(struct drm_panel *panel,
0574 struct drm_connector *connector)
0575 {
0576 struct panel_edp *p = to_panel_edp(panel);
0577 int num = 0;
0578
0579
0580 if (p->ddc) {
0581 pm_runtime_get_sync(panel->dev);
0582
0583 if (!p->edid)
0584 p->edid = drm_get_edid(connector, p->ddc);
0585
0586 if (p->edid)
0587 num += drm_add_edid_modes(connector, p->edid);
0588
0589 pm_runtime_mark_last_busy(panel->dev);
0590 pm_runtime_put_autosuspend(panel->dev);
0591 }
0592
0593
0594
0595
0596
0597
0598 if (p->desc->num_timings || p->desc->num_modes)
0599 num += panel_edp_get_non_edid_modes(p, connector);
0600 else if (!num)
0601 dev_warn(p->base.dev, "No display modes\n");
0602
0603
0604
0605
0606
0607 drm_connector_set_panel_orientation(connector, p->orientation);
0608
0609 return num;
0610 }
0611
0612 static int panel_edp_get_timings(struct drm_panel *panel,
0613 unsigned int num_timings,
0614 struct display_timing *timings)
0615 {
0616 struct panel_edp *p = to_panel_edp(panel);
0617 unsigned int i;
0618
0619 if (p->desc->num_timings < num_timings)
0620 num_timings = p->desc->num_timings;
0621
0622 if (timings)
0623 for (i = 0; i < num_timings; i++)
0624 timings[i] = p->desc->timings[i];
0625
0626 return p->desc->num_timings;
0627 }
0628
0629 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel)
0630 {
0631 struct panel_edp *p = to_panel_edp(panel);
0632
0633 return p->orientation;
0634 }
0635
0636 static int detected_panel_show(struct seq_file *s, void *data)
0637 {
0638 struct drm_panel *panel = s->private;
0639 struct panel_edp *p = to_panel_edp(panel);
0640
0641 if (IS_ERR(p->detected_panel))
0642 seq_puts(s, "UNKNOWN\n");
0643 else if (!p->detected_panel)
0644 seq_puts(s, "HARDCODED\n");
0645 else
0646 seq_printf(s, "%s\n", p->detected_panel->name);
0647
0648 return 0;
0649 }
0650
0651 DEFINE_SHOW_ATTRIBUTE(detected_panel);
0652
0653 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)
0654 {
0655 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);
0656 }
0657
0658 static const struct drm_panel_funcs panel_edp_funcs = {
0659 .disable = panel_edp_disable,
0660 .unprepare = panel_edp_unprepare,
0661 .prepare = panel_edp_prepare,
0662 .enable = panel_edp_enable,
0663 .get_modes = panel_edp_get_modes,
0664 .get_orientation = panel_edp_get_orientation,
0665 .get_timings = panel_edp_get_timings,
0666 .debugfs_init = panel_edp_debugfs_init,
0667 };
0668
0669 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \
0670 (to_check->field.typ >= bounds->field.min && \
0671 to_check->field.typ <= bounds->field.max)
0672 static void panel_edp_parse_panel_timing_node(struct device *dev,
0673 struct panel_edp *panel,
0674 const struct display_timing *ot)
0675 {
0676 const struct panel_desc *desc = panel->desc;
0677 struct videomode vm;
0678 unsigned int i;
0679
0680 if (WARN_ON(desc->num_modes)) {
0681 dev_err(dev, "Reject override mode: panel has a fixed mode\n");
0682 return;
0683 }
0684 if (WARN_ON(!desc->num_timings)) {
0685 dev_err(dev, "Reject override mode: no timings specified\n");
0686 return;
0687 }
0688
0689 for (i = 0; i < panel->desc->num_timings; i++) {
0690 const struct display_timing *dt = &panel->desc->timings[i];
0691
0692 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||
0693 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||
0694 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||
0695 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||
0696 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||
0697 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||
0698 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||
0699 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))
0700 continue;
0701
0702 if (ot->flags != dt->flags)
0703 continue;
0704
0705 videomode_from_timing(ot, &vm);
0706 drm_display_mode_from_videomode(&vm, &panel->override_mode);
0707 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
0708 DRM_MODE_TYPE_PREFERRED;
0709 break;
0710 }
0711
0712 if (WARN_ON(!panel->override_mode.type))
0713 dev_err(dev, "Reject override mode: No display_timing found\n");
0714 }
0715
0716 static const struct edp_panel_entry *find_edp_panel(u32 panel_id);
0717
0718 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)
0719 {
0720 struct panel_desc *desc;
0721 u32 panel_id;
0722 char vend[4];
0723 u16 product_id;
0724 u32 reliable_ms = 0;
0725 u32 absent_ms = 0;
0726 int ret;
0727
0728 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
0729 if (!desc)
0730 return -ENOMEM;
0731 panel->desc = desc;
0732
0733
0734
0735
0736
0737
0738 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);
0739 desc->delay.hpd_reliable = reliable_ms;
0740 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);
0741 desc->delay.hpd_absent = absent_ms;
0742
0743
0744 ret = pm_runtime_get_sync(dev);
0745 if (ret < 0) {
0746 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret);
0747 goto exit;
0748 }
0749
0750 panel_id = drm_edid_get_panel_id(panel->ddc);
0751 if (!panel_id) {
0752 dev_err(dev, "Couldn't identify panel via EDID\n");
0753 ret = -EIO;
0754 goto exit;
0755 }
0756 drm_edid_decode_panel_id(panel_id, vend, &product_id);
0757
0758 panel->detected_panel = find_edp_panel(panel_id);
0759
0760
0761
0762
0763
0764
0765 if (WARN_ON(!panel->detected_panel)) {
0766 dev_warn(dev,
0767 "Unknown panel %s %#06x, using conservative timings\n",
0768 vend, product_id);
0769
0770
0771
0772
0773
0774
0775
0776
0777
0778
0779
0780
0781
0782
0783
0784
0785 desc->delay.unprepare = 2000;
0786 desc->delay.enable = 200;
0787
0788 panel->detected_panel = ERR_PTR(-EINVAL);
0789 } else {
0790 dev_info(dev, "Detected %s %s (%#06x)\n",
0791 vend, panel->detected_panel->name, product_id);
0792
0793
0794 desc->delay = *panel->detected_panel->delay;
0795 }
0796
0797 ret = 0;
0798 exit:
0799 pm_runtime_mark_last_busy(dev);
0800 pm_runtime_put_autosuspend(dev);
0801
0802 return ret;
0803 }
0804
0805 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
0806 struct drm_dp_aux *aux)
0807 {
0808 struct panel_edp *panel;
0809 struct display_timing dt;
0810 struct device_node *ddc;
0811 int err;
0812
0813 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
0814 if (!panel)
0815 return -ENOMEM;
0816
0817 panel->enabled = false;
0818 panel->prepared_time = 0;
0819 panel->desc = desc;
0820 panel->aux = aux;
0821
0822 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
0823 if (!panel->no_hpd) {
0824 err = panel_edp_get_hpd_gpio(dev, panel);
0825 if (err)
0826 return err;
0827 }
0828
0829 panel->supply = devm_regulator_get(dev, "power");
0830 if (IS_ERR(panel->supply))
0831 return PTR_ERR(panel->supply);
0832
0833 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
0834 GPIOD_OUT_LOW);
0835 if (IS_ERR(panel->enable_gpio)) {
0836 err = PTR_ERR(panel->enable_gpio);
0837 if (err != -EPROBE_DEFER)
0838 dev_err(dev, "failed to request GPIO: %d\n", err);
0839 return err;
0840 }
0841
0842 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
0843 if (err) {
0844 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
0845 return err;
0846 }
0847
0848 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
0849 if (ddc) {
0850 panel->ddc = of_find_i2c_adapter_by_node(ddc);
0851 of_node_put(ddc);
0852
0853 if (!panel->ddc)
0854 return -EPROBE_DEFER;
0855 } else if (aux) {
0856 panel->ddc = &aux->ddc;
0857 }
0858
0859 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
0860 panel_edp_parse_panel_timing_node(dev, panel, &dt);
0861
0862 dev_set_drvdata(dev, panel);
0863
0864 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);
0865
0866 err = drm_panel_of_backlight(&panel->base);
0867 if (err)
0868 goto err_finished_ddc_init;
0869
0870
0871
0872
0873
0874
0875
0876 pm_runtime_enable(dev);
0877 pm_runtime_set_autosuspend_delay(dev, 1000);
0878 pm_runtime_use_autosuspend(dev);
0879
0880 if (of_device_is_compatible(dev->of_node, "edp-panel")) {
0881 err = generic_edp_panel_probe(dev, panel);
0882 if (err) {
0883 dev_err_probe(dev, err,
0884 "Couldn't detect panel nor find a fallback\n");
0885 goto err_finished_pm_runtime;
0886 }
0887
0888 desc = panel->desc;
0889 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {
0890 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);
0891 }
0892
0893 if (!panel->base.backlight && panel->aux) {
0894 pm_runtime_get_sync(dev);
0895 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);
0896 pm_runtime_mark_last_busy(dev);
0897 pm_runtime_put_autosuspend(dev);
0898 if (err)
0899 goto err_finished_pm_runtime;
0900 }
0901
0902 drm_panel_add(&panel->base);
0903
0904 return 0;
0905
0906 err_finished_pm_runtime:
0907 pm_runtime_dont_use_autosuspend(dev);
0908 pm_runtime_disable(dev);
0909 err_finished_ddc_init:
0910 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
0911 put_device(&panel->ddc->dev);
0912
0913 return err;
0914 }
0915
0916 static int panel_edp_remove(struct device *dev)
0917 {
0918 struct panel_edp *panel = dev_get_drvdata(dev);
0919
0920 drm_panel_remove(&panel->base);
0921 drm_panel_disable(&panel->base);
0922 drm_panel_unprepare(&panel->base);
0923
0924 pm_runtime_dont_use_autosuspend(dev);
0925 pm_runtime_disable(dev);
0926 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
0927 put_device(&panel->ddc->dev);
0928
0929 kfree(panel->edid);
0930 panel->edid = NULL;
0931
0932 return 0;
0933 }
0934
0935 static void panel_edp_shutdown(struct device *dev)
0936 {
0937 struct panel_edp *panel = dev_get_drvdata(dev);
0938
0939 drm_panel_disable(&panel->base);
0940 drm_panel_unprepare(&panel->base);
0941 }
0942
0943 static const struct display_timing auo_b101ean01_timing = {
0944 .pixelclock = { 65300000, 72500000, 75000000 },
0945 .hactive = { 1280, 1280, 1280 },
0946 .hfront_porch = { 18, 119, 119 },
0947 .hback_porch = { 21, 21, 21 },
0948 .hsync_len = { 32, 32, 32 },
0949 .vactive = { 800, 800, 800 },
0950 .vfront_porch = { 4, 4, 4 },
0951 .vback_porch = { 8, 8, 8 },
0952 .vsync_len = { 18, 20, 20 },
0953 };
0954
0955 static const struct panel_desc auo_b101ean01 = {
0956 .timings = &auo_b101ean01_timing,
0957 .num_timings = 1,
0958 .bpc = 6,
0959 .size = {
0960 .width = 217,
0961 .height = 136,
0962 },
0963 };
0964
0965 static const struct drm_display_mode auo_b116xak01_mode = {
0966 .clock = 69300,
0967 .hdisplay = 1366,
0968 .hsync_start = 1366 + 48,
0969 .hsync_end = 1366 + 48 + 32,
0970 .htotal = 1366 + 48 + 32 + 10,
0971 .vdisplay = 768,
0972 .vsync_start = 768 + 4,
0973 .vsync_end = 768 + 4 + 6,
0974 .vtotal = 768 + 4 + 6 + 15,
0975 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
0976 };
0977
0978 static const struct panel_desc auo_b116xak01 = {
0979 .modes = &auo_b116xak01_mode,
0980 .num_modes = 1,
0981 .bpc = 6,
0982 .size = {
0983 .width = 256,
0984 .height = 144,
0985 },
0986 .delay = {
0987 .hpd_absent = 200,
0988 },
0989 };
0990
0991 static const struct drm_display_mode auo_b116xw03_mode = {
0992 .clock = 70589,
0993 .hdisplay = 1366,
0994 .hsync_start = 1366 + 40,
0995 .hsync_end = 1366 + 40 + 40,
0996 .htotal = 1366 + 40 + 40 + 32,
0997 .vdisplay = 768,
0998 .vsync_start = 768 + 10,
0999 .vsync_end = 768 + 10 + 12,
1000 .vtotal = 768 + 10 + 12 + 6,
1001 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1002 };
1003
1004 static const struct panel_desc auo_b116xw03 = {
1005 .modes = &auo_b116xw03_mode,
1006 .num_modes = 1,
1007 .bpc = 6,
1008 .size = {
1009 .width = 256,
1010 .height = 144,
1011 },
1012 .delay = {
1013 .enable = 400,
1014 },
1015 };
1016
1017 static const struct drm_display_mode auo_b133han05_mode = {
1018 .clock = 142600,
1019 .hdisplay = 1920,
1020 .hsync_start = 1920 + 58,
1021 .hsync_end = 1920 + 58 + 42,
1022 .htotal = 1920 + 58 + 42 + 60,
1023 .vdisplay = 1080,
1024 .vsync_start = 1080 + 3,
1025 .vsync_end = 1080 + 3 + 5,
1026 .vtotal = 1080 + 3 + 5 + 54,
1027 };
1028
1029 static const struct panel_desc auo_b133han05 = {
1030 .modes = &auo_b133han05_mode,
1031 .num_modes = 1,
1032 .bpc = 8,
1033 .size = {
1034 .width = 293,
1035 .height = 165,
1036 },
1037 .delay = {
1038 .hpd_reliable = 100,
1039 .enable = 20,
1040 .unprepare = 50,
1041 },
1042 };
1043
1044 static const struct drm_display_mode auo_b133htn01_mode = {
1045 .clock = 150660,
1046 .hdisplay = 1920,
1047 .hsync_start = 1920 + 172,
1048 .hsync_end = 1920 + 172 + 80,
1049 .htotal = 1920 + 172 + 80 + 60,
1050 .vdisplay = 1080,
1051 .vsync_start = 1080 + 25,
1052 .vsync_end = 1080 + 25 + 10,
1053 .vtotal = 1080 + 25 + 10 + 10,
1054 };
1055
1056 static const struct panel_desc auo_b133htn01 = {
1057 .modes = &auo_b133htn01_mode,
1058 .num_modes = 1,
1059 .bpc = 6,
1060 .size = {
1061 .width = 293,
1062 .height = 165,
1063 },
1064 .delay = {
1065 .hpd_reliable = 105,
1066 .enable = 20,
1067 .unprepare = 50,
1068 },
1069 };
1070
1071 static const struct drm_display_mode auo_b133xtn01_mode = {
1072 .clock = 69500,
1073 .hdisplay = 1366,
1074 .hsync_start = 1366 + 48,
1075 .hsync_end = 1366 + 48 + 32,
1076 .htotal = 1366 + 48 + 32 + 20,
1077 .vdisplay = 768,
1078 .vsync_start = 768 + 3,
1079 .vsync_end = 768 + 3 + 6,
1080 .vtotal = 768 + 3 + 6 + 13,
1081 };
1082
1083 static const struct panel_desc auo_b133xtn01 = {
1084 .modes = &auo_b133xtn01_mode,
1085 .num_modes = 1,
1086 .bpc = 6,
1087 .size = {
1088 .width = 293,
1089 .height = 165,
1090 },
1091 };
1092
1093 static const struct drm_display_mode auo_b140han06_mode = {
1094 .clock = 141000,
1095 .hdisplay = 1920,
1096 .hsync_start = 1920 + 16,
1097 .hsync_end = 1920 + 16 + 16,
1098 .htotal = 1920 + 16 + 16 + 152,
1099 .vdisplay = 1080,
1100 .vsync_start = 1080 + 3,
1101 .vsync_end = 1080 + 3 + 14,
1102 .vtotal = 1080 + 3 + 14 + 19,
1103 };
1104
1105 static const struct panel_desc auo_b140han06 = {
1106 .modes = &auo_b140han06_mode,
1107 .num_modes = 1,
1108 .bpc = 8,
1109 .size = {
1110 .width = 309,
1111 .height = 174,
1112 },
1113 .delay = {
1114 .hpd_reliable = 100,
1115 .enable = 20,
1116 .unprepare = 50,
1117 },
1118 };
1119
1120 static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
1121 {
1122 .clock = 71900,
1123 .hdisplay = 1280,
1124 .hsync_start = 1280 + 48,
1125 .hsync_end = 1280 + 48 + 32,
1126 .htotal = 1280 + 48 + 32 + 80,
1127 .vdisplay = 800,
1128 .vsync_start = 800 + 3,
1129 .vsync_end = 800 + 3 + 5,
1130 .vtotal = 800 + 3 + 5 + 24,
1131 },
1132 {
1133 .clock = 57500,
1134 .hdisplay = 1280,
1135 .hsync_start = 1280 + 48,
1136 .hsync_end = 1280 + 48 + 32,
1137 .htotal = 1280 + 48 + 32 + 80,
1138 .vdisplay = 800,
1139 .vsync_start = 800 + 3,
1140 .vsync_end = 800 + 3 + 5,
1141 .vtotal = 800 + 3 + 5 + 24,
1142 },
1143 };
1144
1145 static const struct panel_desc boe_nv101wxmn51 = {
1146 .modes = boe_nv101wxmn51_modes,
1147 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
1148 .bpc = 8,
1149 .size = {
1150 .width = 217,
1151 .height = 136,
1152 },
1153 .delay = {
1154
1155 .hpd_reliable = 210,
1156 .enable = 50,
1157 .unprepare = 160,
1158 },
1159 };
1160
1161 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {
1162 {
1163 .clock = 207800,
1164 .hdisplay = 2160,
1165 .hsync_start = 2160 + 48,
1166 .hsync_end = 2160 + 48 + 32,
1167 .htotal = 2160 + 48 + 32 + 100,
1168 .vdisplay = 1440,
1169 .vsync_start = 1440 + 3,
1170 .vsync_end = 1440 + 3 + 6,
1171 .vtotal = 1440 + 3 + 6 + 31,
1172 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1173 },
1174 {
1175 .clock = 138500,
1176 .hdisplay = 2160,
1177 .hsync_start = 2160 + 48,
1178 .hsync_end = 2160 + 48 + 32,
1179 .htotal = 2160 + 48 + 32 + 100,
1180 .vdisplay = 1440,
1181 .vsync_start = 1440 + 3,
1182 .vsync_end = 1440 + 3 + 6,
1183 .vtotal = 1440 + 3 + 6 + 31,
1184 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1185 },
1186 };
1187
1188 static const struct panel_desc boe_nv110wtm_n61 = {
1189 .modes = boe_nv110wtm_n61_modes,
1190 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),
1191 .bpc = 8,
1192 .size = {
1193 .width = 233,
1194 .height = 155,
1195 },
1196 .delay = {
1197 .hpd_absent = 200,
1198 .prepare_to_enable = 80,
1199 .enable = 50,
1200 .unprepare = 500,
1201 },
1202 };
1203
1204
1205 static const struct drm_display_mode boe_nv133fhm_n61_modes = {
1206 .clock = 147840,
1207 .hdisplay = 1920,
1208 .hsync_start = 1920 + 48,
1209 .hsync_end = 1920 + 48 + 32,
1210 .htotal = 1920 + 48 + 32 + 200,
1211 .vdisplay = 1080,
1212 .vsync_start = 1080 + 3,
1213 .vsync_end = 1080 + 3 + 6,
1214 .vtotal = 1080 + 3 + 6 + 31,
1215 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1216 };
1217
1218
1219 static const struct panel_desc boe_nv133fhm_n61 = {
1220 .modes = &boe_nv133fhm_n61_modes,
1221 .num_modes = 1,
1222 .bpc = 6,
1223 .size = {
1224 .width = 294,
1225 .height = 165,
1226 },
1227 .delay = {
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238 .hpd_reliable = 15,
1239 .hpd_absent = 200,
1240
1241 .unprepare = 500,
1242 },
1243 };
1244
1245 static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
1246 {
1247 .clock = 148500,
1248 .hdisplay = 1920,
1249 .hsync_start = 1920 + 48,
1250 .hsync_end = 1920 + 48 + 32,
1251 .htotal = 2200,
1252 .vdisplay = 1080,
1253 .vsync_start = 1080 + 3,
1254 .vsync_end = 1080 + 3 + 5,
1255 .vtotal = 1125,
1256 },
1257 };
1258
1259 static const struct panel_desc boe_nv140fhmn49 = {
1260 .modes = boe_nv140fhmn49_modes,
1261 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
1262 .bpc = 6,
1263 .size = {
1264 .width = 309,
1265 .height = 174,
1266 },
1267 .delay = {
1268
1269 .hpd_reliable = 210,
1270 .enable = 50,
1271 .unprepare = 160,
1272 },
1273 };
1274
1275 static const struct drm_display_mode innolux_n116bca_ea1_mode = {
1276 .clock = 76420,
1277 .hdisplay = 1366,
1278 .hsync_start = 1366 + 136,
1279 .hsync_end = 1366 + 136 + 30,
1280 .htotal = 1366 + 136 + 30 + 60,
1281 .vdisplay = 768,
1282 .vsync_start = 768 + 8,
1283 .vsync_end = 768 + 8 + 12,
1284 .vtotal = 768 + 8 + 12 + 12,
1285 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1286 };
1287
1288 static const struct panel_desc innolux_n116bca_ea1 = {
1289 .modes = &innolux_n116bca_ea1_mode,
1290 .num_modes = 1,
1291 .bpc = 6,
1292 .size = {
1293 .width = 256,
1294 .height = 144,
1295 },
1296 .delay = {
1297 .hpd_absent = 200,
1298 .enable = 80,
1299 .disable = 50,
1300 .unprepare = 500,
1301 },
1302 };
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314 static const struct display_timing innolux_n116bge_timing = {
1315 .pixelclock = { 72600000, 76420000, 80240000 },
1316 .hactive = { 1366, 1366, 1366 },
1317 .hfront_porch = { 136, 136, 136 },
1318 .hback_porch = { 60, 60, 60 },
1319 .hsync_len = { 30, 30, 30 },
1320 .vactive = { 768, 768, 768 },
1321 .vfront_porch = { 8, 8, 8 },
1322 .vback_porch = { 12, 12, 12 },
1323 .vsync_len = { 12, 12, 12 },
1324 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1325 };
1326
1327 static const struct panel_desc innolux_n116bge = {
1328 .timings = &innolux_n116bge_timing,
1329 .num_timings = 1,
1330 .bpc = 6,
1331 .size = {
1332 .width = 256,
1333 .height = 144,
1334 },
1335 };
1336
1337 static const struct drm_display_mode innolux_n125hce_gn1_mode = {
1338 .clock = 162000,
1339 .hdisplay = 1920,
1340 .hsync_start = 1920 + 40,
1341 .hsync_end = 1920 + 40 + 40,
1342 .htotal = 1920 + 40 + 40 + 80,
1343 .vdisplay = 1080,
1344 .vsync_start = 1080 + 4,
1345 .vsync_end = 1080 + 4 + 4,
1346 .vtotal = 1080 + 4 + 4 + 24,
1347 };
1348
1349 static const struct panel_desc innolux_n125hce_gn1 = {
1350 .modes = &innolux_n125hce_gn1_mode,
1351 .num_modes = 1,
1352 .bpc = 8,
1353 .size = {
1354 .width = 276,
1355 .height = 155,
1356 },
1357 };
1358
1359 static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
1360 .clock = 206016,
1361 .hdisplay = 2160,
1362 .hsync_start = 2160 + 48,
1363 .hsync_end = 2160 + 48 + 32,
1364 .htotal = 2160 + 48 + 32 + 80,
1365 .vdisplay = 1440,
1366 .vsync_start = 1440 + 3,
1367 .vsync_end = 1440 + 3 + 10,
1368 .vtotal = 1440 + 3 + 10 + 27,
1369 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1370 };
1371
1372 static const struct panel_desc innolux_p120zdg_bf1 = {
1373 .modes = &innolux_p120zdg_bf1_mode,
1374 .num_modes = 1,
1375 .bpc = 8,
1376 .size = {
1377 .width = 254,
1378 .height = 169,
1379 },
1380 .delay = {
1381 .hpd_absent = 200,
1382 .unprepare = 500,
1383 },
1384 };
1385
1386 static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
1387 .clock = 138778,
1388 .hdisplay = 1920,
1389 .hsync_start = 1920 + 24,
1390 .hsync_end = 1920 + 24 + 48,
1391 .htotal = 1920 + 24 + 48 + 88,
1392 .vdisplay = 1080,
1393 .vsync_start = 1080 + 3,
1394 .vsync_end = 1080 + 3 + 12,
1395 .vtotal = 1080 + 3 + 12 + 17,
1396 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1397 };
1398
1399 static const struct panel_desc ivo_m133nwf4_r0 = {
1400 .modes = &ivo_m133nwf4_r0_mode,
1401 .num_modes = 1,
1402 .bpc = 8,
1403 .size = {
1404 .width = 294,
1405 .height = 165,
1406 },
1407 .delay = {
1408 .hpd_absent = 200,
1409 .unprepare = 500,
1410 },
1411 };
1412
1413 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
1414 .clock = 81000,
1415 .hdisplay = 1366,
1416 .hsync_start = 1366 + 40,
1417 .hsync_end = 1366 + 40 + 32,
1418 .htotal = 1366 + 40 + 32 + 62,
1419 .vdisplay = 768,
1420 .vsync_start = 768 + 5,
1421 .vsync_end = 768 + 5 + 5,
1422 .vtotal = 768 + 5 + 5 + 122,
1423 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1424 };
1425
1426 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
1427 .modes = &kingdisplay_kd116n21_30nv_a010_mode,
1428 .num_modes = 1,
1429 .bpc = 6,
1430 .size = {
1431 .width = 256,
1432 .height = 144,
1433 },
1434 .delay = {
1435 .hpd_absent = 200,
1436 },
1437 };
1438
1439 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1440 .clock = 200000,
1441 .hdisplay = 1536,
1442 .hsync_start = 1536 + 12,
1443 .hsync_end = 1536 + 12 + 16,
1444 .htotal = 1536 + 12 + 16 + 48,
1445 .vdisplay = 2048,
1446 .vsync_start = 2048 + 8,
1447 .vsync_end = 2048 + 8 + 4,
1448 .vtotal = 2048 + 8 + 4 + 8,
1449 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1450 };
1451
1452 static const struct panel_desc lg_lp079qx1_sp0v = {
1453 .modes = &lg_lp079qx1_sp0v_mode,
1454 .num_modes = 1,
1455 .size = {
1456 .width = 129,
1457 .height = 171,
1458 },
1459 };
1460
1461 static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1462 .clock = 205210,
1463 .hdisplay = 2048,
1464 .hsync_start = 2048 + 150,
1465 .hsync_end = 2048 + 150 + 5,
1466 .htotal = 2048 + 150 + 5 + 5,
1467 .vdisplay = 1536,
1468 .vsync_start = 1536 + 3,
1469 .vsync_end = 1536 + 3 + 1,
1470 .vtotal = 1536 + 3 + 1 + 9,
1471 };
1472
1473 static const struct panel_desc lg_lp097qx1_spa1 = {
1474 .modes = &lg_lp097qx1_spa1_mode,
1475 .num_modes = 1,
1476 .size = {
1477 .width = 208,
1478 .height = 147,
1479 },
1480 };
1481
1482 static const struct drm_display_mode lg_lp120up1_mode = {
1483 .clock = 162300,
1484 .hdisplay = 1920,
1485 .hsync_start = 1920 + 40,
1486 .hsync_end = 1920 + 40 + 40,
1487 .htotal = 1920 + 40 + 40 + 80,
1488 .vdisplay = 1280,
1489 .vsync_start = 1280 + 4,
1490 .vsync_end = 1280 + 4 + 4,
1491 .vtotal = 1280 + 4 + 4 + 12,
1492 };
1493
1494 static const struct panel_desc lg_lp120up1 = {
1495 .modes = &lg_lp120up1_mode,
1496 .num_modes = 1,
1497 .bpc = 8,
1498 .size = {
1499 .width = 267,
1500 .height = 183,
1501 },
1502 };
1503
1504 static const struct drm_display_mode lg_lp129qe_mode = {
1505 .clock = 285250,
1506 .hdisplay = 2560,
1507 .hsync_start = 2560 + 48,
1508 .hsync_end = 2560 + 48 + 32,
1509 .htotal = 2560 + 48 + 32 + 80,
1510 .vdisplay = 1700,
1511 .vsync_start = 1700 + 3,
1512 .vsync_end = 1700 + 3 + 10,
1513 .vtotal = 1700 + 3 + 10 + 36,
1514 };
1515
1516 static const struct panel_desc lg_lp129qe = {
1517 .modes = &lg_lp129qe_mode,
1518 .num_modes = 1,
1519 .bpc = 8,
1520 .size = {
1521 .width = 272,
1522 .height = 181,
1523 },
1524 };
1525
1526 static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
1527 {
1528 .clock = 138500,
1529 .hdisplay = 1920,
1530 .hsync_start = 1920 + 48,
1531 .hsync_end = 1920 + 48 + 32,
1532 .htotal = 1920 + 48 + 32 + 80,
1533 .vdisplay = 1080,
1534 .vsync_start = 1080 + 3,
1535 .vsync_end = 1080 + 3 + 5,
1536 .vtotal = 1080 + 3 + 5 + 23,
1537 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1538 }, {
1539 .clock = 110920,
1540 .hdisplay = 1920,
1541 .hsync_start = 1920 + 48,
1542 .hsync_end = 1920 + 48 + 32,
1543 .htotal = 1920 + 48 + 32 + 80,
1544 .vdisplay = 1080,
1545 .vsync_start = 1080 + 3,
1546 .vsync_end = 1080 + 3 + 5,
1547 .vtotal = 1080 + 3 + 5 + 23,
1548 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1549 }
1550 };
1551
1552 static const struct panel_desc neweast_wjfh116008a = {
1553 .modes = neweast_wjfh116008a_modes,
1554 .num_modes = 2,
1555 .bpc = 6,
1556 .size = {
1557 .width = 260,
1558 .height = 150,
1559 },
1560 .delay = {
1561 .hpd_reliable = 110,
1562 .enable = 20,
1563 .unprepare = 500,
1564 },
1565 };
1566
1567 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1568 .clock = 271560,
1569 .hdisplay = 2560,
1570 .hsync_start = 2560 + 48,
1571 .hsync_end = 2560 + 48 + 32,
1572 .htotal = 2560 + 48 + 32 + 80,
1573 .vdisplay = 1600,
1574 .vsync_start = 1600 + 2,
1575 .vsync_end = 1600 + 2 + 5,
1576 .vtotal = 1600 + 2 + 5 + 57,
1577 };
1578
1579 static const struct panel_desc samsung_lsn122dl01_c01 = {
1580 .modes = &samsung_lsn122dl01_c01_mode,
1581 .num_modes = 1,
1582 .size = {
1583 .width = 263,
1584 .height = 164,
1585 },
1586 };
1587
1588 static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1589 .clock = 76300,
1590 .hdisplay = 1366,
1591 .hsync_start = 1366 + 64,
1592 .hsync_end = 1366 + 64 + 48,
1593 .htotal = 1366 + 64 + 48 + 128,
1594 .vdisplay = 768,
1595 .vsync_start = 768 + 2,
1596 .vsync_end = 768 + 2 + 5,
1597 .vtotal = 768 + 2 + 5 + 17,
1598 };
1599
1600 static const struct panel_desc samsung_ltn140at29_301 = {
1601 .modes = &samsung_ltn140at29_301_mode,
1602 .num_modes = 1,
1603 .bpc = 6,
1604 .size = {
1605 .width = 320,
1606 .height = 187,
1607 },
1608 };
1609
1610 static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
1611 .clock = 168480,
1612 .hdisplay = 1920,
1613 .hsync_start = 1920 + 48,
1614 .hsync_end = 1920 + 48 + 32,
1615 .htotal = 1920 + 48 + 32 + 80,
1616 .vdisplay = 1280,
1617 .vsync_start = 1280 + 3,
1618 .vsync_end = 1280 + 3 + 10,
1619 .vtotal = 1280 + 3 + 10 + 57,
1620 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1621 };
1622
1623 static const struct panel_desc sharp_ld_d5116z01b = {
1624 .modes = &sharp_ld_d5116z01b_mode,
1625 .num_modes = 1,
1626 .bpc = 8,
1627 .size = {
1628 .width = 260,
1629 .height = 120,
1630 },
1631 };
1632
1633 static const struct display_timing sharp_lq123p1jx31_timing = {
1634 .pixelclock = { 252750000, 252750000, 266604720 },
1635 .hactive = { 2400, 2400, 2400 },
1636 .hfront_porch = { 48, 48, 48 },
1637 .hback_porch = { 80, 80, 84 },
1638 .hsync_len = { 32, 32, 32 },
1639 .vactive = { 1600, 1600, 1600 },
1640 .vfront_porch = { 3, 3, 3 },
1641 .vback_porch = { 33, 33, 120 },
1642 .vsync_len = { 10, 10, 10 },
1643 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1644 };
1645
1646 static const struct panel_desc sharp_lq123p1jx31 = {
1647 .timings = &sharp_lq123p1jx31_timing,
1648 .num_timings = 1,
1649 .bpc = 8,
1650 .size = {
1651 .width = 259,
1652 .height = 173,
1653 },
1654 .delay = {
1655 .hpd_reliable = 110,
1656 .enable = 50,
1657 .unprepare = 550,
1658 },
1659 };
1660
1661 static const struct drm_display_mode sharp_lq140m1jw46_mode[] = {
1662 {
1663 .clock = 346500,
1664 .hdisplay = 1920,
1665 .hsync_start = 1920 + 48,
1666 .hsync_end = 1920 + 48 + 32,
1667 .htotal = 1920 + 48 + 32 + 80,
1668 .vdisplay = 1080,
1669 .vsync_start = 1080 + 3,
1670 .vsync_end = 1080 + 3 + 5,
1671 .vtotal = 1080 + 3 + 5 + 69,
1672 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1673 }, {
1674 .clock = 144370,
1675 .hdisplay = 1920,
1676 .hsync_start = 1920 + 48,
1677 .hsync_end = 1920 + 48 + 32,
1678 .htotal = 1920 + 48 + 32 + 80,
1679 .vdisplay = 1080,
1680 .vsync_start = 1080 + 3,
1681 .vsync_end = 1080 + 3 + 5,
1682 .vtotal = 1080 + 3 + 5 + 69,
1683 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1684 },
1685 };
1686
1687 static const struct panel_desc sharp_lq140m1jw46 = {
1688 .modes = sharp_lq140m1jw46_mode,
1689 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode),
1690 .bpc = 8,
1691 .size = {
1692 .width = 309,
1693 .height = 174,
1694 },
1695 .delay = {
1696 .hpd_absent = 80,
1697 .enable = 50,
1698 .unprepare = 500,
1699 },
1700 };
1701
1702 static const struct drm_display_mode starry_kr122ea0sra_mode = {
1703 .clock = 147000,
1704 .hdisplay = 1920,
1705 .hsync_start = 1920 + 16,
1706 .hsync_end = 1920 + 16 + 16,
1707 .htotal = 1920 + 16 + 16 + 32,
1708 .vdisplay = 1200,
1709 .vsync_start = 1200 + 15,
1710 .vsync_end = 1200 + 15 + 2,
1711 .vtotal = 1200 + 15 + 2 + 18,
1712 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1713 };
1714
1715 static const struct panel_desc starry_kr122ea0sra = {
1716 .modes = &starry_kr122ea0sra_mode,
1717 .num_modes = 1,
1718 .size = {
1719 .width = 263,
1720 .height = 164,
1721 },
1722 .delay = {
1723
1724 .hpd_reliable = 10 + 200,
1725 .enable = 50,
1726 .unprepare = 10 + 500,
1727 },
1728 };
1729
1730 static const struct of_device_id platform_of_match[] = {
1731 {
1732
1733 .compatible = "edp-panel",
1734 }, {
1735 .compatible = "auo,b101ean01",
1736 .data = &auo_b101ean01,
1737 }, {
1738 .compatible = "auo,b116xa01",
1739 .data = &auo_b116xak01,
1740 }, {
1741 .compatible = "auo,b116xw03",
1742 .data = &auo_b116xw03,
1743 }, {
1744 .compatible = "auo,b133han05",
1745 .data = &auo_b133han05,
1746 }, {
1747 .compatible = "auo,b133htn01",
1748 .data = &auo_b133htn01,
1749 }, {
1750 .compatible = "auo,b133xtn01",
1751 .data = &auo_b133xtn01,
1752 }, {
1753 .compatible = "auo,b140han06",
1754 .data = &auo_b140han06,
1755 }, {
1756 .compatible = "boe,nv101wxmn51",
1757 .data = &boe_nv101wxmn51,
1758 }, {
1759 .compatible = "boe,nv110wtm-n61",
1760 .data = &boe_nv110wtm_n61,
1761 }, {
1762 .compatible = "boe,nv133fhm-n61",
1763 .data = &boe_nv133fhm_n61,
1764 }, {
1765 .compatible = "boe,nv133fhm-n62",
1766 .data = &boe_nv133fhm_n61,
1767 }, {
1768 .compatible = "boe,nv140fhmn49",
1769 .data = &boe_nv140fhmn49,
1770 }, {
1771 .compatible = "innolux,n116bca-ea1",
1772 .data = &innolux_n116bca_ea1,
1773 }, {
1774 .compatible = "innolux,n116bge",
1775 .data = &innolux_n116bge,
1776 }, {
1777 .compatible = "innolux,n125hce-gn1",
1778 .data = &innolux_n125hce_gn1,
1779 }, {
1780 .compatible = "innolux,p120zdg-bf1",
1781 .data = &innolux_p120zdg_bf1,
1782 }, {
1783 .compatible = "ivo,m133nwf4-r0",
1784 .data = &ivo_m133nwf4_r0,
1785 }, {
1786 .compatible = "kingdisplay,kd116n21-30nv-a010",
1787 .data = &kingdisplay_kd116n21_30nv_a010,
1788 }, {
1789 .compatible = "lg,lp079qx1-sp0v",
1790 .data = &lg_lp079qx1_sp0v,
1791 }, {
1792 .compatible = "lg,lp097qx1-spa1",
1793 .data = &lg_lp097qx1_spa1,
1794 }, {
1795 .compatible = "lg,lp120up1",
1796 .data = &lg_lp120up1,
1797 }, {
1798 .compatible = "lg,lp129qe",
1799 .data = &lg_lp129qe,
1800 }, {
1801 .compatible = "neweast,wjfh116008a",
1802 .data = &neweast_wjfh116008a,
1803 }, {
1804 .compatible = "samsung,lsn122dl01-c01",
1805 .data = &samsung_lsn122dl01_c01,
1806 }, {
1807 .compatible = "samsung,ltn140at29-301",
1808 .data = &samsung_ltn140at29_301,
1809 }, {
1810 .compatible = "sharp,ld-d5116z01b",
1811 .data = &sharp_ld_d5116z01b,
1812 }, {
1813 .compatible = "sharp,lq123p1jx31",
1814 .data = &sharp_lq123p1jx31,
1815 }, {
1816 .compatible = "sharp,lq140m1jw46",
1817 .data = &sharp_lq140m1jw46,
1818 }, {
1819 .compatible = "starry,kr122ea0sra",
1820 .data = &starry_kr122ea0sra,
1821 }, {
1822
1823 }
1824 };
1825 MODULE_DEVICE_TABLE(of, platform_of_match);
1826
1827 static const struct panel_delay delay_200_500_p2e80 = {
1828 .hpd_absent = 200,
1829 .unprepare = 500,
1830 .prepare_to_enable = 80,
1831 };
1832
1833 static const struct panel_delay delay_200_500_p2e100 = {
1834 .hpd_absent = 200,
1835 .unprepare = 500,
1836 .prepare_to_enable = 100,
1837 };
1838
1839 static const struct panel_delay delay_200_500_e50 = {
1840 .hpd_absent = 200,
1841 .unprepare = 500,
1842 .enable = 50,
1843 };
1844
1845 static const struct panel_delay delay_200_500_e80_d50 = {
1846 .hpd_absent = 200,
1847 .unprepare = 500,
1848 .enable = 80,
1849 .disable = 50,
1850 };
1851
1852 static const struct panel_delay delay_100_500_e200 = {
1853 .hpd_absent = 100,
1854 .unprepare = 500,
1855 .enable = 200,
1856 };
1857
1858 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \
1859 { \
1860 .name = _name, \
1861 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
1862 product_id), \
1863 .delay = _delay \
1864 }
1865
1866
1867
1868
1869
1870
1871
1872
1873 static const struct edp_panel_entry edp_panels[] = {
1874 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01"),
1875 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),
1876 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
1877
1878 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),
1879 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),
1880 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),
1881 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),
1882 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),
1883
1884 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),
1885
1886 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),
1887 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),
1888
1889 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
1890 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"),
1891 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
1892
1893 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),
1894
1895 { }
1896 };
1897
1898 static const struct edp_panel_entry *find_edp_panel(u32 panel_id)
1899 {
1900 const struct edp_panel_entry *panel;
1901
1902 if (!panel_id)
1903 return NULL;
1904
1905 for (panel = edp_panels; panel->panel_id; panel++)
1906 if (panel->panel_id == panel_id)
1907 return panel;
1908
1909 return NULL;
1910 }
1911
1912 static int panel_edp_platform_probe(struct platform_device *pdev)
1913 {
1914 const struct of_device_id *id;
1915
1916
1917 id = of_match_node(platform_of_match + 1, pdev->dev.of_node);
1918 if (!id)
1919 return -ENODEV;
1920
1921 return panel_edp_probe(&pdev->dev, id->data, NULL);
1922 }
1923
1924 static int panel_edp_platform_remove(struct platform_device *pdev)
1925 {
1926 return panel_edp_remove(&pdev->dev);
1927 }
1928
1929 static void panel_edp_platform_shutdown(struct platform_device *pdev)
1930 {
1931 panel_edp_shutdown(&pdev->dev);
1932 }
1933
1934 static const struct dev_pm_ops panel_edp_pm_ops = {
1935 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)
1936 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1937 pm_runtime_force_resume)
1938 };
1939
1940 static struct platform_driver panel_edp_platform_driver = {
1941 .driver = {
1942 .name = "panel-edp",
1943 .of_match_table = platform_of_match,
1944 .pm = &panel_edp_pm_ops,
1945 },
1946 .probe = panel_edp_platform_probe,
1947 .remove = panel_edp_platform_remove,
1948 .shutdown = panel_edp_platform_shutdown,
1949 };
1950
1951 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)
1952 {
1953 const struct of_device_id *id;
1954
1955 id = of_match_node(platform_of_match, aux_ep->dev.of_node);
1956 if (!id)
1957 return -ENODEV;
1958
1959 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);
1960 }
1961
1962 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)
1963 {
1964 panel_edp_remove(&aux_ep->dev);
1965 }
1966
1967 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)
1968 {
1969 panel_edp_shutdown(&aux_ep->dev);
1970 }
1971
1972 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {
1973 .driver = {
1974 .name = "panel-simple-dp-aux",
1975 .of_match_table = platform_of_match,
1976 .pm = &panel_edp_pm_ops,
1977 },
1978 .probe = panel_edp_dp_aux_ep_probe,
1979 .remove = panel_edp_dp_aux_ep_remove,
1980 .shutdown = panel_edp_dp_aux_ep_shutdown,
1981 };
1982
1983 static int __init panel_edp_init(void)
1984 {
1985 int err;
1986
1987 err = platform_driver_register(&panel_edp_platform_driver);
1988 if (err < 0)
1989 return err;
1990
1991 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);
1992 if (err < 0)
1993 goto err_did_platform_register;
1994
1995 return 0;
1996
1997 err_did_platform_register:
1998 platform_driver_unregister(&panel_edp_platform_driver);
1999
2000 return err;
2001 }
2002 module_init(panel_edp_init);
2003
2004 static void __exit panel_edp_exit(void)
2005 {
2006 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);
2007 platform_driver_unregister(&panel_edp_platform_driver);
2008 }
2009 module_exit(panel_edp_exit);
2010
2011 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
2012 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");
2013 MODULE_LICENSE("GPL and additional rights");