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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2018 MediaTek Inc.
0004  * Author: Jitao Shi <jitao.shi@mediatek.com>
0005  */
0006 
0007 #include <linux/delay.h>
0008 #include <linux/gpio/consumer.h>
0009 #include <linux/module.h>
0010 #include <linux/of.h>
0011 #include <linux/of_device.h>
0012 #include <linux/regulator/consumer.h>
0013 
0014 #include <drm/drm_connector.h>
0015 #include <drm/drm_crtc.h>
0016 #include <drm/drm_mipi_dsi.h>
0017 #include <drm/drm_panel.h>
0018 
0019 #include <video/mipi_display.h>
0020 
0021 struct panel_desc {
0022     const struct drm_display_mode *modes;
0023     unsigned int bpc;
0024 
0025     /**
0026      * @width_mm: width of the panel's active display area
0027      * @height_mm: height of the panel's active display area
0028      */
0029     struct {
0030         unsigned int width_mm;
0031         unsigned int height_mm;
0032     } size;
0033 
0034     unsigned long mode_flags;
0035     enum mipi_dsi_pixel_format format;
0036     const struct panel_init_cmd *init_cmds;
0037     unsigned int lanes;
0038     bool discharge_on_disable;
0039 };
0040 
0041 struct boe_panel {
0042     struct drm_panel base;
0043     struct mipi_dsi_device *dsi;
0044 
0045     const struct panel_desc *desc;
0046 
0047     enum drm_panel_orientation orientation;
0048     struct regulator *pp3300;
0049     struct regulator *pp1800;
0050     struct regulator *avee;
0051     struct regulator *avdd;
0052     struct gpio_desc *enable_gpio;
0053 
0054     bool prepared;
0055 };
0056 
0057 enum dsi_cmd_type {
0058     INIT_DCS_CMD,
0059     DELAY_CMD,
0060 };
0061 
0062 struct panel_init_cmd {
0063     enum dsi_cmd_type type;
0064     size_t len;
0065     const char *data;
0066 };
0067 
0068 #define _INIT_DCS_CMD(...) { \
0069     .type = INIT_DCS_CMD, \
0070     .len = sizeof((char[]){__VA_ARGS__}), \
0071     .data = (char[]){__VA_ARGS__} }
0072 
0073 #define _INIT_DELAY_CMD(...) { \
0074     .type = DELAY_CMD,\
0075     .len = sizeof((char[]){__VA_ARGS__}), \
0076     .data = (char[]){__VA_ARGS__} }
0077 
0078 static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
0079     _INIT_DCS_CMD(0xFF, 0x20),
0080     _INIT_DCS_CMD(0xFB, 0x01),
0081     _INIT_DCS_CMD(0x05, 0xD9),
0082     _INIT_DCS_CMD(0x07, 0x78),
0083     _INIT_DCS_CMD(0x08, 0x5A),
0084     _INIT_DCS_CMD(0x0D, 0x63),
0085     _INIT_DCS_CMD(0x0E, 0x91),
0086     _INIT_DCS_CMD(0x0F, 0x73),
0087     _INIT_DCS_CMD(0x95, 0xE6),
0088     _INIT_DCS_CMD(0x96, 0xF0),
0089     _INIT_DCS_CMD(0x30, 0x00),
0090     _INIT_DCS_CMD(0x6D, 0x66),
0091     _INIT_DCS_CMD(0x75, 0xA2),
0092     _INIT_DCS_CMD(0x77, 0x3B),
0093 
0094     _INIT_DCS_CMD(0xB0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
0095     _INIT_DCS_CMD(0xB1, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
0096     _INIT_DCS_CMD(0xB2, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
0097     _INIT_DCS_CMD(0xB3, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
0098 
0099     _INIT_DCS_CMD(0xB4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
0100     _INIT_DCS_CMD(0xB5, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
0101     _INIT_DCS_CMD(0xB6, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
0102     _INIT_DCS_CMD(0xB7, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
0103     _INIT_DCS_CMD(0xB8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4D, 0x00, 0x6D, 0x00, 0x89, 0x00, 0xA1, 0x00, 0xB6, 0x00, 0xC9),
0104     _INIT_DCS_CMD(0xB9, 0x00, 0xDA, 0x01, 0x13, 0x01, 0x3C, 0x01, 0x7E, 0x01, 0xAB, 0x01, 0xF7, 0x02, 0x2F, 0x02, 0x31),
0105     _INIT_DCS_CMD(0xBA, 0x02, 0x67, 0x02, 0xA6, 0x02, 0xD1, 0x03, 0x08, 0x03, 0x2E, 0x03, 0x5B, 0x03, 0x6B, 0x03, 0x7B),
0106     _INIT_DCS_CMD(0xBB, 0x03, 0x8E, 0x03, 0xA2, 0x03, 0xB7, 0x03, 0xE7, 0x03, 0xFD, 0x03, 0xFF),
0107 
0108     _INIT_DCS_CMD(0xFF, 0x21),
0109     _INIT_DCS_CMD(0xFB, 0x01),
0110 
0111     _INIT_DCS_CMD(0xB0, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
0112     _INIT_DCS_CMD(0xB1, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
0113     _INIT_DCS_CMD(0xB2, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
0114 
0115     _INIT_DCS_CMD(0xB3, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
0116     _INIT_DCS_CMD(0xB4, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
0117     _INIT_DCS_CMD(0xB5, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
0118     _INIT_DCS_CMD(0xB6, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
0119     _INIT_DCS_CMD(0xB7, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
0120 
0121     _INIT_DCS_CMD(0xB8, 0x00, 0x00, 0x00, 0x1B, 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, 0x99, 0x00, 0xAE, 0x00, 0xC1),
0122     _INIT_DCS_CMD(0xB9, 0x00, 0xD2, 0x01, 0x0B, 0x01, 0x34, 0x01, 0x76, 0x01, 0xA3, 0x01, 0xEF, 0x02, 0x27, 0x02, 0x29),
0123     _INIT_DCS_CMD(0xBA, 0x02, 0x5F, 0x02, 0x9E, 0x02, 0xC9, 0x03, 0x00, 0x03, 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73),
0124 
0125     _INIT_DCS_CMD(0xBB, 0x03, 0x86, 0x03, 0x9A, 0x03, 0xAF, 0x03, 0xDF, 0x03, 0xF5, 0x03, 0xE0),
0126     _INIT_DCS_CMD(0xFF, 0x24),
0127     _INIT_DCS_CMD(0xFB, 0x01),
0128 
0129     _INIT_DCS_CMD(0x00, 0x00),
0130     _INIT_DCS_CMD(0x01, 0x00),
0131 
0132     _INIT_DCS_CMD(0x02, 0x1C),
0133     _INIT_DCS_CMD(0x03, 0x1C),
0134 
0135     _INIT_DCS_CMD(0x04, 0x1D),
0136     _INIT_DCS_CMD(0x05, 0x1D),
0137 
0138     _INIT_DCS_CMD(0x06, 0x04),
0139     _INIT_DCS_CMD(0x07, 0x04),
0140 
0141     _INIT_DCS_CMD(0x08, 0x0F),
0142     _INIT_DCS_CMD(0x09, 0x0F),
0143 
0144     _INIT_DCS_CMD(0x0A, 0x0E),
0145     _INIT_DCS_CMD(0x0B, 0x0E),
0146 
0147     _INIT_DCS_CMD(0x0C, 0x0D),
0148     _INIT_DCS_CMD(0x0D, 0x0D),
0149 
0150     _INIT_DCS_CMD(0x0E, 0x0C),
0151     _INIT_DCS_CMD(0x0F, 0x0C),
0152 
0153     _INIT_DCS_CMD(0x10, 0x08),
0154     _INIT_DCS_CMD(0x11, 0x08),
0155 
0156     _INIT_DCS_CMD(0x12, 0x00),
0157     _INIT_DCS_CMD(0x13, 0x00),
0158     _INIT_DCS_CMD(0x14, 0x00),
0159     _INIT_DCS_CMD(0x15, 0x00),
0160 
0161     _INIT_DCS_CMD(0x16, 0x00),
0162     _INIT_DCS_CMD(0x17, 0x00),
0163 
0164     _INIT_DCS_CMD(0x18, 0x1C),
0165     _INIT_DCS_CMD(0x19, 0x1C),
0166 
0167     _INIT_DCS_CMD(0x1A, 0x1D),
0168     _INIT_DCS_CMD(0x1B, 0x1D),
0169 
0170     _INIT_DCS_CMD(0x1C, 0x04),
0171     _INIT_DCS_CMD(0x1D, 0x04),
0172 
0173     _INIT_DCS_CMD(0x1E, 0x0F),
0174     _INIT_DCS_CMD(0x1F, 0x0F),
0175 
0176     _INIT_DCS_CMD(0x20, 0x0E),
0177     _INIT_DCS_CMD(0x21, 0x0E),
0178 
0179     _INIT_DCS_CMD(0x22, 0x0D),
0180     _INIT_DCS_CMD(0x23, 0x0D),
0181 
0182     _INIT_DCS_CMD(0x24, 0x0C),
0183     _INIT_DCS_CMD(0x25, 0x0C),
0184 
0185     _INIT_DCS_CMD(0x26, 0x08),
0186     _INIT_DCS_CMD(0x27, 0x08),
0187 
0188     _INIT_DCS_CMD(0x28, 0x00),
0189     _INIT_DCS_CMD(0x29, 0x00),
0190     _INIT_DCS_CMD(0x2A, 0x00),
0191     _INIT_DCS_CMD(0x2B, 0x00),
0192 
0193     _INIT_DCS_CMD(0x2D, 0x20),
0194     _INIT_DCS_CMD(0x2F, 0x0A),
0195     _INIT_DCS_CMD(0x30, 0x44),
0196     _INIT_DCS_CMD(0x33, 0x0C),
0197     _INIT_DCS_CMD(0x34, 0x32),
0198 
0199     _INIT_DCS_CMD(0x37, 0x44),
0200     _INIT_DCS_CMD(0x38, 0x40),
0201     _INIT_DCS_CMD(0x39, 0x00),
0202     _INIT_DCS_CMD(0x3A, 0x5D),
0203     _INIT_DCS_CMD(0x3B, 0x60),
0204     _INIT_DCS_CMD(0x3D, 0x42),
0205     _INIT_DCS_CMD(0x3F, 0x06),
0206     _INIT_DCS_CMD(0x43, 0x06),
0207     _INIT_DCS_CMD(0x47, 0x66),
0208     _INIT_DCS_CMD(0x4A, 0x5D),
0209     _INIT_DCS_CMD(0x4B, 0x60),
0210     _INIT_DCS_CMD(0x4C, 0x91),
0211     _INIT_DCS_CMD(0x4D, 0x21),
0212     _INIT_DCS_CMD(0x4E, 0x43),
0213     _INIT_DCS_CMD(0x51, 0x12),
0214     _INIT_DCS_CMD(0x52, 0x34),
0215     _INIT_DCS_CMD(0x55, 0x82, 0x02),
0216     _INIT_DCS_CMD(0x56, 0x04),
0217     _INIT_DCS_CMD(0x58, 0x21),
0218     _INIT_DCS_CMD(0x59, 0x30),
0219     _INIT_DCS_CMD(0x5A, 0x60),
0220     _INIT_DCS_CMD(0x5B, 0x50),
0221     _INIT_DCS_CMD(0x5E, 0x00, 0x06),
0222     _INIT_DCS_CMD(0x5F, 0x00),
0223     _INIT_DCS_CMD(0x65, 0x82),
0224     _INIT_DCS_CMD(0x7E, 0x20),
0225     _INIT_DCS_CMD(0x7F, 0x3C),
0226     _INIT_DCS_CMD(0x82, 0x04),
0227     _INIT_DCS_CMD(0x97, 0xC0),
0228 
0229     _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
0230     _INIT_DCS_CMD(0x91, 0x44),
0231     _INIT_DCS_CMD(0x92, 0xA9),
0232     _INIT_DCS_CMD(0x93, 0x1A),
0233     _INIT_DCS_CMD(0x94, 0x96),
0234     _INIT_DCS_CMD(0xD7, 0x55),
0235     _INIT_DCS_CMD(0xDA, 0x0A),
0236     _INIT_DCS_CMD(0xDE, 0x08),
0237     _INIT_DCS_CMD(0xDB, 0x05),
0238     _INIT_DCS_CMD(0xDC, 0xA9),
0239     _INIT_DCS_CMD(0xDD, 0x22),
0240 
0241     _INIT_DCS_CMD(0xDF, 0x05),
0242     _INIT_DCS_CMD(0xE0, 0xA9),
0243     _INIT_DCS_CMD(0xE1, 0x05),
0244     _INIT_DCS_CMD(0xE2, 0xA9),
0245     _INIT_DCS_CMD(0xE3, 0x05),
0246     _INIT_DCS_CMD(0xE4, 0xA9),
0247     _INIT_DCS_CMD(0xE5, 0x05),
0248     _INIT_DCS_CMD(0xE6, 0xA9),
0249     _INIT_DCS_CMD(0x5C, 0x00),
0250     _INIT_DCS_CMD(0x5D, 0x00),
0251     _INIT_DCS_CMD(0x8D, 0x00),
0252     _INIT_DCS_CMD(0x8E, 0x00),
0253     _INIT_DCS_CMD(0xB5, 0x90),
0254     _INIT_DCS_CMD(0xFF, 0x25),
0255     _INIT_DCS_CMD(0xFB, 0x01),
0256     _INIT_DCS_CMD(0x05, 0x00),
0257     _INIT_DCS_CMD(0x19, 0x07),
0258     _INIT_DCS_CMD(0x1F, 0x60),
0259     _INIT_DCS_CMD(0x20, 0x50),
0260     _INIT_DCS_CMD(0x26, 0x60),
0261     _INIT_DCS_CMD(0x27, 0x50),
0262     _INIT_DCS_CMD(0x33, 0x60),
0263     _INIT_DCS_CMD(0x34, 0x50),
0264     _INIT_DCS_CMD(0x3F, 0xE0),
0265     _INIT_DCS_CMD(0x40, 0x00),
0266     _INIT_DCS_CMD(0x44, 0x00),
0267     _INIT_DCS_CMD(0x45, 0x40),
0268     _INIT_DCS_CMD(0x48, 0x60),
0269     _INIT_DCS_CMD(0x49, 0x50),
0270     _INIT_DCS_CMD(0x5B, 0x00),
0271     _INIT_DCS_CMD(0x5C, 0x00),
0272     _INIT_DCS_CMD(0x5D, 0x00),
0273     _INIT_DCS_CMD(0x5E, 0xD0),
0274     _INIT_DCS_CMD(0x61, 0x60),
0275     _INIT_DCS_CMD(0x62, 0x50),
0276     _INIT_DCS_CMD(0xF1, 0x10),
0277     _INIT_DCS_CMD(0xFF, 0x2A),
0278     _INIT_DCS_CMD(0xFB, 0x01),
0279 
0280     _INIT_DCS_CMD(0x64, 0x16),
0281     _INIT_DCS_CMD(0x67, 0x16),
0282     _INIT_DCS_CMD(0x6A, 0x16),
0283 
0284     _INIT_DCS_CMD(0x70, 0x30),
0285 
0286     _INIT_DCS_CMD(0xA2, 0xF3),
0287     _INIT_DCS_CMD(0xA3, 0xFF),
0288     _INIT_DCS_CMD(0xA4, 0xFF),
0289     _INIT_DCS_CMD(0xA5, 0xFF),
0290 
0291     _INIT_DCS_CMD(0xD6, 0x08),
0292 
0293     _INIT_DCS_CMD(0xFF, 0x26),
0294     _INIT_DCS_CMD(0xFB, 0x01),
0295     _INIT_DCS_CMD(0x00, 0xA1),
0296 
0297     _INIT_DCS_CMD(0x02, 0x31),
0298     _INIT_DCS_CMD(0x04, 0x28),
0299     _INIT_DCS_CMD(0x06, 0x30),
0300     _INIT_DCS_CMD(0x0C, 0x16),
0301     _INIT_DCS_CMD(0x0D, 0x0D),
0302     _INIT_DCS_CMD(0x0F, 0x00),
0303     _INIT_DCS_CMD(0x11, 0x00),
0304     _INIT_DCS_CMD(0x12, 0x50),
0305     _INIT_DCS_CMD(0x13, 0x56),
0306     _INIT_DCS_CMD(0x14, 0x57),
0307     _INIT_DCS_CMD(0x15, 0x00),
0308     _INIT_DCS_CMD(0x16, 0x10),
0309     _INIT_DCS_CMD(0x17, 0xA0),
0310     _INIT_DCS_CMD(0x18, 0x86),
0311     _INIT_DCS_CMD(0x19, 0x0D),
0312     _INIT_DCS_CMD(0x1A, 0x7F),
0313     _INIT_DCS_CMD(0x1B, 0x0C),
0314     _INIT_DCS_CMD(0x1C, 0xBF),
0315     _INIT_DCS_CMD(0x22, 0x00),
0316     _INIT_DCS_CMD(0x23, 0x00),
0317     _INIT_DCS_CMD(0x2A, 0x0D),
0318     _INIT_DCS_CMD(0x2B, 0x7F),
0319 
0320     _INIT_DCS_CMD(0x1D, 0x00),
0321     _INIT_DCS_CMD(0x1E, 0x65),
0322     _INIT_DCS_CMD(0x1F, 0x65),
0323     _INIT_DCS_CMD(0x24, 0x00),
0324     _INIT_DCS_CMD(0x25, 0x65),
0325     _INIT_DCS_CMD(0x2F, 0x05),
0326     _INIT_DCS_CMD(0x30, 0x65),
0327     _INIT_DCS_CMD(0x31, 0x05),
0328     _INIT_DCS_CMD(0x32, 0x7D),
0329     _INIT_DCS_CMD(0x39, 0x00),
0330     _INIT_DCS_CMD(0x3A, 0x65),
0331     _INIT_DCS_CMD(0x20, 0x01),
0332     _INIT_DCS_CMD(0x33, 0x11),
0333     _INIT_DCS_CMD(0x34, 0x78),
0334     _INIT_DCS_CMD(0x35, 0x16),
0335     _INIT_DCS_CMD(0xC8, 0x04),
0336     _INIT_DCS_CMD(0xC9, 0x9E),
0337     _INIT_DCS_CMD(0xCA, 0x4E),
0338     _INIT_DCS_CMD(0xCB, 0x00),
0339 
0340     _INIT_DCS_CMD(0xA9, 0x49),
0341     _INIT_DCS_CMD(0xAA, 0x4B),
0342     _INIT_DCS_CMD(0xAB, 0x48),
0343     _INIT_DCS_CMD(0xAC, 0x43),
0344     _INIT_DCS_CMD(0xAD, 0x40),
0345     _INIT_DCS_CMD(0xAE, 0x50),
0346     _INIT_DCS_CMD(0xAF, 0x44),
0347     _INIT_DCS_CMD(0xB0, 0x54),
0348     _INIT_DCS_CMD(0xB1, 0x4E),
0349     _INIT_DCS_CMD(0xB2, 0x4D),
0350     _INIT_DCS_CMD(0xB3, 0x4C),
0351     _INIT_DCS_CMD(0xB4, 0x41),
0352     _INIT_DCS_CMD(0xB5, 0x47),
0353     _INIT_DCS_CMD(0xB6, 0x53),
0354     _INIT_DCS_CMD(0xB7, 0x3E),
0355     _INIT_DCS_CMD(0xB8, 0x51),
0356     _INIT_DCS_CMD(0xB9, 0x3C),
0357     _INIT_DCS_CMD(0xBA, 0x3B),
0358     _INIT_DCS_CMD(0xBB, 0x46),
0359     _INIT_DCS_CMD(0xBC, 0x45),
0360     _INIT_DCS_CMD(0xBD, 0x55),
0361     _INIT_DCS_CMD(0xBE, 0x3D),
0362     _INIT_DCS_CMD(0xBF, 0x3F),
0363     _INIT_DCS_CMD(0xC0, 0x52),
0364     _INIT_DCS_CMD(0xC1, 0x4A),
0365     _INIT_DCS_CMD(0xC2, 0x39),
0366     _INIT_DCS_CMD(0xC3, 0x4F),
0367     _INIT_DCS_CMD(0xC4, 0x3A),
0368     _INIT_DCS_CMD(0xC5, 0x42),
0369     _INIT_DCS_CMD(0xFF, 0x27),
0370     _INIT_DCS_CMD(0xFB, 0x01),
0371 
0372     _INIT_DCS_CMD(0x56, 0x06),
0373     _INIT_DCS_CMD(0x58, 0x80),
0374     _INIT_DCS_CMD(0x59, 0x75),
0375     _INIT_DCS_CMD(0x5A, 0x00),
0376     _INIT_DCS_CMD(0x5B, 0x02),
0377     _INIT_DCS_CMD(0x5C, 0x00),
0378     _INIT_DCS_CMD(0x5D, 0x00),
0379     _INIT_DCS_CMD(0x5E, 0x20),
0380     _INIT_DCS_CMD(0x5F, 0x10),
0381     _INIT_DCS_CMD(0x60, 0x00),
0382     _INIT_DCS_CMD(0x61, 0x2E),
0383     _INIT_DCS_CMD(0x62, 0x00),
0384     _INIT_DCS_CMD(0x63, 0x01),
0385     _INIT_DCS_CMD(0x64, 0x43),
0386     _INIT_DCS_CMD(0x65, 0x2D),
0387     _INIT_DCS_CMD(0x66, 0x00),
0388     _INIT_DCS_CMD(0x67, 0x01),
0389     _INIT_DCS_CMD(0x68, 0x44),
0390 
0391     _INIT_DCS_CMD(0x00, 0x00),
0392     _INIT_DCS_CMD(0x78, 0x00),
0393     _INIT_DCS_CMD(0xC3, 0x00),
0394 
0395     _INIT_DCS_CMD(0xFF, 0x2A),
0396     _INIT_DCS_CMD(0xFB, 0x01),
0397 
0398     _INIT_DCS_CMD(0x22, 0x2F),
0399     _INIT_DCS_CMD(0x23, 0x08),
0400 
0401     _INIT_DCS_CMD(0x24, 0x00),
0402     _INIT_DCS_CMD(0x25, 0x65),
0403     _INIT_DCS_CMD(0x26, 0xF8),
0404     _INIT_DCS_CMD(0x27, 0x00),
0405     _INIT_DCS_CMD(0x28, 0x1A),
0406     _INIT_DCS_CMD(0x29, 0x00),
0407     _INIT_DCS_CMD(0x2A, 0x1A),
0408     _INIT_DCS_CMD(0x2B, 0x00),
0409     _INIT_DCS_CMD(0x2D, 0x1A),
0410 
0411     _INIT_DCS_CMD(0xFF, 0x23),
0412     _INIT_DCS_CMD(0xFB, 0x01),
0413 
0414     _INIT_DCS_CMD(0x00, 0x80),
0415     _INIT_DCS_CMD(0x07, 0x00),
0416 
0417     _INIT_DCS_CMD(0xFF, 0xE0),
0418     _INIT_DCS_CMD(0xFB, 0x01),
0419     _INIT_DCS_CMD(0x14, 0x60),
0420     _INIT_DCS_CMD(0x16, 0xC0),
0421 
0422     _INIT_DCS_CMD(0xFF, 0xF0),
0423     _INIT_DCS_CMD(0xFB, 0x01),
0424     _INIT_DCS_CMD(0x3A, 0x08),
0425 
0426     _INIT_DCS_CMD(0xFF, 0x10),
0427     _INIT_DCS_CMD(0xFB, 0x01),
0428     _INIT_DCS_CMD(0xB9, 0x01),
0429     _INIT_DCS_CMD(0xFF, 0x20),
0430     _INIT_DCS_CMD(0xFB, 0x01),
0431     _INIT_DCS_CMD(0x18, 0x40),
0432 
0433     _INIT_DCS_CMD(0xFF, 0x10),
0434     _INIT_DCS_CMD(0xFB, 0x01),
0435     _INIT_DCS_CMD(0xB9, 0x02),
0436     _INIT_DCS_CMD(0x35, 0x00),
0437     _INIT_DCS_CMD(0x51, 0x00, 0xFF),
0438     _INIT_DCS_CMD(0x53, 0x24),
0439     _INIT_DCS_CMD(0x55, 0x00),
0440     _INIT_DCS_CMD(0xBB, 0x13),
0441     _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
0442     _INIT_DELAY_CMD(100),
0443     _INIT_DCS_CMD(0x11),
0444     _INIT_DELAY_CMD(200),
0445     _INIT_DCS_CMD(0x29),
0446     _INIT_DELAY_CMD(100),
0447     {},
0448 };
0449 
0450 static const struct panel_init_cmd inx_hj110iz_init_cmd[] = {
0451     _INIT_DCS_CMD(0xFF, 0x20),
0452     _INIT_DCS_CMD(0xFB, 0x01),
0453     _INIT_DCS_CMD(0x05, 0xD1),
0454     _INIT_DCS_CMD(0x0D, 0x63),
0455     _INIT_DCS_CMD(0x07, 0x8C),
0456     _INIT_DCS_CMD(0x08, 0x4B),
0457     _INIT_DCS_CMD(0x0E, 0x91),
0458     _INIT_DCS_CMD(0x0F, 0x69),
0459     _INIT_DCS_CMD(0x95, 0xF5),
0460     _INIT_DCS_CMD(0x96, 0xF5),
0461     _INIT_DCS_CMD(0x9D, 0x00),
0462     _INIT_DCS_CMD(0x9E, 0x00),
0463     _INIT_DCS_CMD(0x69, 0x98),
0464     _INIT_DCS_CMD(0x75, 0xA2),
0465     _INIT_DCS_CMD(0x77, 0xB3),
0466     _INIT_DCS_CMD(0xFF, 0x24),
0467     _INIT_DCS_CMD(0xFB, 0x01),
0468     _INIT_DCS_CMD(0x91, 0x44),
0469     _INIT_DCS_CMD(0x92, 0x7A),
0470     _INIT_DCS_CMD(0x93, 0x1A),
0471     _INIT_DCS_CMD(0x94, 0x40),
0472     _INIT_DCS_CMD(0x9A, 0x08),
0473     _INIT_DCS_CMD(0x60, 0x96),
0474     _INIT_DCS_CMD(0x61, 0xD0),
0475     _INIT_DCS_CMD(0x63, 0x70),
0476     _INIT_DCS_CMD(0xC2, 0xCF),
0477     _INIT_DCS_CMD(0x9B, 0x0F),
0478     _INIT_DCS_CMD(0x9A, 0x08),
0479     _INIT_DCS_CMD(0x00, 0x03),
0480     _INIT_DCS_CMD(0x01, 0x03),
0481     _INIT_DCS_CMD(0x02, 0x03),
0482     _INIT_DCS_CMD(0x03, 0x03),
0483     _INIT_DCS_CMD(0x04, 0x03),
0484     _INIT_DCS_CMD(0x05, 0x03),
0485     _INIT_DCS_CMD(0x06, 0x22),
0486     _INIT_DCS_CMD(0x07, 0x06),
0487     _INIT_DCS_CMD(0x08, 0x00),
0488     _INIT_DCS_CMD(0x09, 0x1D),
0489     _INIT_DCS_CMD(0x0A, 0x1C),
0490     _INIT_DCS_CMD(0x0B, 0x13),
0491     _INIT_DCS_CMD(0x0C, 0x12),
0492     _INIT_DCS_CMD(0x0D, 0x11),
0493     _INIT_DCS_CMD(0x0E, 0x10),
0494     _INIT_DCS_CMD(0x0F, 0x0F),
0495     _INIT_DCS_CMD(0x10, 0x0E),
0496     _INIT_DCS_CMD(0x11, 0x0D),
0497     _INIT_DCS_CMD(0x12, 0x0C),
0498     _INIT_DCS_CMD(0x13, 0x04),
0499     _INIT_DCS_CMD(0x14, 0x03),
0500     _INIT_DCS_CMD(0x15, 0x03),
0501     _INIT_DCS_CMD(0x16, 0x03),
0502     _INIT_DCS_CMD(0x17, 0x03),
0503     _INIT_DCS_CMD(0x18, 0x03),
0504     _INIT_DCS_CMD(0x19, 0x03),
0505     _INIT_DCS_CMD(0x1A, 0x03),
0506     _INIT_DCS_CMD(0x1B, 0x03),
0507     _INIT_DCS_CMD(0x1C, 0x22),
0508     _INIT_DCS_CMD(0x1D, 0x06),
0509     _INIT_DCS_CMD(0x1E, 0x00),
0510     _INIT_DCS_CMD(0x1F, 0x1D),
0511     _INIT_DCS_CMD(0x20, 0x1C),
0512     _INIT_DCS_CMD(0x21, 0x13),
0513     _INIT_DCS_CMD(0x22, 0x12),
0514     _INIT_DCS_CMD(0x23, 0x11),
0515     _INIT_DCS_CMD(0x24, 0x10),
0516     _INIT_DCS_CMD(0x25, 0x0F),
0517     _INIT_DCS_CMD(0x26, 0x0E),
0518     _INIT_DCS_CMD(0x27, 0x0D),
0519     _INIT_DCS_CMD(0x28, 0x0C),
0520     _INIT_DCS_CMD(0x29, 0x04),
0521     _INIT_DCS_CMD(0x2A, 0x03),
0522     _INIT_DCS_CMD(0x2B, 0x03),
0523 
0524     _INIT_DCS_CMD(0x2F, 0x05),
0525     _INIT_DCS_CMD(0x30, 0x32),
0526     _INIT_DCS_CMD(0x31, 0x43),
0527     _INIT_DCS_CMD(0x33, 0x05),
0528     _INIT_DCS_CMD(0x34, 0x32),
0529     _INIT_DCS_CMD(0x35, 0x43),
0530     _INIT_DCS_CMD(0x37, 0x44),
0531     _INIT_DCS_CMD(0x38, 0x40),
0532     _INIT_DCS_CMD(0x39, 0x00),
0533     _INIT_DCS_CMD(0x3A, 0x18),
0534     _INIT_DCS_CMD(0x3B, 0x00),
0535     _INIT_DCS_CMD(0x3D, 0x93),
0536     _INIT_DCS_CMD(0xAB, 0x44),
0537     _INIT_DCS_CMD(0xAC, 0x40),
0538 
0539     _INIT_DCS_CMD(0x4D, 0x21),
0540     _INIT_DCS_CMD(0x4E, 0x43),
0541     _INIT_DCS_CMD(0x4F, 0x65),
0542     _INIT_DCS_CMD(0x50, 0x87),
0543     _INIT_DCS_CMD(0x51, 0x78),
0544     _INIT_DCS_CMD(0x52, 0x56),
0545     _INIT_DCS_CMD(0x53, 0x34),
0546     _INIT_DCS_CMD(0x54, 0x21),
0547     _INIT_DCS_CMD(0x55, 0x83),
0548     _INIT_DCS_CMD(0x56, 0x08),
0549     _INIT_DCS_CMD(0x58, 0x21),
0550     _INIT_DCS_CMD(0x59, 0x40),
0551     _INIT_DCS_CMD(0x5A, 0x00),
0552     _INIT_DCS_CMD(0x5B, 0x2C),
0553     _INIT_DCS_CMD(0x5E, 0x00, 0x10),
0554     _INIT_DCS_CMD(0x5F, 0x00),
0555 
0556     _INIT_DCS_CMD(0x7A, 0x00),
0557     _INIT_DCS_CMD(0x7B, 0x00),
0558     _INIT_DCS_CMD(0x7C, 0x00),
0559     _INIT_DCS_CMD(0x7D, 0x00),
0560     _INIT_DCS_CMD(0x7E, 0x20),
0561     _INIT_DCS_CMD(0x7F, 0x3C),
0562     _INIT_DCS_CMD(0x80, 0x00),
0563     _INIT_DCS_CMD(0x81, 0x00),
0564     _INIT_DCS_CMD(0x82, 0x08),
0565     _INIT_DCS_CMD(0x97, 0x02),
0566     _INIT_DCS_CMD(0xC5, 0x10),
0567     _INIT_DCS_CMD(0xDA, 0x05),
0568     _INIT_DCS_CMD(0xDB, 0x01),
0569     _INIT_DCS_CMD(0xDC, 0x7A),
0570     _INIT_DCS_CMD(0xDD, 0x55),
0571     _INIT_DCS_CMD(0xDE, 0x27),
0572     _INIT_DCS_CMD(0xDF, 0x01),
0573     _INIT_DCS_CMD(0xE0, 0x7A),
0574     _INIT_DCS_CMD(0xE1, 0x01),
0575     _INIT_DCS_CMD(0xE2, 0x7A),
0576     _INIT_DCS_CMD(0xE3, 0x01),
0577     _INIT_DCS_CMD(0xE4, 0x7A),
0578     _INIT_DCS_CMD(0xE5, 0x01),
0579     _INIT_DCS_CMD(0xE6, 0x7A),
0580     _INIT_DCS_CMD(0xE7, 0x00),
0581     _INIT_DCS_CMD(0xE8, 0x00),
0582     _INIT_DCS_CMD(0xE9, 0x01),
0583     _INIT_DCS_CMD(0xEA, 0x7A),
0584     _INIT_DCS_CMD(0xEB, 0x01),
0585     _INIT_DCS_CMD(0xEE, 0x7A),
0586     _INIT_DCS_CMD(0xEF, 0x01),
0587     _INIT_DCS_CMD(0xF0, 0x7A),
0588 
0589     _INIT_DCS_CMD(0xB6, 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, 0x00),
0590     _INIT_DCS_CMD(0xFF, 0x25),
0591     _INIT_DCS_CMD(0xFB, 0x01),
0592 
0593     _INIT_DCS_CMD(0x05, 0x00),
0594 
0595     _INIT_DCS_CMD(0x13, 0x02),
0596     _INIT_DCS_CMD(0x14, 0xDF),
0597     _INIT_DCS_CMD(0xF1, 0x10),
0598     _INIT_DCS_CMD(0x1E, 0x00),
0599     _INIT_DCS_CMD(0x1F, 0x00),
0600     _INIT_DCS_CMD(0x20, 0x2C),
0601     _INIT_DCS_CMD(0x25, 0x00),
0602     _INIT_DCS_CMD(0x26, 0x00),
0603     _INIT_DCS_CMD(0x27, 0x2C),
0604     _INIT_DCS_CMD(0x3F, 0x80),
0605     _INIT_DCS_CMD(0x40, 0x00),
0606     _INIT_DCS_CMD(0x43, 0x00),
0607 
0608     _INIT_DCS_CMD(0x44, 0x18),
0609     _INIT_DCS_CMD(0x45, 0x00),
0610 
0611     _INIT_DCS_CMD(0x48, 0x00),
0612     _INIT_DCS_CMD(0x49, 0x2C),
0613     _INIT_DCS_CMD(0x5B, 0x80),
0614     _INIT_DCS_CMD(0x5C, 0x00),
0615     _INIT_DCS_CMD(0x5D, 0x00),
0616     _INIT_DCS_CMD(0x5E, 0x00),
0617     _INIT_DCS_CMD(0x61, 0x00),
0618     _INIT_DCS_CMD(0x62, 0x2C),
0619     _INIT_DCS_CMD(0x68, 0x10),
0620     _INIT_DCS_CMD(0xFF, 0x26),
0621     _INIT_DCS_CMD(0xFB, 0x01),
0622 
0623     _INIT_DCS_CMD(0x00, 0xA1),
0624     _INIT_DCS_CMD(0x02, 0x31),
0625     _INIT_DCS_CMD(0x0A, 0xF2),
0626     _INIT_DCS_CMD(0x04, 0x28),
0627     _INIT_DCS_CMD(0x06, 0x30),
0628     _INIT_DCS_CMD(0x0C, 0x16),
0629     _INIT_DCS_CMD(0x0D, 0x0D),
0630     _INIT_DCS_CMD(0x0F, 0x00),
0631     _INIT_DCS_CMD(0x11, 0x00),
0632     _INIT_DCS_CMD(0x12, 0x50),
0633     _INIT_DCS_CMD(0x13, 0x56),
0634     _INIT_DCS_CMD(0x14, 0x57),
0635     _INIT_DCS_CMD(0x15, 0x00),
0636     _INIT_DCS_CMD(0x16, 0x10),
0637     _INIT_DCS_CMD(0x17, 0xA0),
0638     _INIT_DCS_CMD(0x18, 0x86),
0639     _INIT_DCS_CMD(0x22, 0x00),
0640     _INIT_DCS_CMD(0x23, 0x00),
0641     _INIT_DCS_CMD(0x19, 0x0D),
0642     _INIT_DCS_CMD(0x1A, 0x7F),
0643     _INIT_DCS_CMD(0x1B, 0x0C),
0644     _INIT_DCS_CMD(0x1C, 0xBF),
0645     _INIT_DCS_CMD(0x2A, 0x0D),
0646     _INIT_DCS_CMD(0x2B, 0x7F),
0647     _INIT_DCS_CMD(0x20, 0x00),
0648 
0649     _INIT_DCS_CMD(0x1D, 0x00),
0650     _INIT_DCS_CMD(0x1E, 0x78),
0651     _INIT_DCS_CMD(0x1F, 0x78),
0652 
0653     _INIT_DCS_CMD(0x2F, 0x03),
0654     _INIT_DCS_CMD(0x30, 0x78),
0655     _INIT_DCS_CMD(0x33, 0x78),
0656     _INIT_DCS_CMD(0x34, 0x66),
0657     _INIT_DCS_CMD(0x35, 0x11),
0658 
0659     _INIT_DCS_CMD(0x39, 0x10),
0660     _INIT_DCS_CMD(0x3A, 0x78),
0661     _INIT_DCS_CMD(0x3B, 0x06),
0662 
0663     _INIT_DCS_CMD(0xC8, 0x04),
0664     _INIT_DCS_CMD(0xC9, 0x84),
0665     _INIT_DCS_CMD(0xCA, 0x4E),
0666     _INIT_DCS_CMD(0xCB, 0x00),
0667 
0668     _INIT_DCS_CMD(0xA9, 0x50),
0669     _INIT_DCS_CMD(0xAA, 0x4F),
0670     _INIT_DCS_CMD(0xAB, 0x4D),
0671     _INIT_DCS_CMD(0xAC, 0x4A),
0672     _INIT_DCS_CMD(0xAD, 0x48),
0673     _INIT_DCS_CMD(0xAE, 0x46),
0674     _INIT_DCS_CMD(0xFF, 0x27),
0675     _INIT_DCS_CMD(0xFB, 0x01),
0676     _INIT_DCS_CMD(0xC0, 0x18),
0677     _INIT_DCS_CMD(0xC1, 0x00),
0678     _INIT_DCS_CMD(0xC2, 0x00),
0679     _INIT_DCS_CMD(0x56, 0x06),
0680     _INIT_DCS_CMD(0x58, 0x80),
0681     _INIT_DCS_CMD(0x59, 0x75),
0682     _INIT_DCS_CMD(0x5A, 0x00),
0683     _INIT_DCS_CMD(0x5B, 0x02),
0684     _INIT_DCS_CMD(0x5C, 0x00),
0685     _INIT_DCS_CMD(0x5D, 0x00),
0686     _INIT_DCS_CMD(0x5E, 0x20),
0687     _INIT_DCS_CMD(0x5F, 0x10),
0688     _INIT_DCS_CMD(0x60, 0x00),
0689     _INIT_DCS_CMD(0x61, 0x2E),
0690     _INIT_DCS_CMD(0x62, 0x00),
0691     _INIT_DCS_CMD(0x63, 0x01),
0692     _INIT_DCS_CMD(0x64, 0x43),
0693     _INIT_DCS_CMD(0x65, 0x2D),
0694     _INIT_DCS_CMD(0x66, 0x00),
0695     _INIT_DCS_CMD(0x67, 0x01),
0696     _INIT_DCS_CMD(0x68, 0x43),
0697     _INIT_DCS_CMD(0x98, 0x01),
0698     _INIT_DCS_CMD(0xB4, 0x03),
0699     _INIT_DCS_CMD(0x9B, 0xBD),
0700     _INIT_DCS_CMD(0xA0, 0x90),
0701     _INIT_DCS_CMD(0xAB, 0x1B),
0702     _INIT_DCS_CMD(0xBC, 0x0C),
0703     _INIT_DCS_CMD(0xBD, 0x28),
0704 
0705     _INIT_DCS_CMD(0xFF, 0x2A),
0706     _INIT_DCS_CMD(0xFB, 0x01),
0707 
0708     _INIT_DCS_CMD(0x22, 0x2F),
0709     _INIT_DCS_CMD(0x23, 0x08),
0710 
0711     _INIT_DCS_CMD(0x24, 0x00),
0712     _INIT_DCS_CMD(0x25, 0x65),
0713     _INIT_DCS_CMD(0x26, 0xF8),
0714     _INIT_DCS_CMD(0x27, 0x00),
0715     _INIT_DCS_CMD(0x28, 0x1A),
0716     _INIT_DCS_CMD(0x29, 0x00),
0717     _INIT_DCS_CMD(0x2A, 0x1A),
0718     _INIT_DCS_CMD(0x2B, 0x00),
0719     _INIT_DCS_CMD(0x2D, 0x1A),
0720 
0721     _INIT_DCS_CMD(0x64, 0x96),
0722     _INIT_DCS_CMD(0x65, 0x00),
0723     _INIT_DCS_CMD(0x66, 0x00),
0724     _INIT_DCS_CMD(0x6A, 0x96),
0725     _INIT_DCS_CMD(0x6B, 0x00),
0726     _INIT_DCS_CMD(0x6C, 0x00),
0727     _INIT_DCS_CMD(0x70, 0x92),
0728     _INIT_DCS_CMD(0x71, 0x00),
0729     _INIT_DCS_CMD(0x72, 0x00),
0730     _INIT_DCS_CMD(0xA2, 0x33),
0731     _INIT_DCS_CMD(0xA3, 0x30),
0732     _INIT_DCS_CMD(0xA4, 0xC0),
0733     _INIT_DCS_CMD(0xE8, 0x00),
0734     _INIT_DCS_CMD(0x97, 0x3C),
0735     _INIT_DCS_CMD(0x98, 0x02),
0736     _INIT_DCS_CMD(0x99, 0x95),
0737     _INIT_DCS_CMD(0x9A, 0x06),
0738     _INIT_DCS_CMD(0x9B, 0x00),
0739     _INIT_DCS_CMD(0x9C, 0x0B),
0740     _INIT_DCS_CMD(0x9D, 0x0A),
0741     _INIT_DCS_CMD(0x9E, 0x90),
0742     _INIT_DCS_CMD(0xFF, 0xF0),
0743     _INIT_DCS_CMD(0xFB, 0x01),
0744     _INIT_DCS_CMD(0x3A, 0x08),
0745     _INIT_DCS_CMD(0xFF, 0xD0),
0746     _INIT_DCS_CMD(0xFB, 0x01),
0747     _INIT_DCS_CMD(0x00, 0x33),
0748     _INIT_DCS_CMD(0x08, 0x01),
0749     _INIT_DCS_CMD(0x09, 0xBF),
0750     _INIT_DCS_CMD(0x2F, 0x33),
0751     _INIT_DCS_CMD(0xFF, 0x23),
0752     _INIT_DCS_CMD(0xFB, 0x01),
0753     _INIT_DCS_CMD(0x00, 0x80),
0754     _INIT_DCS_CMD(0x07, 0x00),
0755     _INIT_DCS_CMD(0xFF, 0x20),
0756     _INIT_DCS_CMD(0xFB, 0x01),
0757     _INIT_DCS_CMD(0x30, 0x00),
0758     _INIT_DCS_CMD(0xFF, 0x24),
0759     _INIT_DCS_CMD(0x5C, 0x88),
0760     _INIT_DCS_CMD(0x5D, 0x08),
0761     _INIT_DCS_CMD(0xFF, 0x10),
0762     _INIT_DCS_CMD(0xB9, 0x01),
0763     _INIT_DCS_CMD(0xFF, 0x20),
0764     _INIT_DCS_CMD(0x18, 0x40),
0765     _INIT_DCS_CMD(0xFF, 0x10),
0766     _INIT_DCS_CMD(0xB9, 0x02),
0767     _INIT_DCS_CMD(0xFF, 0x10),
0768     _INIT_DCS_CMD(0xFB, 0x01),
0769     _INIT_DCS_CMD(0xBB, 0x13),
0770     _INIT_DCS_CMD(0x3B, 0x03, 0x96, 0x1A, 0x04, 0x04),
0771     _INIT_DCS_CMD(0x35, 0x00),
0772     _INIT_DCS_CMD(0x51, 0x0F, 0xFF),
0773     _INIT_DCS_CMD(0x53, 0x24),
0774     _INIT_DELAY_CMD(100),
0775     _INIT_DCS_CMD(0x11),
0776     _INIT_DELAY_CMD(200),
0777     _INIT_DCS_CMD(0x29),
0778     _INIT_DELAY_CMD(100),
0779     {},
0780 };
0781 
0782 static const struct panel_init_cmd boe_init_cmd[] = {
0783     _INIT_DELAY_CMD(24),
0784     _INIT_DCS_CMD(0xB0, 0x05),
0785     _INIT_DCS_CMD(0xB1, 0xE5),
0786     _INIT_DCS_CMD(0xB3, 0x52),
0787     _INIT_DCS_CMD(0xB0, 0x00),
0788     _INIT_DCS_CMD(0xB3, 0x88),
0789     _INIT_DCS_CMD(0xB0, 0x04),
0790     _INIT_DCS_CMD(0xB8, 0x00),
0791     _INIT_DCS_CMD(0xB0, 0x00),
0792     _INIT_DCS_CMD(0xB6, 0x03),
0793     _INIT_DCS_CMD(0xBA, 0x8B),
0794     _INIT_DCS_CMD(0xBF, 0x1A),
0795     _INIT_DCS_CMD(0xC0, 0x0F),
0796     _INIT_DCS_CMD(0xC2, 0x0C),
0797     _INIT_DCS_CMD(0xC3, 0x02),
0798     _INIT_DCS_CMD(0xC4, 0x0C),
0799     _INIT_DCS_CMD(0xC5, 0x02),
0800     _INIT_DCS_CMD(0xB0, 0x01),
0801     _INIT_DCS_CMD(0xE0, 0x26),
0802     _INIT_DCS_CMD(0xE1, 0x26),
0803     _INIT_DCS_CMD(0xDC, 0x00),
0804     _INIT_DCS_CMD(0xDD, 0x00),
0805     _INIT_DCS_CMD(0xCC, 0x26),
0806     _INIT_DCS_CMD(0xCD, 0x26),
0807     _INIT_DCS_CMD(0xC8, 0x00),
0808     _INIT_DCS_CMD(0xC9, 0x00),
0809     _INIT_DCS_CMD(0xD2, 0x03),
0810     _INIT_DCS_CMD(0xD3, 0x03),
0811     _INIT_DCS_CMD(0xE6, 0x04),
0812     _INIT_DCS_CMD(0xE7, 0x04),
0813     _INIT_DCS_CMD(0xC4, 0x09),
0814     _INIT_DCS_CMD(0xC5, 0x09),
0815     _INIT_DCS_CMD(0xD8, 0x0A),
0816     _INIT_DCS_CMD(0xD9, 0x0A),
0817     _INIT_DCS_CMD(0xC2, 0x0B),
0818     _INIT_DCS_CMD(0xC3, 0x0B),
0819     _INIT_DCS_CMD(0xD6, 0x0C),
0820     _INIT_DCS_CMD(0xD7, 0x0C),
0821     _INIT_DCS_CMD(0xC0, 0x05),
0822     _INIT_DCS_CMD(0xC1, 0x05),
0823     _INIT_DCS_CMD(0xD4, 0x06),
0824     _INIT_DCS_CMD(0xD5, 0x06),
0825     _INIT_DCS_CMD(0xCA, 0x07),
0826     _INIT_DCS_CMD(0xCB, 0x07),
0827     _INIT_DCS_CMD(0xDE, 0x08),
0828     _INIT_DCS_CMD(0xDF, 0x08),
0829     _INIT_DCS_CMD(0xB0, 0x02),
0830     _INIT_DCS_CMD(0xC0, 0x00),
0831     _INIT_DCS_CMD(0xC1, 0x0D),
0832     _INIT_DCS_CMD(0xC2, 0x17),
0833     _INIT_DCS_CMD(0xC3, 0x26),
0834     _INIT_DCS_CMD(0xC4, 0x31),
0835     _INIT_DCS_CMD(0xC5, 0x1C),
0836     _INIT_DCS_CMD(0xC6, 0x2C),
0837     _INIT_DCS_CMD(0xC7, 0x33),
0838     _INIT_DCS_CMD(0xC8, 0x31),
0839     _INIT_DCS_CMD(0xC9, 0x37),
0840     _INIT_DCS_CMD(0xCA, 0x37),
0841     _INIT_DCS_CMD(0xCB, 0x37),
0842     _INIT_DCS_CMD(0xCC, 0x39),
0843     _INIT_DCS_CMD(0xCD, 0x2E),
0844     _INIT_DCS_CMD(0xCE, 0x2F),
0845     _INIT_DCS_CMD(0xCF, 0x2F),
0846     _INIT_DCS_CMD(0xD0, 0x07),
0847     _INIT_DCS_CMD(0xD2, 0x00),
0848     _INIT_DCS_CMD(0xD3, 0x0D),
0849     _INIT_DCS_CMD(0xD4, 0x17),
0850     _INIT_DCS_CMD(0xD5, 0x26),
0851     _INIT_DCS_CMD(0xD6, 0x31),
0852     _INIT_DCS_CMD(0xD7, 0x3F),
0853     _INIT_DCS_CMD(0xD8, 0x3F),
0854     _INIT_DCS_CMD(0xD9, 0x3F),
0855     _INIT_DCS_CMD(0xDA, 0x3F),
0856     _INIT_DCS_CMD(0xDB, 0x37),
0857     _INIT_DCS_CMD(0xDC, 0x37),
0858     _INIT_DCS_CMD(0xDD, 0x37),
0859     _INIT_DCS_CMD(0xDE, 0x39),
0860     _INIT_DCS_CMD(0xDF, 0x2E),
0861     _INIT_DCS_CMD(0xE0, 0x2F),
0862     _INIT_DCS_CMD(0xE1, 0x2F),
0863     _INIT_DCS_CMD(0xE2, 0x07),
0864     _INIT_DCS_CMD(0xB0, 0x03),
0865     _INIT_DCS_CMD(0xC8, 0x0B),
0866     _INIT_DCS_CMD(0xC9, 0x07),
0867     _INIT_DCS_CMD(0xC3, 0x00),
0868     _INIT_DCS_CMD(0xE7, 0x00),
0869     _INIT_DCS_CMD(0xC5, 0x2A),
0870     _INIT_DCS_CMD(0xDE, 0x2A),
0871     _INIT_DCS_CMD(0xCA, 0x43),
0872     _INIT_DCS_CMD(0xC9, 0x07),
0873     _INIT_DCS_CMD(0xE4, 0xC0),
0874     _INIT_DCS_CMD(0xE5, 0x0D),
0875     _INIT_DCS_CMD(0xCB, 0x00),
0876     _INIT_DCS_CMD(0xB0, 0x06),
0877     _INIT_DCS_CMD(0xB8, 0xA5),
0878     _INIT_DCS_CMD(0xC0, 0xA5),
0879     _INIT_DCS_CMD(0xC7, 0x0F),
0880     _INIT_DCS_CMD(0xD5, 0x32),
0881     _INIT_DCS_CMD(0xB8, 0x00),
0882     _INIT_DCS_CMD(0xC0, 0x00),
0883     _INIT_DCS_CMD(0xBC, 0x00),
0884     _INIT_DCS_CMD(0xB0, 0x07),
0885     _INIT_DCS_CMD(0xB1, 0x00),
0886     _INIT_DCS_CMD(0xB2, 0x02),
0887     _INIT_DCS_CMD(0xB3, 0x0F),
0888     _INIT_DCS_CMD(0xB4, 0x25),
0889     _INIT_DCS_CMD(0xB5, 0x39),
0890     _INIT_DCS_CMD(0xB6, 0x4E),
0891     _INIT_DCS_CMD(0xB7, 0x72),
0892     _INIT_DCS_CMD(0xB8, 0x97),
0893     _INIT_DCS_CMD(0xB9, 0xDC),
0894     _INIT_DCS_CMD(0xBA, 0x22),
0895     _INIT_DCS_CMD(0xBB, 0xA4),
0896     _INIT_DCS_CMD(0xBC, 0x2B),
0897     _INIT_DCS_CMD(0xBD, 0x2F),
0898     _INIT_DCS_CMD(0xBE, 0xA9),
0899     _INIT_DCS_CMD(0xBF, 0x25),
0900     _INIT_DCS_CMD(0xC0, 0x61),
0901     _INIT_DCS_CMD(0xC1, 0x97),
0902     _INIT_DCS_CMD(0xC2, 0xB2),
0903     _INIT_DCS_CMD(0xC3, 0xCD),
0904     _INIT_DCS_CMD(0xC4, 0xD9),
0905     _INIT_DCS_CMD(0xC5, 0xE7),
0906     _INIT_DCS_CMD(0xC6, 0xF4),
0907     _INIT_DCS_CMD(0xC7, 0xFA),
0908     _INIT_DCS_CMD(0xC8, 0xFC),
0909     _INIT_DCS_CMD(0xC9, 0x00),
0910     _INIT_DCS_CMD(0xCA, 0x00),
0911     _INIT_DCS_CMD(0xCB, 0x16),
0912     _INIT_DCS_CMD(0xCC, 0xAF),
0913     _INIT_DCS_CMD(0xCD, 0xFF),
0914     _INIT_DCS_CMD(0xCE, 0xFF),
0915     _INIT_DCS_CMD(0xB0, 0x08),
0916     _INIT_DCS_CMD(0xB1, 0x04),
0917     _INIT_DCS_CMD(0xB2, 0x05),
0918     _INIT_DCS_CMD(0xB3, 0x11),
0919     _INIT_DCS_CMD(0xB4, 0x24),
0920     _INIT_DCS_CMD(0xB5, 0x39),
0921     _INIT_DCS_CMD(0xB6, 0x4F),
0922     _INIT_DCS_CMD(0xB7, 0x72),
0923     _INIT_DCS_CMD(0xB8, 0x98),
0924     _INIT_DCS_CMD(0xB9, 0xDC),
0925     _INIT_DCS_CMD(0xBA, 0x23),
0926     _INIT_DCS_CMD(0xBB, 0xA6),
0927     _INIT_DCS_CMD(0xBC, 0x2C),
0928     _INIT_DCS_CMD(0xBD, 0x30),
0929     _INIT_DCS_CMD(0xBE, 0xAA),
0930     _INIT_DCS_CMD(0xBF, 0x26),
0931     _INIT_DCS_CMD(0xC0, 0x62),
0932     _INIT_DCS_CMD(0xC1, 0x9B),
0933     _INIT_DCS_CMD(0xC2, 0xB5),
0934     _INIT_DCS_CMD(0xC3, 0xCF),
0935     _INIT_DCS_CMD(0xC4, 0xDB),
0936     _INIT_DCS_CMD(0xC5, 0xE8),
0937     _INIT_DCS_CMD(0xC6, 0xF5),
0938     _INIT_DCS_CMD(0xC7, 0xFA),
0939     _INIT_DCS_CMD(0xC8, 0xFC),
0940     _INIT_DCS_CMD(0xC9, 0x00),
0941     _INIT_DCS_CMD(0xCA, 0x00),
0942     _INIT_DCS_CMD(0xCB, 0x16),
0943     _INIT_DCS_CMD(0xCC, 0xAF),
0944     _INIT_DCS_CMD(0xCD, 0xFF),
0945     _INIT_DCS_CMD(0xCE, 0xFF),
0946     _INIT_DCS_CMD(0xB0, 0x09),
0947     _INIT_DCS_CMD(0xB1, 0x04),
0948     _INIT_DCS_CMD(0xB2, 0x02),
0949     _INIT_DCS_CMD(0xB3, 0x16),
0950     _INIT_DCS_CMD(0xB4, 0x24),
0951     _INIT_DCS_CMD(0xB5, 0x3B),
0952     _INIT_DCS_CMD(0xB6, 0x4F),
0953     _INIT_DCS_CMD(0xB7, 0x73),
0954     _INIT_DCS_CMD(0xB8, 0x99),
0955     _INIT_DCS_CMD(0xB9, 0xE0),
0956     _INIT_DCS_CMD(0xBA, 0x26),
0957     _INIT_DCS_CMD(0xBB, 0xAD),
0958     _INIT_DCS_CMD(0xBC, 0x36),
0959     _INIT_DCS_CMD(0xBD, 0x3A),
0960     _INIT_DCS_CMD(0xBE, 0xAE),
0961     _INIT_DCS_CMD(0xBF, 0x2A),
0962     _INIT_DCS_CMD(0xC0, 0x66),
0963     _INIT_DCS_CMD(0xC1, 0x9E),
0964     _INIT_DCS_CMD(0xC2, 0xB8),
0965     _INIT_DCS_CMD(0xC3, 0xD1),
0966     _INIT_DCS_CMD(0xC4, 0xDD),
0967     _INIT_DCS_CMD(0xC5, 0xE9),
0968     _INIT_DCS_CMD(0xC6, 0xF6),
0969     _INIT_DCS_CMD(0xC7, 0xFA),
0970     _INIT_DCS_CMD(0xC8, 0xFC),
0971     _INIT_DCS_CMD(0xC9, 0x00),
0972     _INIT_DCS_CMD(0xCA, 0x00),
0973     _INIT_DCS_CMD(0xCB, 0x16),
0974     _INIT_DCS_CMD(0xCC, 0xAF),
0975     _INIT_DCS_CMD(0xCD, 0xFF),
0976     _INIT_DCS_CMD(0xCE, 0xFF),
0977     _INIT_DCS_CMD(0xB0, 0x0A),
0978     _INIT_DCS_CMD(0xB1, 0x00),
0979     _INIT_DCS_CMD(0xB2, 0x02),
0980     _INIT_DCS_CMD(0xB3, 0x0F),
0981     _INIT_DCS_CMD(0xB4, 0x25),
0982     _INIT_DCS_CMD(0xB5, 0x39),
0983     _INIT_DCS_CMD(0xB6, 0x4E),
0984     _INIT_DCS_CMD(0xB7, 0x72),
0985     _INIT_DCS_CMD(0xB8, 0x97),
0986     _INIT_DCS_CMD(0xB9, 0xDC),
0987     _INIT_DCS_CMD(0xBA, 0x22),
0988     _INIT_DCS_CMD(0xBB, 0xA4),
0989     _INIT_DCS_CMD(0xBC, 0x2B),
0990     _INIT_DCS_CMD(0xBD, 0x2F),
0991     _INIT_DCS_CMD(0xBE, 0xA9),
0992     _INIT_DCS_CMD(0xBF, 0x25),
0993     _INIT_DCS_CMD(0xC0, 0x61),
0994     _INIT_DCS_CMD(0xC1, 0x97),
0995     _INIT_DCS_CMD(0xC2, 0xB2),
0996     _INIT_DCS_CMD(0xC3, 0xCD),
0997     _INIT_DCS_CMD(0xC4, 0xD9),
0998     _INIT_DCS_CMD(0xC5, 0xE7),
0999     _INIT_DCS_CMD(0xC6, 0xF4),
1000     _INIT_DCS_CMD(0xC7, 0xFA),
1001     _INIT_DCS_CMD(0xC8, 0xFC),
1002     _INIT_DCS_CMD(0xC9, 0x00),
1003     _INIT_DCS_CMD(0xCA, 0x00),
1004     _INIT_DCS_CMD(0xCB, 0x16),
1005     _INIT_DCS_CMD(0xCC, 0xAF),
1006     _INIT_DCS_CMD(0xCD, 0xFF),
1007     _INIT_DCS_CMD(0xCE, 0xFF),
1008     _INIT_DCS_CMD(0xB0, 0x0B),
1009     _INIT_DCS_CMD(0xB1, 0x04),
1010     _INIT_DCS_CMD(0xB2, 0x05),
1011     _INIT_DCS_CMD(0xB3, 0x11),
1012     _INIT_DCS_CMD(0xB4, 0x24),
1013     _INIT_DCS_CMD(0xB5, 0x39),
1014     _INIT_DCS_CMD(0xB6, 0x4F),
1015     _INIT_DCS_CMD(0xB7, 0x72),
1016     _INIT_DCS_CMD(0xB8, 0x98),
1017     _INIT_DCS_CMD(0xB9, 0xDC),
1018     _INIT_DCS_CMD(0xBA, 0x23),
1019     _INIT_DCS_CMD(0xBB, 0xA6),
1020     _INIT_DCS_CMD(0xBC, 0x2C),
1021     _INIT_DCS_CMD(0xBD, 0x30),
1022     _INIT_DCS_CMD(0xBE, 0xAA),
1023     _INIT_DCS_CMD(0xBF, 0x26),
1024     _INIT_DCS_CMD(0xC0, 0x62),
1025     _INIT_DCS_CMD(0xC1, 0x9B),
1026     _INIT_DCS_CMD(0xC2, 0xB5),
1027     _INIT_DCS_CMD(0xC3, 0xCF),
1028     _INIT_DCS_CMD(0xC4, 0xDB),
1029     _INIT_DCS_CMD(0xC5, 0xE8),
1030     _INIT_DCS_CMD(0xC6, 0xF5),
1031     _INIT_DCS_CMD(0xC7, 0xFA),
1032     _INIT_DCS_CMD(0xC8, 0xFC),
1033     _INIT_DCS_CMD(0xC9, 0x00),
1034     _INIT_DCS_CMD(0xCA, 0x00),
1035     _INIT_DCS_CMD(0xCB, 0x16),
1036     _INIT_DCS_CMD(0xCC, 0xAF),
1037     _INIT_DCS_CMD(0xCD, 0xFF),
1038     _INIT_DCS_CMD(0xCE, 0xFF),
1039     _INIT_DCS_CMD(0xB0, 0x0C),
1040     _INIT_DCS_CMD(0xB1, 0x04),
1041     _INIT_DCS_CMD(0xB2, 0x02),
1042     _INIT_DCS_CMD(0xB3, 0x16),
1043     _INIT_DCS_CMD(0xB4, 0x24),
1044     _INIT_DCS_CMD(0xB5, 0x3B),
1045     _INIT_DCS_CMD(0xB6, 0x4F),
1046     _INIT_DCS_CMD(0xB7, 0x73),
1047     _INIT_DCS_CMD(0xB8, 0x99),
1048     _INIT_DCS_CMD(0xB9, 0xE0),
1049     _INIT_DCS_CMD(0xBA, 0x26),
1050     _INIT_DCS_CMD(0xBB, 0xAD),
1051     _INIT_DCS_CMD(0xBC, 0x36),
1052     _INIT_DCS_CMD(0xBD, 0x3A),
1053     _INIT_DCS_CMD(0xBE, 0xAE),
1054     _INIT_DCS_CMD(0xBF, 0x2A),
1055     _INIT_DCS_CMD(0xC0, 0x66),
1056     _INIT_DCS_CMD(0xC1, 0x9E),
1057     _INIT_DCS_CMD(0xC2, 0xB8),
1058     _INIT_DCS_CMD(0xC3, 0xD1),
1059     _INIT_DCS_CMD(0xC4, 0xDD),
1060     _INIT_DCS_CMD(0xC5, 0xE9),
1061     _INIT_DCS_CMD(0xC6, 0xF6),
1062     _INIT_DCS_CMD(0xC7, 0xFA),
1063     _INIT_DCS_CMD(0xC8, 0xFC),
1064     _INIT_DCS_CMD(0xC9, 0x00),
1065     _INIT_DCS_CMD(0xCA, 0x00),
1066     _INIT_DCS_CMD(0xCB, 0x16),
1067     _INIT_DCS_CMD(0xCC, 0xAF),
1068     _INIT_DCS_CMD(0xCD, 0xFF),
1069     _INIT_DCS_CMD(0xCE, 0xFF),
1070     _INIT_DCS_CMD(0xB0, 0x00),
1071     _INIT_DCS_CMD(0xB3, 0x08),
1072     _INIT_DCS_CMD(0xB0, 0x04),
1073     _INIT_DCS_CMD(0xB8, 0x68),
1074     _INIT_DELAY_CMD(150),
1075     {},
1076 };
1077 
1078 static const struct panel_init_cmd auo_kd101n80_45na_init_cmd[] = {
1079     _INIT_DELAY_CMD(24),
1080     _INIT_DCS_CMD(0x11),
1081     _INIT_DELAY_CMD(120),
1082     _INIT_DCS_CMD(0x29),
1083     _INIT_DELAY_CMD(120),
1084     {},
1085 };
1086 
1087 static const struct panel_init_cmd auo_b101uan08_3_init_cmd[] = {
1088     _INIT_DELAY_CMD(24),
1089     _INIT_DCS_CMD(0xB0, 0x01),
1090     _INIT_DCS_CMD(0xC0, 0x48),
1091     _INIT_DCS_CMD(0xC1, 0x48),
1092     _INIT_DCS_CMD(0xC2, 0x47),
1093     _INIT_DCS_CMD(0xC3, 0x47),
1094     _INIT_DCS_CMD(0xC4, 0x46),
1095     _INIT_DCS_CMD(0xC5, 0x46),
1096     _INIT_DCS_CMD(0xC6, 0x45),
1097     _INIT_DCS_CMD(0xC7, 0x45),
1098     _INIT_DCS_CMD(0xC8, 0x64),
1099     _INIT_DCS_CMD(0xC9, 0x64),
1100     _INIT_DCS_CMD(0xCA, 0x4F),
1101     _INIT_DCS_CMD(0xCB, 0x4F),
1102     _INIT_DCS_CMD(0xCC, 0x40),
1103     _INIT_DCS_CMD(0xCD, 0x40),
1104     _INIT_DCS_CMD(0xCE, 0x66),
1105     _INIT_DCS_CMD(0xCF, 0x66),
1106     _INIT_DCS_CMD(0xD0, 0x4F),
1107     _INIT_DCS_CMD(0xD1, 0x4F),
1108     _INIT_DCS_CMD(0xD2, 0x41),
1109     _INIT_DCS_CMD(0xD3, 0x41),
1110     _INIT_DCS_CMD(0xD4, 0x48),
1111     _INIT_DCS_CMD(0xD5, 0x48),
1112     _INIT_DCS_CMD(0xD6, 0x47),
1113     _INIT_DCS_CMD(0xD7, 0x47),
1114     _INIT_DCS_CMD(0xD8, 0x46),
1115     _INIT_DCS_CMD(0xD9, 0x46),
1116     _INIT_DCS_CMD(0xDA, 0x45),
1117     _INIT_DCS_CMD(0xDB, 0x45),
1118     _INIT_DCS_CMD(0xDC, 0x64),
1119     _INIT_DCS_CMD(0xDD, 0x64),
1120     _INIT_DCS_CMD(0xDE, 0x4F),
1121     _INIT_DCS_CMD(0xDF, 0x4F),
1122     _INIT_DCS_CMD(0xE0, 0x40),
1123     _INIT_DCS_CMD(0xE1, 0x40),
1124     _INIT_DCS_CMD(0xE2, 0x66),
1125     _INIT_DCS_CMD(0xE3, 0x66),
1126     _INIT_DCS_CMD(0xE4, 0x4F),
1127     _INIT_DCS_CMD(0xE5, 0x4F),
1128     _INIT_DCS_CMD(0xE6, 0x41),
1129     _INIT_DCS_CMD(0xE7, 0x41),
1130     _INIT_DELAY_CMD(150),
1131     {},
1132 };
1133 
1134 static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
1135 {
1136     return container_of(panel, struct boe_panel, base);
1137 }
1138 
1139 static int boe_panel_init_dcs_cmd(struct boe_panel *boe)
1140 {
1141     struct mipi_dsi_device *dsi = boe->dsi;
1142     struct drm_panel *panel = &boe->base;
1143     int i, err = 0;
1144 
1145     if (boe->desc->init_cmds) {
1146         const struct panel_init_cmd *init_cmds = boe->desc->init_cmds;
1147 
1148         for (i = 0; init_cmds[i].len != 0; i++) {
1149             const struct panel_init_cmd *cmd = &init_cmds[i];
1150 
1151             switch (cmd->type) {
1152             case DELAY_CMD:
1153                 msleep(cmd->data[0]);
1154                 err = 0;
1155                 break;
1156 
1157             case INIT_DCS_CMD:
1158                 err = mipi_dsi_dcs_write(dsi, cmd->data[0],
1159                              cmd->len <= 1 ? NULL :
1160                              &cmd->data[1],
1161                              cmd->len - 1);
1162                 break;
1163 
1164             default:
1165                 err = -EINVAL;
1166             }
1167 
1168             if (err < 0) {
1169                 dev_err(panel->dev,
1170                     "failed to write command %u\n", i);
1171                 return err;
1172             }
1173         }
1174     }
1175     return 0;
1176 }
1177 
1178 static int boe_panel_enter_sleep_mode(struct boe_panel *boe)
1179 {
1180     struct mipi_dsi_device *dsi = boe->dsi;
1181     int ret;
1182 
1183     dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
1184 
1185     ret = mipi_dsi_dcs_set_display_off(dsi);
1186     if (ret < 0)
1187         return ret;
1188 
1189     ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
1190     if (ret < 0)
1191         return ret;
1192 
1193     return 0;
1194 }
1195 
1196 static int boe_panel_unprepare(struct drm_panel *panel)
1197 {
1198     struct boe_panel *boe = to_boe_panel(panel);
1199     int ret;
1200 
1201     if (!boe->prepared)
1202         return 0;
1203 
1204     ret = boe_panel_enter_sleep_mode(boe);
1205     if (ret < 0) {
1206         dev_err(panel->dev, "failed to set panel off: %d\n", ret);
1207         return ret;
1208     }
1209 
1210     msleep(150);
1211 
1212     if (boe->desc->discharge_on_disable) {
1213         regulator_disable(boe->avee);
1214         regulator_disable(boe->avdd);
1215         usleep_range(5000, 7000);
1216         gpiod_set_value(boe->enable_gpio, 0);
1217         usleep_range(5000, 7000);
1218         regulator_disable(boe->pp1800);
1219         regulator_disable(boe->pp3300);
1220     } else {
1221         gpiod_set_value(boe->enable_gpio, 0);
1222         usleep_range(1000, 2000);
1223         regulator_disable(boe->avee);
1224         regulator_disable(boe->avdd);
1225         usleep_range(5000, 7000);
1226         regulator_disable(boe->pp1800);
1227         regulator_disable(boe->pp3300);
1228     }
1229 
1230     boe->prepared = false;
1231 
1232     return 0;
1233 }
1234 
1235 static int boe_panel_prepare(struct drm_panel *panel)
1236 {
1237     struct boe_panel *boe = to_boe_panel(panel);
1238     int ret;
1239 
1240     if (boe->prepared)
1241         return 0;
1242 
1243     gpiod_set_value(boe->enable_gpio, 0);
1244     usleep_range(1000, 1500);
1245 
1246     ret = regulator_enable(boe->pp3300);
1247     if (ret < 0)
1248         return ret;
1249 
1250     ret = regulator_enable(boe->pp1800);
1251     if (ret < 0)
1252         return ret;
1253 
1254     usleep_range(3000, 5000);
1255 
1256     ret = regulator_enable(boe->avdd);
1257     if (ret < 0)
1258         goto poweroff1v8;
1259     ret = regulator_enable(boe->avee);
1260     if (ret < 0)
1261         goto poweroffavdd;
1262 
1263     usleep_range(10000, 11000);
1264 
1265     gpiod_set_value(boe->enable_gpio, 1);
1266     usleep_range(1000, 2000);
1267     gpiod_set_value(boe->enable_gpio, 0);
1268     usleep_range(1000, 2000);
1269     gpiod_set_value(boe->enable_gpio, 1);
1270     usleep_range(6000, 10000);
1271 
1272     ret = boe_panel_init_dcs_cmd(boe);
1273     if (ret < 0) {
1274         dev_err(panel->dev, "failed to init panel: %d\n", ret);
1275         goto poweroff;
1276     }
1277 
1278     boe->prepared = true;
1279 
1280     return 0;
1281 
1282 poweroff:
1283     regulator_disable(boe->avee);
1284 poweroffavdd:
1285     regulator_disable(boe->avdd);
1286 poweroff1v8:
1287     usleep_range(5000, 7000);
1288     regulator_disable(boe->pp1800);
1289     gpiod_set_value(boe->enable_gpio, 0);
1290 
1291     return ret;
1292 }
1293 
1294 static int boe_panel_enable(struct drm_panel *panel)
1295 {
1296     msleep(130);
1297     return 0;
1298 }
1299 
1300 static const struct drm_display_mode boe_tv110c9m_default_mode = {
1301     .clock = 166594,
1302     .hdisplay = 1200,
1303     .hsync_start = 1200 + 40,
1304     .hsync_end = 1200 + 40 + 8,
1305     .htotal = 1200 + 40 + 8 + 28,
1306     .vdisplay = 2000,
1307     .vsync_start = 2000 + 26,
1308     .vsync_end = 2000 + 26 + 2,
1309     .vtotal = 2000 + 26 + 2 + 148,
1310     .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1311 };
1312 
1313 static const struct panel_desc boe_tv110c9m_desc = {
1314     .modes = &boe_tv110c9m_default_mode,
1315     .bpc = 8,
1316     .size = {
1317         .width_mm = 143,
1318         .height_mm = 238,
1319     },
1320     .lanes = 4,
1321     .format = MIPI_DSI_FMT_RGB888,
1322     .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1323             | MIPI_DSI_MODE_VIDEO_HSE
1324             | MIPI_DSI_CLOCK_NON_CONTINUOUS
1325             | MIPI_DSI_MODE_VIDEO_BURST,
1326     .init_cmds = boe_tv110c9m_init_cmd,
1327 };
1328 
1329 static const struct drm_display_mode inx_hj110iz_default_mode = {
1330     .clock = 166594,
1331     .hdisplay = 1200,
1332     .hsync_start = 1200 + 40,
1333     .hsync_end = 1200 + 40 + 8,
1334     .htotal = 1200 + 40 + 8 + 28,
1335     .vdisplay = 2000,
1336     .vsync_start = 2000 + 26,
1337     .vsync_end = 2000 + 26 + 1,
1338     .vtotal = 2000 + 26 + 1 + 149,
1339     .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1340 };
1341 
1342 static const struct panel_desc inx_hj110iz_desc = {
1343     .modes = &inx_hj110iz_default_mode,
1344     .bpc = 8,
1345     .size = {
1346         .width_mm = 143,
1347         .height_mm = 238,
1348     },
1349     .lanes = 4,
1350     .format = MIPI_DSI_FMT_RGB888,
1351     .mode_flags = MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO
1352             | MIPI_DSI_MODE_VIDEO_HSE
1353             | MIPI_DSI_CLOCK_NON_CONTINUOUS
1354             | MIPI_DSI_MODE_VIDEO_BURST,
1355     .init_cmds = inx_hj110iz_init_cmd,
1356 };
1357 
1358 static const struct drm_display_mode boe_tv101wum_nl6_default_mode = {
1359     .clock = 159425,
1360     .hdisplay = 1200,
1361     .hsync_start = 1200 + 100,
1362     .hsync_end = 1200 + 100 + 40,
1363     .htotal = 1200 + 100 + 40 + 24,
1364     .vdisplay = 1920,
1365     .vsync_start = 1920 + 10,
1366     .vsync_end = 1920 + 10 + 14,
1367     .vtotal = 1920 + 10 + 14 + 4,
1368 };
1369 
1370 static const struct panel_desc boe_tv101wum_nl6_desc = {
1371     .modes = &boe_tv101wum_nl6_default_mode,
1372     .bpc = 8,
1373     .size = {
1374         .width_mm = 135,
1375         .height_mm = 216,
1376     },
1377     .lanes = 4,
1378     .format = MIPI_DSI_FMT_RGB888,
1379     .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1380               MIPI_DSI_MODE_LPM,
1381     .init_cmds = boe_init_cmd,
1382     .discharge_on_disable = false,
1383 };
1384 
1385 static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
1386     .clock = 157000,
1387     .hdisplay = 1200,
1388     .hsync_start = 1200 + 60,
1389     .hsync_end = 1200 + 60 + 24,
1390     .htotal = 1200 + 60 + 24 + 56,
1391     .vdisplay = 1920,
1392     .vsync_start = 1920 + 16,
1393     .vsync_end = 1920 + 16 + 4,
1394     .vtotal = 1920 + 16 + 4 + 16,
1395 };
1396 
1397 static const struct panel_desc auo_kd101n80_45na_desc = {
1398     .modes = &auo_kd101n80_45na_default_mode,
1399     .bpc = 8,
1400     .size = {
1401         .width_mm = 135,
1402         .height_mm = 216,
1403     },
1404     .lanes = 4,
1405     .format = MIPI_DSI_FMT_RGB888,
1406     .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1407               MIPI_DSI_MODE_LPM,
1408     .init_cmds = auo_kd101n80_45na_init_cmd,
1409     .discharge_on_disable = true,
1410 };
1411 
1412 static const struct drm_display_mode boe_tv101wum_n53_default_mode = {
1413     .clock = 159916,
1414     .hdisplay = 1200,
1415     .hsync_start = 1200 + 80,
1416     .hsync_end = 1200 + 80 + 24,
1417     .htotal = 1200 + 80 + 24 + 60,
1418     .vdisplay = 1920,
1419     .vsync_start = 1920 + 20,
1420     .vsync_end = 1920 + 20 + 4,
1421     .vtotal = 1920 + 20 + 4 + 10,
1422     .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1423 };
1424 
1425 static const struct panel_desc boe_tv101wum_n53_desc = {
1426     .modes = &boe_tv101wum_n53_default_mode,
1427     .bpc = 8,
1428     .size = {
1429         .width_mm = 135,
1430         .height_mm = 216,
1431     },
1432     .lanes = 4,
1433     .format = MIPI_DSI_FMT_RGB888,
1434     .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1435               MIPI_DSI_MODE_LPM,
1436     .init_cmds = boe_init_cmd,
1437 };
1438 
1439 static const struct drm_display_mode auo_b101uan08_3_default_mode = {
1440     .clock = 159667,
1441     .hdisplay = 1200,
1442     .hsync_start = 1200 + 60,
1443     .hsync_end = 1200 + 60 + 4,
1444     .htotal = 1200 + 60 + 4 + 80,
1445     .vdisplay = 1920,
1446     .vsync_start = 1920 + 34,
1447     .vsync_end = 1920 + 34 + 2,
1448     .vtotal = 1920 + 34 + 2 + 24,
1449     .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1450 };
1451 
1452 static const struct panel_desc auo_b101uan08_3_desc = {
1453     .modes = &auo_b101uan08_3_default_mode,
1454     .bpc = 8,
1455     .size = {
1456         .width_mm = 135,
1457         .height_mm = 216,
1458     },
1459     .lanes = 4,
1460     .format = MIPI_DSI_FMT_RGB888,
1461     .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1462               MIPI_DSI_MODE_LPM,
1463     .init_cmds = auo_b101uan08_3_init_cmd,
1464 };
1465 
1466 static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
1467     .clock = 159916,
1468     .hdisplay = 1200,
1469     .hsync_start = 1200 + 80,
1470     .hsync_end = 1200 + 80 + 24,
1471     .htotal = 1200 + 80 + 24 + 60,
1472     .vdisplay = 1920,
1473     .vsync_start = 1920 + 20,
1474     .vsync_end = 1920 + 20 + 4,
1475     .vtotal = 1920 + 20 + 4 + 10,
1476     .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1477 };
1478 
1479 static const struct panel_desc boe_tv105wum_nw0_desc = {
1480     .modes = &boe_tv105wum_nw0_default_mode,
1481     .bpc = 8,
1482     .size = {
1483         .width_mm = 141,
1484         .height_mm = 226,
1485     },
1486     .lanes = 4,
1487     .format = MIPI_DSI_FMT_RGB888,
1488     .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
1489               MIPI_DSI_MODE_LPM,
1490     .init_cmds = boe_init_cmd,
1491 };
1492 
1493 static int boe_panel_get_modes(struct drm_panel *panel,
1494                    struct drm_connector *connector)
1495 {
1496     struct boe_panel *boe = to_boe_panel(panel);
1497     const struct drm_display_mode *m = boe->desc->modes;
1498     struct drm_display_mode *mode;
1499 
1500     mode = drm_mode_duplicate(connector->dev, m);
1501     if (!mode) {
1502         dev_err(panel->dev, "failed to add mode %ux%u@%u\n",
1503             m->hdisplay, m->vdisplay, drm_mode_vrefresh(m));
1504         return -ENOMEM;
1505     }
1506 
1507     mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1508     drm_mode_set_name(mode);
1509     drm_mode_probed_add(connector, mode);
1510 
1511     connector->display_info.width_mm = boe->desc->size.width_mm;
1512     connector->display_info.height_mm = boe->desc->size.height_mm;
1513     connector->display_info.bpc = boe->desc->bpc;
1514     /*
1515      * TODO: Remove once all drm drivers call
1516      * drm_connector_set_orientation_from_panel()
1517      */
1518     drm_connector_set_panel_orientation(connector, boe->orientation);
1519 
1520     return 1;
1521 }
1522 
1523 static enum drm_panel_orientation boe_panel_get_orientation(struct drm_panel *panel)
1524 {
1525     struct boe_panel *boe = to_boe_panel(panel);
1526 
1527     return boe->orientation;
1528 }
1529 
1530 static const struct drm_panel_funcs boe_panel_funcs = {
1531     .unprepare = boe_panel_unprepare,
1532     .prepare = boe_panel_prepare,
1533     .enable = boe_panel_enable,
1534     .get_modes = boe_panel_get_modes,
1535     .get_orientation = boe_panel_get_orientation,
1536 };
1537 
1538 static int boe_panel_add(struct boe_panel *boe)
1539 {
1540     struct device *dev = &boe->dsi->dev;
1541     int err;
1542 
1543     boe->avdd = devm_regulator_get(dev, "avdd");
1544     if (IS_ERR(boe->avdd))
1545         return PTR_ERR(boe->avdd);
1546 
1547     boe->avee = devm_regulator_get(dev, "avee");
1548     if (IS_ERR(boe->avee))
1549         return PTR_ERR(boe->avee);
1550 
1551     boe->pp3300 = devm_regulator_get(dev, "pp3300");
1552     if (IS_ERR(boe->pp3300))
1553         return PTR_ERR(boe->pp3300);
1554 
1555     boe->pp1800 = devm_regulator_get(dev, "pp1800");
1556     if (IS_ERR(boe->pp1800))
1557         return PTR_ERR(boe->pp1800);
1558 
1559     boe->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_LOW);
1560     if (IS_ERR(boe->enable_gpio)) {
1561         dev_err(dev, "cannot get reset-gpios %ld\n",
1562             PTR_ERR(boe->enable_gpio));
1563         return PTR_ERR(boe->enable_gpio);
1564     }
1565 
1566     gpiod_set_value(boe->enable_gpio, 0);
1567 
1568     drm_panel_init(&boe->base, dev, &boe_panel_funcs,
1569                DRM_MODE_CONNECTOR_DSI);
1570     err = of_drm_get_panel_orientation(dev->of_node, &boe->orientation);
1571     if (err < 0) {
1572         dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
1573         return err;
1574     }
1575 
1576     err = drm_panel_of_backlight(&boe->base);
1577     if (err)
1578         return err;
1579 
1580     boe->base.funcs = &boe_panel_funcs;
1581     boe->base.dev = &boe->dsi->dev;
1582 
1583     drm_panel_add(&boe->base);
1584 
1585     return 0;
1586 }
1587 
1588 static int boe_panel_probe(struct mipi_dsi_device *dsi)
1589 {
1590     struct boe_panel *boe;
1591     int ret;
1592     const struct panel_desc *desc;
1593 
1594     boe = devm_kzalloc(&dsi->dev, sizeof(*boe), GFP_KERNEL);
1595     if (!boe)
1596         return -ENOMEM;
1597 
1598     desc = of_device_get_match_data(&dsi->dev);
1599     dsi->lanes = desc->lanes;
1600     dsi->format = desc->format;
1601     dsi->mode_flags = desc->mode_flags;
1602     boe->desc = desc;
1603     boe->dsi = dsi;
1604     ret = boe_panel_add(boe);
1605     if (ret < 0)
1606         return ret;
1607 
1608     mipi_dsi_set_drvdata(dsi, boe);
1609 
1610     ret = mipi_dsi_attach(dsi);
1611     if (ret)
1612         drm_panel_remove(&boe->base);
1613 
1614     return ret;
1615 }
1616 
1617 static void boe_panel_shutdown(struct mipi_dsi_device *dsi)
1618 {
1619     struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1620 
1621     drm_panel_disable(&boe->base);
1622     drm_panel_unprepare(&boe->base);
1623 }
1624 
1625 static int boe_panel_remove(struct mipi_dsi_device *dsi)
1626 {
1627     struct boe_panel *boe = mipi_dsi_get_drvdata(dsi);
1628     int ret;
1629 
1630     boe_panel_shutdown(dsi);
1631 
1632     ret = mipi_dsi_detach(dsi);
1633     if (ret < 0)
1634         dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", ret);
1635 
1636     if (boe->base.dev)
1637         drm_panel_remove(&boe->base);
1638 
1639     return 0;
1640 }
1641 
1642 static const struct of_device_id boe_of_match[] = {
1643     { .compatible = "boe,tv101wum-nl6",
1644       .data = &boe_tv101wum_nl6_desc
1645     },
1646     { .compatible = "auo,kd101n80-45na",
1647       .data = &auo_kd101n80_45na_desc
1648     },
1649     { .compatible = "boe,tv101wum-n53",
1650       .data = &boe_tv101wum_n53_desc
1651     },
1652     { .compatible = "auo,b101uan08.3",
1653       .data = &auo_b101uan08_3_desc
1654     },
1655     { .compatible = "boe,tv105wum-nw0",
1656       .data = &boe_tv105wum_nw0_desc
1657     },
1658     { .compatible = "boe,tv110c9m-ll3",
1659       .data = &boe_tv110c9m_desc
1660     },
1661     { .compatible = "innolux,hj110iz-01a",
1662       .data = &inx_hj110iz_desc
1663     },
1664     { /* sentinel */ }
1665 };
1666 MODULE_DEVICE_TABLE(of, boe_of_match);
1667 
1668 static struct mipi_dsi_driver boe_panel_driver = {
1669     .driver = {
1670         .name = "panel-boe-tv101wum-nl6",
1671         .of_match_table = boe_of_match,
1672     },
1673     .probe = boe_panel_probe,
1674     .remove = boe_panel_remove,
1675     .shutdown = boe_panel_shutdown,
1676 };
1677 module_mipi_dsi_driver(boe_panel_driver);
1678 
1679 MODULE_AUTHOR("Jitao Shi <jitao.shi@mediatek.com>");
1680 MODULE_DESCRIPTION("BOE tv101wum-nl6 1200x1920 video mode panel driver");
1681 MODULE_LICENSE("GPL v2");
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