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0024 #include "priv.h"
0025 #include "regsnv04.h"
0026
0027 static void
0028 nv41_timer_init(struct nvkm_timer *tmr)
0029 {
0030 struct nvkm_subdev *subdev = &tmr->subdev;
0031 struct nvkm_device *device = subdev->device;
0032 u32 f = device->crystal;
0033 u32 m = 1, n, d;
0034
0035
0036 d = 1000000 / 32;
0037 n = f;
0038
0039 while (n < (d * 2)) {
0040 n += (n / m);
0041 m++;
0042 }
0043
0044
0045 while (((n % 5) == 0) && ((d % 5) == 0)) {
0046 n /= 5;
0047 d /= 5;
0048 }
0049
0050 while (((n % 2) == 0) && ((d % 2) == 0)) {
0051 n /= 2;
0052 d /= 2;
0053 }
0054
0055 while (n > 0xffff || d > 0xffff) {
0056 n >>= 1;
0057 d >>= 1;
0058 }
0059
0060 nvkm_debug(subdev, "input frequency : %dHz\n", f);
0061 nvkm_debug(subdev, "input multiplier: %d\n", m);
0062 nvkm_debug(subdev, "numerator : %08x\n", n);
0063 nvkm_debug(subdev, "denominator : %08x\n", d);
0064 nvkm_debug(subdev, "timer frequency : %dHz\n", (f * m) * d / n);
0065
0066 nvkm_wr32(device, 0x009220, m - 1);
0067 nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n);
0068 nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d);
0069 }
0070
0071 static const struct nvkm_timer_func
0072 nv41_timer = {
0073 .init = nv41_timer_init,
0074 .intr = nv04_timer_intr,
0075 .read = nv04_timer_read,
0076 .time = nv04_timer_time,
0077 .alarm_init = nv04_timer_alarm_init,
0078 .alarm_fini = nv04_timer_alarm_fini,
0079 };
0080
0081 int
0082 nv41_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
0083 struct nvkm_timer **ptmr)
0084 {
0085 return nvkm_timer_new_(&nv41_timer, device, type, inst, ptmr);
0086 }