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0001 /*
0002  * Copyright 2012 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs
0023  */
0024 #include "priv.h"
0025 #include "regsnv04.h"
0026 
0027 static void
0028 nv40_timer_init(struct nvkm_timer *tmr)
0029 {
0030     struct nvkm_subdev *subdev = &tmr->subdev;
0031     struct nvkm_device *device = subdev->device;
0032     u32 f = 0; /*XXX: figure this out */
0033     u32 n, d;
0034 
0035     /* aim for 31.25MHz, which gives us nanosecond timestamps */
0036     d = 1000000 / 32;
0037     n = f;
0038 
0039     if (!f) {
0040         n = nvkm_rd32(device, NV04_PTIMER_NUMERATOR);
0041         d = nvkm_rd32(device, NV04_PTIMER_DENOMINATOR);
0042         if (!n || !d) {
0043             n = 1;
0044             d = 1;
0045         }
0046         nvkm_warn(subdev, "unknown input clock freq\n");
0047     }
0048 
0049     /* reduce ratio to acceptable values */
0050     while (((n % 5) == 0) && ((d % 5) == 0)) {
0051         n /= 5;
0052         d /= 5;
0053     }
0054 
0055     while (((n % 2) == 0) && ((d % 2) == 0)) {
0056         n /= 2;
0057         d /= 2;
0058     }
0059 
0060     while (n > 0xffff || d > 0xffff) {
0061         n >>= 1;
0062         d >>= 1;
0063     }
0064 
0065     nvkm_debug(subdev, "input frequency : %dHz\n", f);
0066     nvkm_debug(subdev, "numerator       : %08x\n", n);
0067     nvkm_debug(subdev, "denominator     : %08x\n", d);
0068     nvkm_debug(subdev, "timer frequency : %dHz\n", f * d / n);
0069 
0070     nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n);
0071     nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d);
0072 }
0073 
0074 static const struct nvkm_timer_func
0075 nv40_timer = {
0076     .init = nv40_timer_init,
0077     .intr = nv04_timer_intr,
0078     .read = nv04_timer_read,
0079     .time = nv04_timer_time,
0080     .alarm_init = nv04_timer_alarm_init,
0081     .alarm_fini = nv04_timer_alarm_fini,
0082 };
0083 
0084 int
0085 nv40_timer_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
0086            struct nvkm_timer **ptmr)
0087 {
0088     return nvkm_timer_new_(&nv40_timer, device, type, inst, ptmr);
0089 }