subdev/pmu/gk104.c

0001 /*
0002  * Copyright 2013 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs
0023  */
0024 #define gf119_pmu_code gk104_pmu_code
0025 #define gf119_pmu_data gk104_pmu_data
0026 #include "priv.h"
0027 #include "fuc/gf119.fuc4.h"
0028
0029 #include <core/option.h>
0030 #include <subdev/fuse.h>
0031 #include <subdev/timer.h>
0032
0033 static void
0034 magic_(struct nvkm_device *device, u32 ctrl, int size)
0035 {
0036     nvkm_wr32(device, 0x00c800, 0x00000000);
0037     nvkm_wr32(device, 0x00c808, 0x00000000);
0038     nvkm_wr32(device, 0x00c800, ctrl);
0039     nvkm_msec(device, 2000,
0040         if (nvkm_rd32(device, 0x00c800) & 0x40000000) {
0041             while (size--)
0042                 nvkm_wr32(device, 0x00c804, 0x00000000);
0043             break;
0044         }
0045     );
0046     nvkm_wr32(device, 0x00c800, 0x00000000);
0047 }
0048
0049 static void
0050 magic(struct nvkm_device *device, u32 ctrl)
0051 {
0052     magic_(device, 0x8000a41f | ctrl, 6);
0053     magic_(device, 0x80000421 | ctrl, 1);
0054 }
0055
0056 static void
0057 gk104_pmu_pgob(struct nvkm_pmu *pmu, bool enable)
0058 {
0059     struct nvkm_device *device = pmu->subdev.device;
0060
0061     if (!(nvkm_fuse_read(device->fuse, 0x31c) & 0x00000001))
0062         return;
0063
0064     nvkm_mask(device, 0x000200, 0x00001000, 0x00000000);
0065     nvkm_rd32(device, 0x000200);
0066     nvkm_mask(device, 0x000200, 0x08000000, 0x08000000);
0067     msleep(50);
0068
0069     nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000002);
0070     nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001);
0071     nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000);
0072
0073     nvkm_mask(device, 0x020004, 0xc0000000, enable ? 0xc0000000 : 0x40000000);
0074     msleep(50);
0075
0076     nvkm_mask(device, 0x10a78c, 0x00000002, 0x00000000);
0077     nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000001);
0078     nvkm_mask(device, 0x10a78c, 0x00000001, 0x00000000);
0079
0080     nvkm_mask(device, 0x000200, 0x08000000, 0x00000000);
0081     nvkm_mask(device, 0x000200, 0x00001000, 0x00001000);
0082     nvkm_rd32(device, 0x000200);
0083
0084     if (nvkm_boolopt(device->cfgopt, "War00C800_0", true)) {
0085         switch (device->chipset) {
0086         case 0xe4:
0087             magic(device, 0x04000000);
0088             magic(device, 0x06000000);
0089             magic(device, 0x0c000000);
0090             magic(device, 0x0e000000);
0091             break;
0092         case 0xe6:
0093             magic(device, 0x02000000);
0094             magic(device, 0x04000000);
0095             magic(device, 0x0a000000);
0096             break;
0097         case 0xe7:
0098             magic(device, 0x02000000);
0099             break;
0100         default:
0101             break;
0102         }
0103     }
0104 }
0105
0106 static const struct nvkm_pmu_func
0107 gk104_pmu = {
0108     .flcn = &gt215_pmu_flcn,
0109     .code.data = gk104_pmu_code,
0110     .code.size = sizeof(gk104_pmu_code),
0111     .data.data = gk104_pmu_data,
0112     .data.size = sizeof(gk104_pmu_data),
0113     .enabled = gf100_pmu_enabled,
0114     .reset = gf100_pmu_reset,
0115     .init = gt215_pmu_init,
0116     .fini = gt215_pmu_fini,
0117     .intr = gt215_pmu_intr,
0118     .send = gt215_pmu_send,
0119     .recv = gt215_pmu_recv,
0120     .pgob = gk104_pmu_pgob,
0121 };
0122
0123 static const struct nvkm_pmu_fwif
0124 gk104_pmu_fwif[] = {
0125     { -1, gf100_pmu_nofw, &gk104_pmu },
0126     {}
0127 };
0128
0129 int
0130 gk104_pmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
0131           struct nvkm_pmu **ppmu)
0132 {
0133     return nvkm_pmu_new_(gk104_pmu_fwif, device, type, inst, ppmu);
0134 }