0001 /*
0002 * Copyright 2013 Red Hat Inc.
0003 *
0004 * Permission is hereby granted, free of charge, to any person obtaining a
0005 * copy of this software and associated documentation files (the "Software"),
0006 * to deal in the Software without restriction, including without limitation
0007 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008 * and/or sell copies of the Software, and to permit persons to whom the
0009 * Software is furnished to do so, subject to the following conditions:
0010 *
0011 * The above copyright notice and this permission notice shall be included in
0012 * all copies or substantial portions of the Software.
0013 *
0014 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
0017 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020 * OTHER DEALINGS IN THE SOFTWARE.
0021 *
0022 * Authors: Ben Skeggs
0023 */
0024
0025 #ifdef INCLUDE_PROC
0026 process(PROC_HOST, #host_init, #host_recv)
0027 #endif
0028
0029 /******************************************************************************
0030 * HOST data segment
0031 *****************************************************************************/
0032 #ifdef INCLUDE_DATA
0033 // HOST (R)FIFO packet format
0034 .equ #fifo_process 0x00
0035 .equ #fifo_message 0x04
0036 .equ #fifo_data0 0x08
0037 .equ #fifo_data1 0x0c
0038
0039 // HOST HOST->PWR queue description
0040 .equ #fifo_qlen 4 // log2(size of queue entry in bytes)
0041 .equ #fifo_qnum 3 // log2(max number of entries in queue)
0042 .equ #fifo_qmaskb (1 << #fifo_qnum) // max number of entries in queue
0043 .equ #fifo_qmaskp (#fifo_qmaskb - 1)
0044 .equ #fifo_qmaskf ((#fifo_qmaskb << 1) - 1)
0045 .equ #fifo_qsize (1 << (#fifo_qlen + #fifo_qnum))
0046 fifo_queue: .skip 128 // #fifo_qsize
0047
0048 // HOST PWR->HOST queue description
0049 .equ #rfifo_qlen 4 // log2(size of queue entry in bytes)
0050 .equ #rfifo_qnum 3 // log2(max number of entries in queue)
0051 .equ #rfifo_qmaskb (1 << #rfifo_qnum) // max number of entries in queue
0052 .equ #rfifo_qmaskp (#rfifo_qmaskb - 1)
0053 .equ #rfifo_qmaskf ((#rfifo_qmaskb << 1) - 1)
0054 .equ #rfifo_qsize (1 << (#rfifo_qlen + #rfifo_qnum))
0055 rfifo_queue: .skip 128 // #rfifo_qsize
0056 #endif
0057
0058 /******************************************************************************
0059 * HOST code segment
0060 *****************************************************************************/
0061 #ifdef INCLUDE_CODE
0062 // HOST->PWR comms - dequeue message(s) for process(es) from FIFO
0063 //
0064 // $r15 - current (host)
0065 // $r0 - zero
0066 host_send:
0067 nv_iord($r1, NV_PPWR_FIFO_GET(0))
0068 nv_iord($r2, NV_PPWR_FIFO_PUT(0))
0069 cmp b32 $r1 $r2
0070 bra e #host_send_done
0071 // calculate address of message
0072 and $r14 $r1 #fifo_qmaskp
0073 shl b32 $r14 $r14 #fifo_qlen
0074 add b32 $r14 #fifo_queue
0075
0076 // read message data, and pass to appropriate process
0077 ld b32 $r11 D[$r14 + #fifo_data1]
0078 ld b32 $r12 D[$r14 + #fifo_data0]
0079 ld b32 $r13 D[$r14 + #fifo_message]
0080 ld b32 $r14 D[$r14 + #fifo_process]
0081 call(send)
0082
0083 // increment GET
0084 add b32 $r1 0x1
0085 and $r14 $r1 #fifo_qmaskf
0086 nv_iowr(NV_PPWR_FIFO_GET(0), $r14)
0087 bra #host_send
0088 host_send_done:
0089 ret
0090
0091 // PWR->HOST comms - enqueue message for HOST to RFIFO
0092 //
0093 // $r15 - current (host)
0094 // $r14 - process
0095 // $r13 - message
0096 // $r12 - message data 0
0097 // $r11 - message data 1
0098 // $r0 - zero
0099 host_recv:
0100 // message from intr handler == HOST->PWR comms pending
0101 imm32($r1, PROC_KERN)
0102 cmp b32 $r14 $r1
0103 bra e #host_send
0104
0105 // wait for space in RFIFO
0106 host_recv_wait:
0107 nv_iord($r1, NV_PPWR_RFIFO_GET)
0108 nv_iord($r2, NV_PPWR_RFIFO_PUT)
0109 xor $r1 #rfifo_qmaskb
0110 cmp b32 $r1 $r2
0111 bra e #host_recv_wait
0112
0113 and $r3 $r2 #rfifo_qmaskp
0114 shl b32 $r3 #rfifo_qlen
0115 add b32 $r3 #rfifo_queue
0116
0117 // enqueue message
0118 st b32 D[$r3 + #fifo_data1] $r11
0119 st b32 D[$r3 + #fifo_data0] $r12
0120 st b32 D[$r3 + #fifo_message] $r13
0121 st b32 D[$r3 + #fifo_process] $r14
0122
0123 add b32 $r2 0x1
0124 and $r2 #rfifo_qmaskf
0125 nv_iowr(NV_PPWR_RFIFO_PUT, $r2)
0126
0127 // notify host of pending message
0128 mov $r2 NV_PPWR_INTR_TRIGGER_USER0
0129 nv_iowr(NV_PPWR_INTR_TRIGGER, $r2)
0130 ret
0131
0132 // $r15 - current (host)
0133 // $r0 - zero
0134 host_init:
0135 // store each fifo's base/size in H2D/D2H scratch regs
0136 mov $r1 #fifo_qsize
0137 shl b32 $r1 16
0138 or $r1 #fifo_queue
0139 nv_iowr(NV_PPWR_H2D, $r1);
0140
0141 mov $r1 #rfifo_qsize
0142 shl b32 $r1 16
0143 or $r1 #rfifo_queue
0144 nv_iowr(NV_PPWR_D2H, $r1);
0145
0146 // enable fifo subintr for first fifo
0147 mov $r1 1
0148 nv_iowr(NV_PPWR_FIFO_INTR_EN, $r1)
0149 ret
0150 #endif
