subdev/mmu/tu102.c

0001 /*
0002  * Copyright 2018 Red Hat Inc.
0003  * Copyright 2019 NVIDIA Corporation.
0004  *
0005  * Permission is hereby granted, free of charge, to any person obtaining a
0006  * copy of this software and associated documentation files (the "Software"),
0007  * to deal in the Software without restriction, including without limitation
0008  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0009  * and/or sell copies of the Software, and to permit persons to whom the
0010  * Software is furnished to do so, subject to the following conditions:
0011  *
0012  * The above copyright notice and this permission notice shall be included in
0013  * all copies or substantial portions of the Software.
0014  *
0015  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0016  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0017  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0018  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0019  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0020  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0021  * OTHER DEALINGS IN THE SOFTWARE.
0022  */
0023 #include "mem.h"
0024 #include "vmm.h"
0025
0026 #include <core/option.h>
0027
0028 #include <nvif/class.h>
0029
0030 static const u8 *
0031 tu102_mmu_kind(struct nvkm_mmu *mmu, int *count, u8 *invalid)
0032 {
0033     static const u8
0034     kind[16] = {
0035         0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* 0x00 */
0036         0x06, 0x06, 0x02, 0x01, 0x03, 0x04, 0x05, 0x07,
0037     };
0038     *count = ARRAY_SIZE(kind);
0039     *invalid = 0x07;
0040     return kind;
0041 }
0042
0043 static const struct nvkm_mmu_func
0044 tu102_mmu = {
0045     .dma_bits = 47,
0046     .mmu = {{ -1, -1, NVIF_CLASS_MMU_GF100}},
0047     .mem = {{ -1,  0, NVIF_CLASS_MEM_GF100}, gf100_mem_new, gf100_mem_map },
0048     .vmm = {{ -1,  0, NVIF_CLASS_VMM_GP100}, tu102_vmm_new },
0049     .kind = tu102_mmu_kind,
0050     .kind_sys = true,
0051 };
0052
0053 int
0054 tu102_mmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
0055           struct nvkm_mmu **pmmu)
0056 {
0057     return nvkm_mmu_new_(&tu102_mmu, device, type, inst, pmmu);
0058 }