subdev/mmu/nv44.c

0001 /*
0002  * Copyright 2012 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs
0023  */
0024 #include "mem.h"
0025 #include "vmm.h"
0026
0027 #include <core/option.h>
0028
0029 #include <nvif/class.h>
0030
0031 static void
0032 nv44_mmu_init(struct nvkm_mmu *mmu)
0033 {
0034     struct nvkm_device *device = mmu->subdev.device;
0035     struct nvkm_memory *pt = mmu->vmm->pd->pt[0]->memory;
0036     u32 addr;
0037
0038     /* calculate vram address of this PRAMIN block, object must be
0039      * allocated on 512KiB alignment, and not exceed a total size
0040      * of 512KiB for this to work correctly
0041      */
0042     addr  = nvkm_rd32(device, 0x10020c);
0043     addr -= ((nvkm_memory_addr(pt) >> 19) + 1) << 19;
0044
0045     nvkm_wr32(device, 0x100850, 0x80000000);
0046     nvkm_wr32(device, 0x100818, mmu->vmm->null);
0047     nvkm_wr32(device, 0x100804, (nvkm_memory_size(pt) / 4) * 4096);
0048     nvkm_wr32(device, 0x100850, 0x00008000);
0049     nvkm_mask(device, 0x10008c, 0x00000200, 0x00000200);
0050     nvkm_wr32(device, 0x100820, 0x00000000);
0051     nvkm_wr32(device, 0x10082c, 0x00000001);
0052     nvkm_wr32(device, 0x100800, addr | 0x00000010);
0053 }
0054
0055 static const struct nvkm_mmu_func
0056 nv44_mmu = {
0057     .init = nv44_mmu_init,
0058     .dma_bits = 39,
0059     .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV04}},
0060     .mem = {{ -1, -1, NVIF_CLASS_MEM_NV04}, nv04_mem_new, nv04_mem_map },
0061     .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV04}, nv44_vmm_new, true },
0062 };
0063
0064 int
0065 nv44_mmu_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
0066          struct nvkm_mmu **pmmu)
0067 {
0068     if (device->type == NVKM_DEVICE_AGP ||
0069         !nvkm_boolopt(device->cfgopt, "NvPCIE", true))
0070         return nv04_mmu_new(device, type, inst, pmmu);
0071
0072     return nvkm_mmu_new_(&nv44_mmu, device, type, inst, pmmu);
0073 }