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0024 #include "priv.h"
0025
0026 const struct nvkm_mc_map
0027 nv04_mc_reset[] = {
0028 { 0x00001000, NVKM_ENGINE_GR },
0029 { 0x00000100, NVKM_ENGINE_FIFO },
0030 {}
0031 };
0032
0033 static const struct nvkm_mc_map
0034 nv04_mc_intr[] = {
0035 { 0x01010000, NVKM_ENGINE_DISP },
0036 { 0x00001000, NVKM_ENGINE_GR },
0037 { 0x00000100, NVKM_ENGINE_FIFO },
0038 { 0x10000000, NVKM_SUBDEV_BUS },
0039 { 0x00100000, NVKM_SUBDEV_TIMER },
0040 {}
0041 };
0042
0043 void
0044 nv04_mc_intr_unarm(struct nvkm_mc *mc)
0045 {
0046 struct nvkm_device *device = mc->subdev.device;
0047 nvkm_wr32(device, 0x000140, 0x00000000);
0048 nvkm_rd32(device, 0x000140);
0049 }
0050
0051 void
0052 nv04_mc_intr_rearm(struct nvkm_mc *mc)
0053 {
0054 struct nvkm_device *device = mc->subdev.device;
0055 nvkm_wr32(device, 0x000140, 0x00000001);
0056 }
0057
0058 u32
0059 nv04_mc_intr_stat(struct nvkm_mc *mc)
0060 {
0061 return nvkm_rd32(mc->subdev.device, 0x000100);
0062 }
0063
0064 void
0065 nv04_mc_init(struct nvkm_mc *mc)
0066 {
0067 struct nvkm_device *device = mc->subdev.device;
0068 nvkm_wr32(device, 0x000200, 0xffffffff);
0069 nvkm_wr32(device, 0x001850, 0x00000001);
0070 }
0071
0072 static const struct nvkm_mc_func
0073 nv04_mc = {
0074 .init = nv04_mc_init,
0075 .intr = nv04_mc_intr,
0076 .intr_unarm = nv04_mc_intr_unarm,
0077 .intr_rearm = nv04_mc_intr_rearm,
0078 .intr_stat = nv04_mc_intr_stat,
0079 .reset = nv04_mc_reset,
0080 };
0081
0082 int
0083 nv04_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
0084 {
0085 return nvkm_mc_new_(&nv04_mc, device, type, inst, pmc);
0086 }