subdev/mc/gf100.c

0001 /*
0002  * Copyright 2012 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs
0023  */
0024 #include "priv.h"
0025
0026 static const struct nvkm_mc_map
0027 gf100_mc_reset[] = {
0028     { 0x00020000, NVKM_ENGINE_MSPDEC },
0029     { 0x00008000, NVKM_ENGINE_MSVLD },
0030     { 0x00002000, NVKM_SUBDEV_PMU, 0, true },
0031     { 0x00001000, NVKM_ENGINE_GR },
0032     { 0x00000100, NVKM_ENGINE_FIFO },
0033     { 0x00000080, NVKM_ENGINE_CE, 1 },
0034     { 0x00000040, NVKM_ENGINE_CE, 0 },
0035     { 0x00000002, NVKM_ENGINE_MSPPP },
0036     {}
0037 };
0038
0039 static const struct nvkm_mc_map
0040 gf100_mc_intr[] = {
0041     { 0x04000000, NVKM_ENGINE_DISP },
0042     { 0x00020000, NVKM_ENGINE_MSPDEC },
0043     { 0x00008000, NVKM_ENGINE_MSVLD },
0044     { 0x00001000, NVKM_ENGINE_GR },
0045     { 0x00000100, NVKM_ENGINE_FIFO },
0046     { 0x00000040, NVKM_ENGINE_CE, 1 },
0047     { 0x00000020, NVKM_ENGINE_CE, 0 },
0048     { 0x00000001, NVKM_ENGINE_MSPPP },
0049     { 0x40000000, NVKM_SUBDEV_PRIVRING },
0050     { 0x10000000, NVKM_SUBDEV_BUS },
0051     { 0x08000000, NVKM_SUBDEV_FB },
0052     { 0x02000000, NVKM_SUBDEV_LTC },
0053     { 0x01000000, NVKM_SUBDEV_PMU },
0054     { 0x00200000, NVKM_SUBDEV_GPIO },
0055     { 0x00200000, NVKM_SUBDEV_I2C },
0056     { 0x00100000, NVKM_SUBDEV_TIMER },
0057     { 0x00040000, NVKM_SUBDEV_THERM },
0058     { 0x00002000, NVKM_SUBDEV_FB },
0059     {},
0060 };
0061
0062 void
0063 gf100_mc_intr_unarm(struct nvkm_mc *mc)
0064 {
0065     struct nvkm_device *device = mc->subdev.device;
0066     nvkm_wr32(device, 0x000140, 0x00000000);
0067     nvkm_wr32(device, 0x000144, 0x00000000);
0068     nvkm_rd32(device, 0x000140);
0069 }
0070
0071 void
0072 gf100_mc_intr_rearm(struct nvkm_mc *mc)
0073 {
0074     struct nvkm_device *device = mc->subdev.device;
0075     nvkm_wr32(device, 0x000140, 0x00000001);
0076     nvkm_wr32(device, 0x000144, 0x00000001);
0077 }
0078
0079 u32
0080 gf100_mc_intr_stat(struct nvkm_mc *mc)
0081 {
0082     struct nvkm_device *device = mc->subdev.device;
0083     u32 intr0 = nvkm_rd32(device, 0x000100);
0084     u32 intr1 = nvkm_rd32(device, 0x000104);
0085     return intr0 | intr1;
0086 }
0087
0088 void
0089 gf100_mc_intr_mask(struct nvkm_mc *mc, u32 mask, u32 stat)
0090 {
0091     struct nvkm_device *device = mc->subdev.device;
0092     nvkm_mask(device, 0x000640, mask, stat);
0093     nvkm_mask(device, 0x000644, mask, stat);
0094 }
0095
0096 void
0097 gf100_mc_unk260(struct nvkm_mc *mc, u32 data)
0098 {
0099     nvkm_wr32(mc->subdev.device, 0x000260, data);
0100 }
0101
0102 static const struct nvkm_mc_func
0103 gf100_mc = {
0104     .init = nv50_mc_init,
0105     .intr = gf100_mc_intr,
0106     .intr_unarm = gf100_mc_intr_unarm,
0107     .intr_rearm = gf100_mc_intr_rearm,
0108     .intr_mask = gf100_mc_intr_mask,
0109     .intr_stat = gf100_mc_intr_stat,
0110     .reset = gf100_mc_reset,
0111     .unk260 = gf100_mc_unk260,
0112 };
0113
0114 int
0115 gf100_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
0116 {
0117     return nvkm_mc_new_(&gf100_mc, device, type, inst, pmc);
0118 }