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0024 #include "priv.h"
0025
0026 static const struct nvkm_mc_map
0027 g98_mc_reset[] = {
0028 { 0x04008000, NVKM_ENGINE_MSVLD },
0029 { 0x02004000, NVKM_ENGINE_SEC },
0030 { 0x01020000, NVKM_ENGINE_MSPDEC },
0031 { 0x00400002, NVKM_ENGINE_MSPPP },
0032 { 0x00201000, NVKM_ENGINE_GR },
0033 { 0x00000100, NVKM_ENGINE_FIFO },
0034 {}
0035 };
0036
0037 static const struct nvkm_mc_map
0038 g98_mc_intr[] = {
0039 { 0x04000000, NVKM_ENGINE_DISP },
0040 { 0x00020000, NVKM_ENGINE_MSPDEC },
0041 { 0x00008000, NVKM_ENGINE_MSVLD },
0042 { 0x00004000, NVKM_ENGINE_SEC },
0043 { 0x00001000, NVKM_ENGINE_GR },
0044 { 0x00000100, NVKM_ENGINE_FIFO },
0045 { 0x00000001, NVKM_ENGINE_MSPPP },
0046 { 0x0002d101, NVKM_SUBDEV_FB },
0047 { 0x10000000, NVKM_SUBDEV_BUS },
0048 { 0x00200000, NVKM_SUBDEV_GPIO },
0049 { 0x00200000, NVKM_SUBDEV_I2C },
0050 { 0x00100000, NVKM_SUBDEV_TIMER },
0051 {},
0052 };
0053
0054 static const struct nvkm_mc_func
0055 g98_mc = {
0056 .init = nv50_mc_init,
0057 .intr = g98_mc_intr,
0058 .intr_unarm = nv04_mc_intr_unarm,
0059 .intr_rearm = nv04_mc_intr_rearm,
0060 .intr_stat = nv04_mc_intr_stat,
0061 .reset = g98_mc_reset,
0062 };
0063
0064 int
0065 g98_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
0066 {
0067 return nvkm_mc_new_(&g98_mc, device, type, inst, pmc);
0068 }