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0001 /*
0002  * Copyright 2012 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs
0023  */
0024 #include "priv.h"
0025 
0026 static const struct nvkm_mc_map
0027 g84_mc_reset[] = {
0028     { 0x04008000, NVKM_ENGINE_BSP },
0029     { 0x02004000, NVKM_ENGINE_CIPHER },
0030     { 0x01020000, NVKM_ENGINE_VP },
0031     { 0x00400002, NVKM_ENGINE_MPEG },
0032     { 0x00201000, NVKM_ENGINE_GR },
0033     { 0x00000100, NVKM_ENGINE_FIFO },
0034     {}
0035 };
0036 
0037 static const struct nvkm_mc_map
0038 g84_mc_intr[] = {
0039     { 0x04000000, NVKM_ENGINE_DISP },
0040     { 0x00020000, NVKM_ENGINE_VP },
0041     { 0x00008000, NVKM_ENGINE_BSP },
0042     { 0x00004000, NVKM_ENGINE_CIPHER },
0043     { 0x00001000, NVKM_ENGINE_GR },
0044     { 0x00000100, NVKM_ENGINE_FIFO },
0045     { 0x00000001, NVKM_ENGINE_MPEG },
0046     { 0x0002d101, NVKM_SUBDEV_FB },
0047     { 0x10000000, NVKM_SUBDEV_BUS },
0048     { 0x00200000, NVKM_SUBDEV_GPIO },
0049     { 0x00200000, NVKM_SUBDEV_I2C },
0050     { 0x00100000, NVKM_SUBDEV_TIMER },
0051     {},
0052 };
0053 
0054 static const struct nvkm_mc_func
0055 g84_mc = {
0056     .init = nv50_mc_init,
0057     .intr = g84_mc_intr,
0058     .intr_unarm = nv04_mc_intr_unarm,
0059     .intr_rearm = nv04_mc_intr_rearm,
0060     .intr_stat = nv04_mc_intr_stat,
0061     .reset = g84_mc_reset,
0062 };
0063 
0064 int
0065 g84_mc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_mc **pmc)
0066 {
0067     return nvkm_mc_new_(&g84_mc, device, type, inst, pmc);
0068 }