subdev/i2c/priv.h

0001 /* SPDX-License-Identifier: MIT */
0002 #ifndef __NVKM_I2C_PRIV_H__
0003 #define __NVKM_I2C_PRIV_H__
0004 #define nvkm_i2c(p) container_of((p), struct nvkm_i2c, subdev)
0005 #include <subdev/i2c.h>
0006
0007 int nvkm_i2c_new_(const struct nvkm_i2c_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
0008           struct nvkm_i2c **);
0009
0010 struct nvkm_i2c_func {
0011     int (*pad_x_new)(struct nvkm_i2c *, int id, struct nvkm_i2c_pad **);
0012     int (*pad_s_new)(struct nvkm_i2c *, int id, struct nvkm_i2c_pad **);
0013
0014     /* number of native dp aux channels present */
0015     int aux;
0016
0017     /* read and ack pending interrupts, returning only data
0018      * for ports that have not been masked off, while still
0019      * performing the ack for anything that was pending.
0020      */
0021     void (*aux_stat)(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
0022
0023     /* mask on/off interrupt types for a given set of auxch
0024      */
0025     void (*aux_mask)(struct nvkm_i2c *, u32, u32, u32);
0026
0027     /* enable/disable HW-initiated DPCD reads
0028      */
0029     void (*aux_autodpcd)(struct nvkm_i2c *, int aux, bool enable);
0030 };
0031
0032 void g94_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
0033 void g94_aux_mask(struct nvkm_i2c *, u32, u32, u32);
0034
0035 void gk104_aux_stat(struct nvkm_i2c *, u32 *, u32 *, u32 *, u32 *);
0036 void gk104_aux_mask(struct nvkm_i2c *, u32, u32, u32);
0037 #endif