subdev/i2c/auxg94.c

0001 /*
0002  * Copyright 2015 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial busions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs <bskeggs@redhat.com>
0023  */
0024 #define g94_i2c_aux(p) container_of((p), struct g94_i2c_aux, base)
0025 #include "aux.h"
0026
0027 struct g94_i2c_aux {
0028     struct nvkm_i2c_aux base;
0029     int ch;
0030 };
0031
0032 static void
0033 g94_i2c_aux_fini(struct g94_i2c_aux *aux)
0034 {
0035     struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
0036     nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00310000, 0x00000000);
0037 }
0038
0039 static int
0040 g94_i2c_aux_init(struct g94_i2c_aux *aux)
0041 {
0042     struct nvkm_device *device = aux->base.pad->i2c->subdev.device;
0043     const u32 unksel = 1; /* nfi which to use, or if it matters.. */
0044     const u32 ureq = unksel ? 0x00100000 : 0x00200000;
0045     const u32 urep = unksel ? 0x01000000 : 0x02000000;
0046     u32 ctrl, timeout;
0047
0048     /* wait up to 1ms for any previous transaction to be done... */
0049     timeout = 1000;
0050     do {
0051         ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50));
0052         udelay(1);
0053         if (!timeout--) {
0054             AUX_ERR(&aux->base, "begin idle timeout %08x", ctrl);
0055             return -EBUSY;
0056         }
0057     } while (ctrl & 0x03010000);
0058
0059     /* set some magic, and wait up to 1ms for it to appear */
0060     nvkm_mask(device, 0x00e4e4 + (aux->ch * 0x50), 0x00300000, ureq);
0061     timeout = 1000;
0062     do {
0063         ctrl = nvkm_rd32(device, 0x00e4e4 + (aux->ch * 0x50));
0064         udelay(1);
0065         if (!timeout--) {
0066             AUX_ERR(&aux->base, "magic wait %08x", ctrl);
0067             g94_i2c_aux_fini(aux);
0068             return -EBUSY;
0069         }
0070     } while ((ctrl & 0x03000000) != urep);
0071
0072     return 0;
0073 }
0074
0075 int
0076 g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry,
0077          u8 type, u32 addr, u8 *data, u8 *size)
0078 {
0079     struct g94_i2c_aux *aux = g94_i2c_aux(obj);
0080     struct nvkm_i2c *i2c = aux->base.pad->i2c;
0081     struct nvkm_device *device = i2c->subdev.device;
0082     const u32 base = aux->ch * 0x50;
0083     u32 ctrl, stat, timeout, retries = 0;
0084     u32 xbuf[4] = {};
0085     int ret, i;
0086
0087     AUX_TRACE(&aux->base, "%d: %08x %d", type, addr, *size);
0088
0089     ret = g94_i2c_aux_init(aux);
0090     if (ret < 0)
0091         goto out;
0092
0093     stat = nvkm_rd32(device, 0x00e4e8 + base);
0094     if (!(stat & 0x10000000)) {
0095         AUX_TRACE(&aux->base, "sink not detected");
0096         ret = -ENXIO;
0097         goto out;
0098     }
0099
0100     nvkm_i2c_aux_autodpcd(i2c, aux->ch, false);
0101
0102     if (!(type & 1)) {
0103         memcpy(xbuf, data, *size);
0104         for (i = 0; i < 16; i += 4) {
0105             AUX_TRACE(&aux->base, "wr %08x", xbuf[i / 4]);
0106             nvkm_wr32(device, 0x00e4c0 + base + i, xbuf[i / 4]);
0107         }
0108     }
0109
0110     ctrl  = nvkm_rd32(device, 0x00e4e4 + base);
0111     ctrl &= ~0x0001f1ff;
0112     ctrl |= type << 12;
0113     ctrl |= (*size ? (*size - 1) : 0x00000100);
0114     nvkm_wr32(device, 0x00e4e0 + base, addr);
0115
0116     /* (maybe) retry transaction a number of times on failure... */
0117     do {
0118         /* reset, and delay a while if this is a retry */
0119         nvkm_wr32(device, 0x00e4e4 + base, 0x80000000 | ctrl);
0120         nvkm_wr32(device, 0x00e4e4 + base, 0x00000000 | ctrl);
0121         if (retries)
0122             udelay(400);
0123
0124         /* transaction request, wait up to 2ms for it to complete */
0125         nvkm_wr32(device, 0x00e4e4 + base, 0x00010000 | ctrl);
0126
0127         timeout = 2000;
0128         do {
0129             ctrl = nvkm_rd32(device, 0x00e4e4 + base);
0130             udelay(1);
0131             if (!timeout--) {
0132                 AUX_ERR(&aux->base, "timeout %08x", ctrl);
0133                 ret = -EIO;
0134                 goto out_err;
0135             }
0136         } while (ctrl & 0x00010000);
0137         ret = 0;
0138
0139         /* read status, and check if transaction completed ok */
0140         stat = nvkm_mask(device, 0x00e4e8 + base, 0, 0);
0141         if ((stat & 0x000f0000) == 0x00080000 ||
0142             (stat & 0x000f0000) == 0x00020000)
0143             ret = 1;
0144         if ((stat & 0x00000100))
0145             ret = -ETIMEDOUT;
0146         if ((stat & 0x00000e00))
0147             ret = -EIO;
0148
0149         AUX_TRACE(&aux->base, "%02d %08x %08x", retries, ctrl, stat);
0150     } while (ret && retry && retries++ < 32);
0151
0152     if (type & 1) {
0153         for (i = 0; i < 16; i += 4) {
0154             xbuf[i / 4] = nvkm_rd32(device, 0x00e4d0 + base + i);
0155             AUX_TRACE(&aux->base, "rd %08x", xbuf[i / 4]);
0156         }
0157         memcpy(data, xbuf, *size);
0158         *size = stat & 0x0000001f;
0159     }
0160 out_err:
0161     nvkm_i2c_aux_autodpcd(i2c, aux->ch, true);
0162 out:
0163     g94_i2c_aux_fini(aux);
0164     return ret < 0 ? ret : (stat & 0x000f0000) >> 16;
0165 }
0166
0167 int
0168 g94_i2c_aux_new_(const struct nvkm_i2c_aux_func *func,
0169          struct nvkm_i2c_pad *pad, int index, u8 drive,
0170          struct nvkm_i2c_aux **paux)
0171 {
0172     struct g94_i2c_aux *aux;
0173
0174     if (!(aux = kzalloc(sizeof(*aux), GFP_KERNEL)))
0175         return -ENOMEM;
0176     *paux = &aux->base;
0177
0178     nvkm_i2c_aux_ctor(func, pad, index, &aux->base);
0179     aux->ch = drive;
0180     aux->base.intr = 1 << aux->ch;
0181     return 0;
0182 }
0183
0184 static const struct nvkm_i2c_aux_func
0185 g94_i2c_aux = {
0186     .xfer = g94_i2c_aux_xfer,
0187 };
0188
0189 int
0190 g94_i2c_aux_new(struct nvkm_i2c_pad *pad, int index, u8 drive,
0191         struct nvkm_i2c_aux **paux)
0192 {
0193     return g94_i2c_aux_new_(&g94_i2c_aux, pad, index, drive, paux);
0194 }