subdev/i2c/anx9805.c

0001 /*
0002  * Copyright 2013 Red Hat Inc.
0003  *
0004  * Permission is hereby granted, free of charge, to any person obtaining a
0005  * copy of this software and associated documentation files (the "Software"),
0006  * to deal in the Software without restriction, including without limitation
0007  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0008  * and/or sell copies of the Software, and to permit persons to whom the
0009  * Software is furnished to do so, subject to the following conditions:
0010  *
0011  * The above copyright notice and this permission notice shall be included in
0012  * all copies or substantial portions of the Software.
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
0018  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0019  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0020  * OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * Authors: Ben Skeggs <bskeggs@redhat.com>
0023  */
0024 #define anx9805_pad(p) container_of((p), struct anx9805_pad, base)
0025 #define anx9805_bus(p) container_of((p), struct anx9805_bus, base)
0026 #define anx9805_aux(p) container_of((p), struct anx9805_aux, base)
0027 #include "aux.h"
0028 #include "bus.h"
0029
0030 struct anx9805_pad {
0031     struct nvkm_i2c_pad base;
0032     struct nvkm_i2c_bus *bus;
0033     u8 addr;
0034 };
0035
0036 struct anx9805_bus {
0037     struct nvkm_i2c_bus base;
0038     struct anx9805_pad *pad;
0039     u8 addr;
0040 };
0041
0042 static int
0043 anx9805_bus_xfer(struct nvkm_i2c_bus *base, struct i2c_msg *msgs, int num)
0044 {
0045     struct anx9805_bus *bus = anx9805_bus(base);
0046     struct anx9805_pad *pad = bus->pad;
0047     struct i2c_adapter *adap = &pad->bus->i2c;
0048     struct i2c_msg *msg = msgs;
0049     int ret = -ETIMEDOUT;
0050     int i, j, cnt = num;
0051     u8 seg = 0x00, off = 0x00, tmp;
0052
0053     tmp = nvkm_rdi2cr(adap, pad->addr, 0x07) & ~0x10;
0054     nvkm_wri2cr(adap, pad->addr, 0x07, tmp | 0x10);
0055     nvkm_wri2cr(adap, pad->addr, 0x07, tmp);
0056     nvkm_wri2cr(adap, bus->addr, 0x43, 0x05);
0057     mdelay(5);
0058
0059     while (cnt--) {
0060         if ( (msg->flags & I2C_M_RD) && msg->addr == 0x50) {
0061             nvkm_wri2cr(adap, bus->addr, 0x40, msg->addr << 1);
0062             nvkm_wri2cr(adap, bus->addr, 0x41, seg);
0063             nvkm_wri2cr(adap, bus->addr, 0x42, off);
0064             nvkm_wri2cr(adap, bus->addr, 0x44, msg->len);
0065             nvkm_wri2cr(adap, bus->addr, 0x45, 0x00);
0066             nvkm_wri2cr(adap, bus->addr, 0x43, 0x01);
0067             for (i = 0; i < msg->len; i++) {
0068                 j = 0;
0069                 while (nvkm_rdi2cr(adap, bus->addr, 0x46) & 0x10) {
0070                     mdelay(5);
0071                     if (j++ == 32)
0072                         goto done;
0073                 }
0074                 msg->buf[i] = nvkm_rdi2cr(adap, bus->addr, 0x47);
0075             }
0076         } else
0077         if (!(msg->flags & I2C_M_RD)) {
0078             if (msg->addr == 0x50 && msg->len == 0x01) {
0079                 off = msg->buf[0];
0080             } else
0081             if (msg->addr == 0x30 && msg->len == 0x01) {
0082                 seg = msg->buf[0];
0083             } else
0084                 goto done;
0085         } else {
0086             goto done;
0087         }
0088         msg++;
0089     }
0090
0091     ret = num;
0092 done:
0093     nvkm_wri2cr(adap, bus->addr, 0x43, 0x00);
0094     return ret;
0095 }
0096
0097 static const struct nvkm_i2c_bus_func
0098 anx9805_bus_func = {
0099     .xfer = anx9805_bus_xfer,
0100 };
0101
0102 static int
0103 anx9805_bus_new(struct nvkm_i2c_pad *base, int id, u8 drive,
0104         struct nvkm_i2c_bus **pbus)
0105 {
0106     struct anx9805_pad *pad = anx9805_pad(base);
0107     struct anx9805_bus *bus;
0108     int ret;
0109
0110     if (!(bus = kzalloc(sizeof(*bus), GFP_KERNEL)))
0111         return -ENOMEM;
0112     *pbus = &bus->base;
0113     bus->pad = pad;
0114
0115     ret = nvkm_i2c_bus_ctor(&anx9805_bus_func, &pad->base, id, &bus->base);
0116     if (ret)
0117         return ret;
0118
0119     switch (pad->addr) {
0120     case 0x39: bus->addr = 0x3d; break;
0121     case 0x3b: bus->addr = 0x3f; break;
0122     default:
0123         return -ENOSYS;
0124     }
0125
0126     return 0;
0127 }
0128
0129 struct anx9805_aux {
0130     struct nvkm_i2c_aux base;
0131     struct anx9805_pad *pad;
0132     u8 addr;
0133 };
0134
0135 static int
0136 anx9805_aux_xfer(struct nvkm_i2c_aux *base, bool retry,
0137          u8 type, u32 addr, u8 *data, u8 *size)
0138 {
0139     struct anx9805_aux *aux = anx9805_aux(base);
0140     struct anx9805_pad *pad = aux->pad;
0141     struct i2c_adapter *adap = &pad->bus->i2c;
0142     int i, ret = -ETIMEDOUT;
0143     u8 buf[16] = {};
0144     u8 tmp;
0145
0146     AUX_DBG(&aux->base, "%02x %05x %d", type, addr, *size);
0147
0148     tmp = nvkm_rdi2cr(adap, pad->addr, 0x07) & ~0x04;
0149     nvkm_wri2cr(adap, pad->addr, 0x07, tmp | 0x04);
0150     nvkm_wri2cr(adap, pad->addr, 0x07, tmp);
0151     nvkm_wri2cr(adap, pad->addr, 0xf7, 0x01);
0152
0153     nvkm_wri2cr(adap, aux->addr, 0xe4, 0x80);
0154     if (!(type & 1)) {
0155         memcpy(buf, data, *size);
0156         AUX_DBG(&aux->base, "%16ph", buf);
0157         for (i = 0; i < *size; i++)
0158             nvkm_wri2cr(adap, aux->addr, 0xf0 + i, buf[i]);
0159     }
0160     nvkm_wri2cr(adap, aux->addr, 0xe5, ((*size - 1) << 4) | type);
0161     nvkm_wri2cr(adap, aux->addr, 0xe6, (addr & 0x000ff) >>  0);
0162     nvkm_wri2cr(adap, aux->addr, 0xe7, (addr & 0x0ff00) >>  8);
0163     nvkm_wri2cr(adap, aux->addr, 0xe8, (addr & 0xf0000) >> 16);
0164     nvkm_wri2cr(adap, aux->addr, 0xe9, 0x01);
0165
0166     i = 0;
0167     while ((tmp = nvkm_rdi2cr(adap, aux->addr, 0xe9)) & 0x01) {
0168         mdelay(5);
0169         if (i++ == 32)
0170             goto done;
0171     }
0172
0173     if ((tmp = nvkm_rdi2cr(adap, pad->addr, 0xf7)) & 0x01) {
0174         ret = -EIO;
0175         goto done;
0176     }
0177
0178     if (type & 1) {
0179         for (i = 0; i < *size; i++)
0180             buf[i] = nvkm_rdi2cr(adap, aux->addr, 0xf0 + i);
0181         AUX_DBG(&aux->base, "%16ph", buf);
0182         memcpy(data, buf, *size);
0183     }
0184
0185     ret = 0;
0186 done:
0187     nvkm_wri2cr(adap, pad->addr, 0xf7, 0x01);
0188     return ret;
0189 }
0190
0191 static int
0192 anx9805_aux_lnk_ctl(struct nvkm_i2c_aux *base,
0193             int link_nr, int link_bw, bool enh)
0194 {
0195     struct anx9805_aux *aux = anx9805_aux(base);
0196     struct anx9805_pad *pad = aux->pad;
0197     struct i2c_adapter *adap = &pad->bus->i2c;
0198     u8 tmp, i;
0199
0200     AUX_DBG(&aux->base, "ANX9805 train %d %02x %d",
0201         link_nr, link_bw, enh);
0202
0203     nvkm_wri2cr(adap, aux->addr, 0xa0, link_bw);
0204     nvkm_wri2cr(adap, aux->addr, 0xa1, link_nr | (enh ? 0x80 : 0x00));
0205     nvkm_wri2cr(adap, aux->addr, 0xa2, 0x01);
0206     nvkm_wri2cr(adap, aux->addr, 0xa8, 0x01);
0207
0208     i = 0;
0209     while ((tmp = nvkm_rdi2cr(adap, aux->addr, 0xa8)) & 0x01) {
0210         mdelay(5);
0211         if (i++ == 100) {
0212             AUX_ERR(&aux->base, "link training timeout");
0213             return -ETIMEDOUT;
0214         }
0215     }
0216
0217     if (tmp & 0x70) {
0218         AUX_ERR(&aux->base, "link training failed");
0219         return -EIO;
0220     }
0221
0222     return 0;
0223 }
0224
0225 static const struct nvkm_i2c_aux_func
0226 anx9805_aux_func = {
0227     .xfer = anx9805_aux_xfer,
0228     .lnk_ctl = anx9805_aux_lnk_ctl,
0229 };
0230
0231 static int
0232 anx9805_aux_new(struct nvkm_i2c_pad *base, int id, u8 drive,
0233         struct nvkm_i2c_aux **pbus)
0234 {
0235     struct anx9805_pad *pad = anx9805_pad(base);
0236     struct anx9805_aux *aux;
0237     int ret;
0238
0239     if (!(aux = kzalloc(sizeof(*aux), GFP_KERNEL)))
0240         return -ENOMEM;
0241     *pbus = &aux->base;
0242     aux->pad = pad;
0243
0244     ret = nvkm_i2c_aux_ctor(&anx9805_aux_func, &pad->base, id, &aux->base);
0245     if (ret)
0246         return ret;
0247
0248     switch (pad->addr) {
0249     case 0x39: aux->addr = 0x38; break;
0250     case 0x3b: aux->addr = 0x3c; break;
0251     default:
0252         return -ENOSYS;
0253     }
0254
0255     return 0;
0256 }
0257
0258 static const struct nvkm_i2c_pad_func
0259 anx9805_pad_func = {
0260     .bus_new_4 = anx9805_bus_new,
0261     .aux_new_6 = anx9805_aux_new,
0262 };
0263
0264 int
0265 anx9805_pad_new(struct nvkm_i2c_bus *bus, int id, u8 addr,
0266         struct nvkm_i2c_pad **ppad)
0267 {
0268     struct anx9805_pad *pad;
0269
0270     if (!(pad = kzalloc(sizeof(*pad), GFP_KERNEL)))
0271         return -ENOMEM;
0272     *ppad = &pad->base;
0273
0274     nvkm_i2c_pad_ctor(&anx9805_pad_func, bus->pad->i2c, id, &pad->base);
0275     pad->bus = bus;
0276     pad->addr = addr;
0277     return 0;
0278 }